![]() |
|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
TMP88CS34/CP34 CMOS 8-Bit Microcontroller TMP88CS34N/F, TMP88CP34N/F The TMP88CS34/CP34 is the high speed and high performance 8-bit single chip microcomputers. This MCU contain CPU core, ROM, RAM, input/output ports, four Multi-function timer/counters, serial bus interface, on-screen display, PWM output, 8-bit AD converter, and remote control signal preprocessor on chip. Product No. TMP88CS34N/F TMP88CP34N/F ROM 64 K 48 K 8-bit 8-bit RAM 1.5 K 8-bit Package P-SDIP42-600-1.78 P-QFP44-1414-0.80D OTP MCU TMP88PS34N/F Features 8-bit single chip microcomputer TLCS-870/X Series Instruction execution time: 0.25 s (at 16 MHz) 842 basic instructions Multiplication and Division (8 bits 8 bits, 16 bits 8 bits, 16 bits/8 bits) Bit manipulations (Set/Clear/Complement/Move/Test/Exclusive or) 16-bit data and 20-bit data operations 1-byte jump/subroutine-call (Short relative jump/Vector call) I/O ports: Maximum 33 (High current output: 4) 15 interrupt sources: External 6, Internal 10 All sources have independent latches each, and nested interrupt control is available. Edge-selectable external interrupts with noise reject High-speed task switching by register bank changeover ROM corrective function Two 16-bit timer/counters: TC1, TC2 Timer, Event-counter, Pulse width measurement, External trigger timer, Window modes Two 8-bit timer/counters: TC3, TC4 Timer, Event counter, Capture (Pulse width/duty measurement) mode 000707EBP1 For a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled Quality and Reliability Assurance / Handling Precautions. TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. The products described in this document are subject to the foreign exchange and foreign trade laws. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. The information contained herein is subject to change without notice. Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. 88CS34-1 2003-03-25 TMP88CS34CP34 Time base timer (Interrupt frequency: 0.95 Hz to 31250 Hz) Watchdog timer Interrupt source/reset output Serial bus interface I2C bus, 8-bit SIO mode (Selectable two I/O channels) On-screen display circuit Font ROM characters: Mono font 383 characters, color font 96 characters or mono font 447 characters, color font 64 characters Characters display: 32 columns 12 lines Composition: 16 18 dots Size of character: 4 kinds (line by line) Color of character: 8 or 27 kinds (character by character) Variable display position: Horizontal 256 steps, Vertical 625 steps Fringing, Smoothing, Slant, Underline , Blinking function Jitter elimination DA conversion (Pulse Width Modulation) outputs 14/12-bit resolution (2 channels) 12-bit resolution (2 channels) 8-bit successive approximate type AD converter with sample and hold High current output: 1 pin (typ. 20 mA) Remote control signal preprocessor Two power saving operating modes STOP mode: Oscillation stops. Battery/Capacitor back-up. Port output hold/high-impedance. IDLE mode: CPU stops, and Peripherals operate using high-frequency clock. Release by interrupts. Operating voltage: 4.5 to 5.5 V at 16 MHz Emulation POD: BM88CS34N0A-M15 88CS34-2 2003-03-25 TMP88CS34CP34 Pin Assignments Package P-SDIP42-600-1.78 P-SDIP42-600-1.78 VSS ( PWM0 ) P40 ( PWM1 ) P41 ( PWM2 ) P42 ( PWM3 ) P43 P44 P45 P46 P47 (TC2/ INT0 ) P50 (SI1/SCL1) P51 (SO1/SDA1) P52 ( KWU0 / SCK1 /INT2/TC1/AIN0) P53 ( KWU1 /AIN1) P54 ( KWU2 /AIN2) P55 ( KWU3 /AIN3) P56 ( KWU4 /Y/BLIN/AIN4) P60 ( KWU5 /BIN/AIN5) P61 (GIN) P62 (RIN) P63 (I) P57 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 VDD P33 (TC4) P32 VVSS P35 (SDA0) P34 (SCL0) P31 (INT4/TC3) P30 (INT3/RXIN) P20 ( INT5 / STOP ) RESET TMP88CS34N TMP88CP34N TMP88PS34N XOUT XIN TEST OSC2 OSC1 P71 ( VD ) P70 ( HD ) P67 (Y/BL) P66 (B) P65 (G) P64 (R) Package P-QFP44-1414-0.80D P-QFP44-1414-0.80D P34 (SCL0) P31 (INT4/TC3) P30 (INT3/RXIN) P20 (INT5/STOP) 34 35 36 37 38 39 40 41 42 43 44 TMP88CS34F TMP88CP34F TMP88PS34F (SDA0) P35 VVSS P32 (TC4) P33 N.C. VDD VSS ( PWM0 ) P40 ( PWM1 ) P41 ( PWM2 ) P42 ( PWM3 ) P43 33 32 31 30 29 28 27 26 25 24 23 XOUT XIN TEST OSC2 OSC1 P71 (VD) 22 21 20 19 18 17 16 15 14 13 12 RESET P44 P45 P46 P47 (TC2/INT0) P50 (SI1/SCL1) P51 (SO1/SDA1) P52 (KWU0/SCK1/INT2/TC1/AIN0) P53 (KWU1/AIN1) P54 (KWU2/AIN2) P55 (KWU3/AIN3) P56 1 2 3 4 5 6 7 8 9 10 11 P70 ( HD ) P67 (Y/BL) P66 (B) P65 (G) P64 (R) N.C. P57 P63 (RIN) P62 (GIN) P61 (BIN//AIN5/ KWU5 ) P60 (Y/BLIN/AIN4/ KWU4 ) 88CS34-3 2003-03-25 TMP88CS34CP34 Pin Functions (1/2) Pin Name P20 ( INT5 / STOP ) P35 (SDA0) P34 (SCL0) P33 (TC4) P32 P31 (INT4/TC3) P30 (INT3/RXIN) P47 P46 P45 P44 P43 ( PWM3 ) P42 ( PWM2 ) P41 ( PWM1 ) P40 ( PWM0 ) P57 (I) P56 ( KWU3 /AIN3) P55 ( KWU2 /AIN2) P54 ( KWU1 /AIN1) P53 ( KWU0 /AIN0/TC1 /INT2/ SCK1 ) I/O I/O (Input) I/O (Input/Output) I/O (Input/Output) I/O (Input) I/O I/O (Input) I/O (Input) I/O I/O I/O I/O I/O (Output) I/O (Output) I/O (Output) I/O (Output) I/O (Output) I/O (Input) I/O (Input) I/O (Input) I/O (Input/Input/Input /Input/Output) I/O (Input/Output/Output) I/O (Input/Output/Input) I/O (Input/Input) I/O (Output) I/O (Output) I/O (Output) I/O (Output) I/O (Input) I/O (Input) I/O (Input) 1-bit input/output port with latch. When used as an input port, the latch must be set to "1". Function External interrupt input 5 or STOP mode release signal input I2C bus serial data input/output 0 I2C bus serial clock input/output 0 Video signal input 1 or Composite sync input External interrupt input 4 or Timer/Counter input 3 External interrupt input 3 or Remote control signal preprocessor input 8-bit programmable input/output port. Each bit of these ports can be individually configured as an input or an output under software control. During reset, all bits are configured as inputs. 6-bit programmable input/output port. Each bit of these ports can be individually configured as an input or an output under software control. During reset, all bits are configured as inputs. When used as a serial bus interface input/output, the latch must be set to "1". 12-bit DA conversion (PWM) outputs 14/12-bit DA conversion (PWM) outputs 8-bit programmable input/output port. Each bit of these ports can be individually configured as an input or an output under software control. During reset, all bits are configured as inputs. When used as a serial bus interface input/output, the latch must be set to "1". Translucent signal output Key on wake-up inputs or AD converter analog inputs Key on wake-up input or AD converter analog input or Timer/counter input 1 or External interrupt input 2 or SIO serial clock input/output 1 I2C bus serial data Input/Output 1 or SIO serial data output 1 I2C bus serial data Input/Output 1 or SIO serial data input 1 Timer/Counter input 2 or External interrupt input 0 P52 (SDA1/SO1) P51 (SCL1/SI1) P50 (TC2/ INT0 ) P67 (Y/BL) P66 (B) P65 (G) P64 (R) P63 (RIN) P62 (GIN) P61 ( KWU5 /BIN/AIN5) P60 ( KWU4 /YBLIN/AIN4) I/O (Input) 8-bit programmable input/output port. (P67 to 61: Tri-State, P60: High current output) Each bit of these ports can be individually configured as an input or an output under software control. During reset, all bits are configured as inputs. When used P64 to P67 as port, each bit of the P6 port data selection register (bit 7 to 4 in ORP6S) must be set to "1". P63 to P61 output 0 after a reset. When these dual-function pins are used as ports, be sure to set ORP6S2 to "1". Y or BL output R/G/B outputs R input G input Key on wake-up input 5 or B input or AD converter analog input 5 Key on wake-up input 4 or Y/BL input or AD converter analog input 4 88CS34-4 2003-03-25 TMP88CS34CP34 Pin Functions (2/2) Pin Name P71 ( VD ) I/O I/O (Input) Function 2-bit programmable input/output port. Each bit of these ports can be individually configured as an input or an output under software control. During reset, all bits are configured as inputs. Vertical synchronous signal input P70 ( HD ) XIN, XOUT RESET TEST OSC1, OSC2 VDD, VSS, VVSS I/O (Input) Input, Output I/O Input Input, Output Power Supply Horizontal synchronous signal input Resonator connecting pins. For inputting external clock, XIN is used and XOUT is opened. Reset signal input or watchdog timer output/address-trap-reset output/system-clock-rest output Test pin for out-going test. Be tied to low. Resonator connecting pins for on-screen display circuitry 5 V, 0 V (GND) 88CS34-5 2003-03-25 TMP88CS34CP34 Block Diagram I/O Ports P64 to P67 P70, 71 P57 OSC Connecting Pins for On-Screen Display OSC1 OSC2 Display Memory Character ROM R, G, B, Jitter Y/BL Elimination VD HD I On-screen display circuit P6 P7 P5 Power VDD Supply VSS VVSS TLCS-870/X CPU core Data Memory (RAM) ROM corrective circuit Reset I/O Test Pin RESET TEST System Controller Standby Controller Interrupt Controller Program Counter Resonator Connecting Pins XIN XOUT Timing Generator High Clock frequency Generator Time Base Timer Watchdog Timer 16-bit Timer TC1 TC2 8-bit Timer/Counter Program Memory (ROM) TC3 TC4 Inst. Register Inst. Decoder P2 P4 DA Converter (PWM) P5 8-bit AD Key on wake up P6 Remote control signal P3 Serial Bus Interface Y/BLIN RIN GIN BIN P20 P40 to P47 P50 to P56 P60 to P63 P30 to P35 I/O Ports 88CS34-6 2003-03-25 TMP88CS34/CP34 Operational Description 1. CPU Core Functions The CPU core consists of a CPU, a system clock controller, and an interrupt controller. This section provides a description of the CPU core, the program memory, the data memory, the external memory interface, and the reset circuit. 1.1 Memory Address Map The TMP88CS34/CP34 memory consists of four blocks: ROM, RAM, SFR (Special Function Register), and DBR (Data Buffer Register). They are all mapped to a 1-Mbyte address space. Figure 1.1.1 shows the TMP88CS34/CP34 memory address map. There are 16 banks of the general-purpose register. The register banks are also assigned to the RAM address space. 00000H SFR 0003FH 00040H 000BFH 000C0H 64 bytes 128 bytes 1536 bytes 006BFH 00F80H DBR 00FFFH 04000H 128 bytes 00000H 0003FH 00040H 000BFH 000C0H 1536 bytes 006BFH 00F80H 128 bytes 00FFFH 04000H 64 bytes 128 bytes RAM 48896 bytes 65280 bytes 13EFFH ROM FFF00H FFF3FH FFF40H FFF7FH FFF80H FFFFFH TMP88CS34 64 bytes 64 bytes 128 bytes 0FEFFH FFF00H FFF3FH FFF40H FFF7FH FFF80H FFFFFH TMP88CP34 64 bytes 64 bytes 128 bytes ROM: Read Only Memory includes Program memory, Character data memory for OSD RAM: Random Access Memory includes Data memory, Stack, General-purpose register banks SFR: Special Function Register includes I/O ports, Peripheral hardware control registers, Peripheral hardware status registers System control registers, Interrupt control registers, Program status word DBR: Data Buffer Register includes Control register for on-screen display (OSD) Remote-control-receive control/status registers, ROM correction control registers Test video signal control registers Figure 1.1.1 Memory Address Map 88CS34-7 2003-03-25 TMP88CS34/CP34 Electrical Characteristics Absolute maximum ratings Parameter Supply Voltage Input Voltage Output Voltage Output Current (Per 1 pin) Symbol VDD VIN VOUT1 IOUT1 IOUT2 Output Current (Total) Power Dissipation [Topr 70 C] IOUT1 IOUT2 PD Tsld Tstg Topr Ports P2, P3, P4, P5, P61 to P67, P7 Ports P60 Ports P2, P3, P4, P5, P64 to P67, P7 Ports P60 (VSS 0 V) Pins Ratings 0.3 to 6.5 0.3 to VDD 0.3 to VDD 3.2 30 mA 30 30 400 260 (10 s) 55 to 125 30 to 70 C mW 0.3 0.3 V Unit Soldering Temperature (time) Storage Temperature Operating Temperature Note: The absolute maximum ratings are rated values which must not be exceeded during operation, even for an instant. Any one of the ratings must not be exceeded. If any absolute maximum rating is exceeded, a device may break down or its performance may be degraded, causing it to catch fire or explode resulting in injury to the user. Thus, when designing products which include this device, ensure that no absolute maximum rating value will ever be exceeded. Recommended operating conditions Parameter Symbol Pins (VSS 0 V, Topr 30 to 70 C) Conditions Min Max Unit fc Supply Voltage VDD VIH1 Input High Voltage VIH2 VIH3 VIL1 Input Low Voltage VIL2 VIL3 fc Clock Frequency fOSC Except hysteresis input Hysteresis input Key-on Wake-up input Except hysteresis input Hysteresis input Key-on Wake-up input XIN, XOUT Internal clock VDD VDD VDD VDD VDD fc 16 MHz NORMAL mode 16 MHz IDLE mode STOP mode VDD 4.5 to 5.5V VDD VDD 4.5 to 5.5V 4.5 to 5.5V 4.5 to 5.5V 4.5 to 5.5V fc fc 8 MHz 16 MHz 8.0 8.0 16.0 0 0.70 0.75 0.90 VDD VDD VDD 0.30 0.25 0.65 MHz VDD V 4.5 5.5 16.0 12.0 24.0 Note 1: The recommended operating conditions for a device are operating conditions under which it can be guaranteed that the device will operate as specified. If the device is used under operating conditions other than the recommended operating conditions (supply voltage, operating temperature range, specified AC/DC values etc.), malfunction may occur. Thus, when designing products which include this device, ensure that the recommended operating conditions for the device are always adhered to. Note 2: Clock frequency fc: Supply voltage range is specified in NORMAL mode and IDLE mode. Note 3: Smaller value is alternatively specified as the maximum value. 88CS34-208 2003-03-25 TMP88CS34/CP34 DC Characteristics Parameter Hysteresis voltage Symbol VHS IIN1 Input current IIN2 IIN3 IIN4 Input resistance Output leakage current Output high voltage Output low voltage Output low current Supply current in NORMAL mode Supply current in IDLE mode Supply current in STOP mode IDD RIN2 ILO1 ILO2 VOH2 VOL IOL3 Pins Hysteresis inputs TEST Open drain ports Tri-state ports RESET , STOP RESET (VSS 0 V, Topr 30 to 70 C) Conditions Min Typ. 0.9 Max Unit V 2 2 2 2 100 220 450 2 2 4.1 V 0.4 20 25 (Note3) 20 0.5 25 10 A 30 mA k A A VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 5.5 V, VIN 5.5 V, VIN 5.5 V, VIN 5.5 V, VIN 5.5 V, VIN 5.5 V, VOUT 5.5 V, VOUT 4.5 V, IOH 4.5 V, IOL 4.5 V, IOL 5.5 V/0 V 5.5 V/0 V 5.5 V/0 V 5.5 V/0 V 0V 5.5 V 5.5 V/0 V 0.7 mA 1.6 mA 1.0 V Sink open drain ports Tri-state ports Tri-state ports Except XOUT and ports P60 Port P60 VDD 5.5 V fc 16 MHz VIN 5.3 V/0.2 V VDD 5.5 V VIN 5.3 V/0.2 V Note 1: Typical values show those at Topr 25 C, VDD 5 V. Note 2: Input Current IIN3; The current through resistor is not included. Note 3: Supply Current IDD; The current (Typ. 0.5 mA) through ladder resistors of ADC is included in NORMAL mode and IDLE mode. AD Conversion Characteristics Parameter Analog reference voltage Analog reference voltage range Analog input voltage Nonlinearity error Zero point error Full scale error Total error VDD 5.0 V 2 3 Symbol VAREF VASS VAREF VAIN (VSS 0 V, VDD Conditions 4.5 V to 5.5 V, Topr Min 30 to 70 C) Typ. VDD 0 V VDD Max Unit supplied from VDD pin. supplied from VSS pin. VDD VSS VSS VDD 1 2 LSB Note: The total error means all error except quanting error. 88CS34-209 2003-03-25 TMP88CS34/CP34 AC characteristics Parameter Machine cycle time High level clock pulse width Low level clock pulse width Symbol tcy (VSS 0 V, VDD 4.5 V to 5.5 V, Topr Min 0.5 30 to 70 C) Typ. Max 1.0 Unit s Conditions In NORMAL mode In IDLE mode tWCH tWCL For external clock operation 31.25 (XIN input), fc 16 MHz ns Recommended oscillating conditions Parameter High-frequency oscillation Oscillator (VSS 0 V, VDD 4.5 V to 5.5 V, Topr 30 to 70 C) Recommended Constant Oscillation Frequency 8 MHz 16 MHz Recommended Oscillator C1 Murata Murata CSA 8.00MTZ CSA 16.00MXZ040 30 pF 5 pF C2 30 pF 5 pF Ceramic resonator XIN XOUT C1 C2 High-frequency Oscillation Note 1: To keep reliable operation, shield the device electrically with the metal plate on its package mold surface against the high electric field, for example, by CRT (Cathode Ray Tube) . Note 2: The product numbers and specifications of the resonators by Murata Manufacturing Co., Ltd. are subject to change. For up-to-date information, please refer to the following URL; http://www.murata.co.jp/search/index.html 88CS34-210 2003-03-25 TMP88CS34/CP34 Recommended oscillating conditions (VSS 0 V, VDD 4.5 V to 5.5 V, Topr 30 to 70 C) Item Oscillation Resonator Frequency 8 MHz 12 MHz Recommended parameter value L ( H) 33 15 10 6.8 4.7 C1 (pF) 5 to 30 5 to 30 5 to 30 5 to 25 5 to 25 C2 (pF) 10 10 10 10 10 Oscillation for OSD LC resonator 16 MHz 20 MHz 24 MHz OSC1 L C1 OSC2 C2 Oscillation for OSD The frequency generated in LC oscillation can be obtained using the following equations. f 2 1 ,C LC C1 C2 C1 C2 C1 is not fixed at a constant value. It can be changed to tune into the desired frequency. Note 1: Toshiba's OSD circuit determines a horizontal display start position by counting clock pulses generated in LC oscillation. For this reason, the OSD circuit may fail to detect clock pulses normally, resulting in the horizontal start position becoming unstable, at the beginning of oscillation, if the oscillation amplitude is low. Changing L and C2 from the values recommended for a specific frequency may hamper a stable OSD display. If the LC oscillation frequency is the same as a high-frequency clock value, the oscillation of the high-frequency oscillator may cause the LC oscillation frequency to fluctuate, thus making OSD displays flicker. When determining these parameters, please check the oscillation frequency and the stability of oscillation on your TV sets. Also check the determined parameters on your final products, because the optimum parameter values may vary from one product to another. Note 2: When using the LSI package in a strong electric field, such as near a CRT, electrically shield the package so that its normal operation can be maintained. 88CS34-211 2003-03-25 |
Price & Availability of TMP88CP34F
![]() |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |