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| <0.5 CMOS 1.65 V to 3.6 V Quad SPST Switches ADG811/ADG812/ADG813 FEATURES 0.5 typ on resistance 0.8 max on resistance at 125C 1.65 V to 3.6 V operation Automotive temperature range: -40C to +125C High current carrying capability: 300 mA continuous Rail-to-rail switching operation Fast switching times: <25 ns Typical power consumption < 0.1 W IN1 D1 S2 IN2 D2 IN2 D2 FUNCTIONAL BLOCK DIAGRAMS S1 IN1 D1 S2 IN2 D2 S1 IN1 D1 S2 S1 ADG811 S3 IN3 D3 IN3 ADG812 S3 IN3 D3 S4 IN4 D4 D4 IN4 ADG813 S3 D3 S4 04306-A-001 APPLICATIONS Cellular phones MP3 players Power routing Battery-powered systems PCMCIA cards Modems Audio and video signal routing Communications systems IN4 S4 D4 SWITCHES SHOWN FOR A LOGIC 1 INPUT Figure 1. GENERAL DESCRIPTION The ADG811, ADG812, and ADG813 are low voltage CMOS devices containing four independently selectable switches. These switches offer ultralow on resistance of less than 0.8 over the full temperature range. The digital inputs can handle 1.8 V logic with a 2.7 V to 3.6 V supply. These devices contain four independent single-pole/singlethrow (SPST) switches. The ADG811 and ADG812 differ only in that the digital control logic is inverted. The ADG811 switches are turned on with a logic low on the appropriate control input, while a logic high is required to turn on the switches of the ADG812. The ADG813 contains two switches whose digital control logic is similar to the ADG811, while the logic is inverted on the other two switches. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. The ADG813 exhibits break-before-make switching action. The ADG811, ADG812, and ADG813 are fully specified for 3.3 V, 2.5 V, and 1.8 V supply operation. They are available in a 16-lead TSSOP package. PRODUCT HIGHLIGHTS 1. 2. 3. 4. 5. <0.8 over full temperature range of -40C to +125C. Single 1.65 V to 3.6 V operation. Operational with 1.8 V CMOS logic. High current handling capability (300 mA continuous current at 3.3 V). Low THD+N (0.02% typ). Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved. ADG811/ADG812/ADG813 TABLE OF CONTENTS ADG811/ADG812/ADG813--Specifications .............................. 3 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ..............................................8 Test Circuits..................................................................................... 11 Outline Dimensions ....................................................................... 13 Ordering Guide .......................................................................... 13 REVISION HISTORY 5/04--Data Sheet Changed from Rev. 0 to Rev. A Updated Format..............................................................Universal Updated Package Choices..............................................Universal 11/03--Revision 0: Initial Version Rev. A | Page 2 of 16 ADG811/ADG812/ADG813 ADG811/ADG812/ADG813--SPECIFICATIONS Table 1. VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted1 Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage IS (OFF) Drain Off Leakage ID (OFF) Channel On Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tON tOFF Break-Before-Make Time Delay (tBBM) (ADG813 only) Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion (THD + N) Insertion Loss -3 dB Bandwidth CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD +25C -40C to +85C -40C to +125C 0 V to VDD 0.5 0.65 0.04 0.1 0.15 0.2 1 0.2 1 0.2 1 0.16 0.75 0.075 0.8 0.08 Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % dB typ MHz typ pF typ pF typ pF typ A typ A max Test Conditions/Comments VDD = 2.7 V, VS = 0 V to VDD, IS = 10 mA; Figure 18 VDD = 2.7 V, VS = 0.5 V, IS = 10 mA VDD = 2.7 V, VS = 0 V to VDD, IS = 10 mA VDD = 3.6 V VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; Figure 19 VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; Figure 19 VS = VD = 0.6 V or 3.3 V; Figure 20 8 8 15 80 80 90 2 0.8 0.005 0.1 6 21 25 4 5 17 30 -67 -90 0.02 -0.05 90 30 35 60 0.003 1.0 4 VIN = VINL or VINH 26 6 28 7 5 RL = 50 , CL = 35 pF VS = 1.5 V/0 V; Figure 21 RL = 50 , CL = 35 pF VS = 1.5 V; Figure 21 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V; Figure 22 VS = 1.5 V, RS = 0 , CL = 1 nF; Figure 23 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 26 RL = 32 , f = 20 Hz to 20 kHz, VS = 2 V p-p RL = 50 , CL = 5 pF, f = 100 kHz RL = 50 , CL = 5 pF; Figure 25 VDD = 3.6 V Digital inputs = 0 V or 3.6 V 1 2 Temperature range for the Y version is -40C to +125C. Guaranteed by design, not subject to production test. Rev. A | Page 3 of 16 ADG811/ADG812/ADG813 Table 2. VDD = 2.5 V 0.2 V, GND = 0 V, unless otherwise noted1 Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage IS (OFF) Drain Off Leakage ID (OFF) Channel On Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tON tOFF Break-Before-Make Time Delay (tBBM) (ADG813 only) Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion (THD + N) Insertion Loss -3 dB Bandwidth CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD +25C -40C to +85C -40C to +125C 0 V to VDD 0.65 0.72 0.04 0.16 0.23 0.2 1 0.2 1 0.2 1 0.24 0.8 0.08 0.88 0.085 Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % dB typ MHz typ pF typ pF typ pF typ A typ A max Test Conditions/Comments VDD = 2.3 V, VS = 0 V to VDD, IS = 10 mA; Figure 18 VDD = 2.3 V; VS = 0.55 V, IS = 10 mA VDD = 2.3 V; VS = 0 V to VDD, IS = 10 mA VDD = 2.7 V VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V; Figure 19 VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V; Figure 19 VS = VD = 0.6 V or 2.4 V; Figure 20 6 6 11 35 35 70 1.7 0.7 0.005 0.1 6 22 27 4 6 18 25 -67 -90 0.022 -0.06 90 32 37 60 0.003 1.0 4 VIN = VINL or VINH 29 7 30 8 5 RL = 50 , CL = 35 pF VS = 1.5 V/ 0 V; Figure 21 RL = 50 , CL = 35 pF VS = 1.5 V; Figure 21 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V; Figure 22 VS = 1.25 V, RS = 0 , CL = 1 nF; Figure 23 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 26 RL = 32 , f = 20 Hz to 20 kHz, VS = 1.5 V p-p RL = 50 , CL = 5 pF, f = 100 kHz RL = 50 , CL = 5 pF; Figure 25 VDD = 2.7 V Digital inputs = 0 V or 2.7 V 1 2 Temperature range for the Y version is -40C to +125C. Guaranteed by design, not subject to production test. Rev. A | Page 4 of 16 ADG811/ADG812/ADG813 Table 3. VDD = 1.65 V to 1.95 V, GND = 0 V, unless otherwise noted1 Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) +25C -40C to +85C -40C to +125C 0 V to VDD 1 1.4 2.5 0.1 2.2 4 2.2 4 Unit V typ max max typ Test Conditions/Comments On Resistance Match between Channels (RON) LEAKAGE CURRENTS Source Off Leakage IS (OFF) Drain Off Leakage ID (OFF) Channel On Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tON tOFF Break-Before-Make Time Delay (tBBM) (ADG813 only) Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion (THD + N) Insertion Loss -3 dB Bandwidth CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD VDD = 1.8 V, VS = 0 V to VDD, IS = 10 mA; Figure 18 VDD = 1.65 V, VS = 0 V to VDD, IS = 10 mA VDD = 1.65 V, VS = 0.7 V, IS = 10 mA VDD = 1.95 V VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V; Figure 19 VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V; Figure 19 VS = VD = 0.6 V or 1.65 V; Figure 20 0.2 1 0.2 1 0.2 1 5 5 9 30 30 60 0.65VDD 0.35VDD nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % dB typ MHz typ pF typ pF typ pF typ A typ A max 0.005 0.1 6 27 35 6 8 20 15 -67 -90 0.14 -0.08 90 32 38 60 0.003 1.0 4 VIN = VINL or VINH 36 9 37 10 5 RL = 50 , CL = 35 pF VS = 1.5 V/ 0 V; Figure 21 RL = 50 , CL = 35 pF VS = 1.5 V; Figure 21 RL = 50 , CL = 35 pF VS1 = VS2 = 1 V; Figure 22 VS = 1 V, RS = 0 , CL = 1 nF; Figure 23 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 26 RL = 32 , f = 20 Hz to 20 kHz, VS = 1.2 V p-p RL = 50 , CL = 5 pF, f = 100 kHz RL = 50 , CL = 5 pF; Figure 25 VDD = 1.95 V Digital inputs = 0 V or 1.95 V 1 2 Temperature range for the Y version is -40C to +125C. Guaranteed by design, not subject to production test. Rev. A | Page 5 of 16 ADG811/ADG812/ADG813 ABSOLUTE MAXIMUM RATINGS Table 4. TA = 25C, unless otherwise noted Parameter VDD to GND Analog Inputs1 Digital Inputs1 Peak Current, S or D 3.3 V Operation 2.5 V Operation 1.8 V Operation Continuous Current, S or D 3.3 V Operation 2.5 V Operation 1.8 V Operation Operating Temperature Range Automotive (Y Version) Storage Temperature Range Junction Temperature TSSOP Package JA Thermal Impedance JC Thermal Impedance IR Reflow, Peak Temperature <20 sec Rating -0.3 V to +4.6 V -0.3 V to VDD + 0.3 V GND - 0.3 V to 4.6 V or 10 mA, whichever occurs first (Pulsed at 1 ms, 10% Duty Cycle Max) 500 mA 460 mA 420 mA 300 mA 275 mA 250 mA -40C to +125C -65C to +150C 150C 150C/W 27C/W 235C Table 5. ADG811/ADG812 Truth Table ADG811 IN 0 1 ADG812 IN 1 0 Switch Condition On Off Table 6. ADG813 Truth Table Logic 0 1 Switch 1, Switch 4 Off On Switch 2, Switch 3 On Off Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 1 Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. A | Page 6 of 16 ADG811/ADG812/ADG813 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS IN1 1 D1 2 S1 3 NC 4 GND 5 S4 6 D4 7 IN4 8 NC = NO CONNECT 16 15 IN2 D2 S2 VDD NC S3 D3 IN3 04306-A-002 ADG811/ ADG812/ ADG813 TOP VIEW (Not to Scale) 14 13 12 11 10 9 Figure 2. Table 7. Terminology Term VDD IDD GND S D IN VD, VS RON RFLAT (ON) RON IS (OFF) ID (OFF) ID, IS (ON) VINL VINH IINL (IINH) CS (OFF) CD (OFF) CD, CS (ON) CIN tON tOFF tBBM Charge Injection Off Isolation Crosstalk -3 dB Bandwidth On Response Insertion Loss THD + N Definition Most positive power supply potential. Positive supply current. Ground (0 V) reference. Source terminal. May be an input or output. Drain terminal. May be an input or output. Logic control input. Analog voltage on Terminals D, S. Ohmic resistance between D and S. Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. On resistance match between any two channels, i.e., RON max - RON min. Source leakage current with the switch off. Drain leakage current with the switch off. Channel leakage current with the switch on. Maximum input voltage for Logic 0. Minimum input voltage for Logic 1. Input current of the digital input. Off switch source capacitance. Measured with reference to ground. Off switch drain capacitance. Measured with reference to ground. On switch capacitance. Measured with reference to ground. Digital input capacitance. Delay time between the 50% and the 90% points of the digital input and switch on condition. Delay time between the 50% and the 90% points of the digital input and switch off condition. On or off time measured between the 80% points of both switches, when switching from one to another. A measure of the glitch impulse transferred from the digital input to the analog output during on-to-off switching. A measure of unwanted signal coupling through an off switch. A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. The frequency at which the output is attenuated by 3 dB. The frequency response of the on switch. The loss due to the on resistance of the switch. The ratio of the harmonic amplitudes plus noise of a signal to the fundamental. Rev. A | Page 7 of 16 ADG811/ADG812/ADG813 TYPICAL PERFORMANCE CHARACTERISTICS 0.60 TA = 25C 0.55 VDD = 3V 0.50 VDD = 2.7V 1.2 VDD = 3.3V 1.0 ON RESISTANCE () ON RESISTANCE () 0.45 0.40 VDD = 3.6V 0.35 0.30 0.25 04306-A-003 0.8 +125C +85C 0.6 VDD = 3.3V 0.4 +25C -40C 0.2 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 0.5 1.0 1.5 VD, VS (V) 2.0 2.5 3.0 VD, VS (V) Figure 3. On Resistance vs. VD (VS), VDD = 2.7 V to 3.6 V Figure 6. On Resistance vs. VD (VS) for Different Temperatures, VDD = 3.3 V 0.8 TA = 25C 0.7 ON RESISTANCE () 1.2 VDD = 2.5V VDD = 2.3V ON RESISTANCE () 1.0 +125C 0.8 +85C 0.6 +25C -40C 0.6 0.5 VDD = 2.5V VDD = 2.7V 0.4 0.4 0.3 0.2 04306-A-004 0 0.5 1.0 1.5 VD, VS (V) 2.0 2.5 0 0.5 1.0 1.5 VD, VS (V) 2.0 2.5 Figure 4. On Resistance vs. VD (VS), VDD = 2.5 V 0.2 V Figure 7. On Resistance vs. VD (VS) for Different Temperatures, VDD = 2.5 V 1.8 TA = 25C 1.6 VDD = 1.65V 1.4 ON RESISTANCE () 1.4 VDD = 1.8V 1.2 +25C +125C ON RESISTANCE () -40C 1.0 1.2 VDD = 1.8V 1.0 0.8 0.6 VDD = 1.95V 0.4 04306-A-005 0.8 0.6 +85C 0.4 0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VD, VS (V) VD, VS (V) Figure 5. On Resistance vs. VD (VS), VDD = 1.8 V 0.15 V Figure 8. On Resistance vs. VD (VS) for Different Temperatures, VDD = 1.8 V Rev. A | Page 8 of 16 04306-A-008 0.2 0 04306-A-007 0.2 0 04306-A-006 0.20 0 ADG811/ADG812/ADG813 10 0 -10 ID (OFF) CURRENT (nA) 120 VDD = 3.3V IS (OFF) 100 TA = 25C -20 QINJ (pC) 80 VCC = 3.6V 60 -30 ID, IS (ON) -40 -50 -60 40 VCC = 2.5V 20 -70 VCC = 1.8V 04306-A-009 04306-A-012 04306-A-014 04306-A-013 -80 0 20 40 60 80 100 120 140 TEMPERATURE (C) 0 0 0.5 1.0 1.5 2.0 VS (V) 2.5 3.0 3.5 4.0 Figure 9. Leakage Currents vs. Temperature, VDD = 3.3 V Figure 12. Charge Injection vs. Source Voltage 10 VDD = 2.5V 0 ID (OFF) -10 35 30 tON 25 TIME (ns) VCC = 1.8V VCC = 2.5V VCC = 3V CURRENT (nA) IS (OFF) -20 ID, IS (ON) -30 20 15 -40 10 VDD = 2.5V tOFF -50 VDD = 1.8V VCC = 3V 5 04306-A-010 -60 0 20 40 60 80 100 120 140 TEMPERATURE (C) 0 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) Figure 10. Leakage Currents vs. Temperature, VDD = 2.5 V Figure 13. tON/tOFF Times vs. Temperature 0 VDD = 1.8V -10 ID (OFF) 1 0 -1 -2 LEAKAGE (nA) -20 IS (OFF) -30 ID, IS (ON) -40 ATTENUATION (dB) -3 -4 -5 -6 -7 TA = 25C VCC = 3.3V/2.5V/1.8V -50 -8 -9 0 20 40 60 80 100 120 140 04306-A-011 -60 TEMPERATURE (C) -10 0.01 0.1 1 10 100 1000 FREQUENCY (MHz) Figure 11. Leakage Currents vs. Temperature, VDD = 1.8 V Figure 14. Bandwidth Rev. A | Page 9 of 16 ADG811/ADG812/ADG813 0 -10 -20 TA = 25C VCC = 3.3V/2.5V/1.8V 0.06 0.08 VDD = 2.5V TA = 25C 32 LOAD 1.5V p-p ATTENUATION (dB) -30 -40 -50 -60 -70 -80 04306-A-015 04306-A-017 THD+N (%) 0.05 0.04 -90 0.01 0.02 20 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) 0.1 1 10 100 1000 FREQUENCY (MHz) Figure 15. Crosstalk vs. Frequency 0 -10 -20 ATTENUATION (dB) -30 -40 -50 -60 -70 -80 -90 0.1 1 10 100 1000 04306-A-016 Figure 17. Total Harmonic Distortion TA = 25C VCC = 3.3V/2.5V/1.8V -100 0.01 FREQUENCY (MHz) Figure 16. Off Isolation vs. Frequency Rev. A | Page 10 of 16 ADG811/ADG812/ADG813 TEST CIRCUITS IDS V1 IS (OFF) A 04306-A-018 S D S D ID (OFF) A VD 04306-A-019 ID (ON) VD 04306-A-020 NC S D A VS RON = V1/IDS VS Figure 18. On Resistance Figure 19. Off Leakage Figure 20. On Leakage VDD 0.1F ADG811 VDD S VS D RL IN GND 50 VOUT CL 35pF VIN VIN 50% 50% ADG812 VOUT 50% 90% 50% 90% 04306-A-021 tON tOFF Figure 21. Switching Times VDD 0.1F VDD VS1 VS2 S1 S2 IN1, IN2 VIN GND D1 D2 RL2 50 VOUT2 CL2 35pF RL1 50 CL1 35pF VOUT1 VIN VOUT 80% 80% 04306-A-022 50% 0V 50% tBBM tBBM Figure 22. Break-Before-Make Time Delay, tBBM (ADG813) VDD SW ON VDD RS VS S D CL 1nF VOUT GND VOUT QINJ = CL x VOUT 04306-A-023 SW OFF VIN VOUT IN Figure 23. Charge Injection Rev. A | Page 11 of 16 ADG811/ADG812/ADG813 VDD 0.1F NETWORK ANALYZER 50 S 50 D RL 50 VDD VS VDD GND OFF ISOLATION = 20 LOG VOUT VS Figure 24. Off Isolation VDD 0.1F NETWORK ANALYZER 50 S VS D RL 50 VDD VDD GND INSERTION LOSS = 20 LOG VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 25. Bandwidth VDD 0.1F NETWORK ANALYZER VOUT S1 RL 50 50 VS GND 04306-A-026 VDD S2 D RL 50 CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG VOUT VS Figure 26. Channel-to-Channel Crosstalk Rev. A | Page 12 of 16 04306-A-025 04306-A-024 ADG811/ADG812/ADG813 OUTLINE DIMENSIONS 5.10 5.00 4.90 16 9 4.50 4.40 4.30 1 8 6.40 BSC PIN 1 1.20 MAX 0.20 0.09 0.65 BSC 0.30 0.19 COPLANARITY 0.10 SEATING PLANE 8 0 0.75 0.60 0.45 0.15 0.05 COMPLIANT TO JEDEC STANDARDS MO-153AB Figure 27. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters ORDERING GUIDE Model ADG811YRU ADG811YRU-REEL ADG811YRU-REEL7 AADG812YRU ADG812YRU-REEL ADG812YRU-REEL7 ADG813YRU ADG813YRU-REEL ADG813YRU-REEL7 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Package Option RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 RU-16 Rev. A | Page 13 of 16 ADG811/ADG812/ADG813 NOTES Rev. A | Page 14 of 16 ADG811/ADG812/ADG813 NOTES Rev. A | Page 15 of 16 ADG811/ADG812/ADG813 NOTES (c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C04306-0-5/04(A) Rev. A | Page 16 of 16 |
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