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PACKAGED ULTRA LOW NOISE PHEMT * FEATURES 0.7 dB Noise Figure at 12 GHz 12 dB Associated Gain at 12 GHz 0.4 dB Noise Figure at 2 GHz 18 dB Associated Gain at 2 GHz Low DC Power Consumption: 30mW
LP7512P70
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DESCRIPTION AND APPLICATIONS The LP7512P70 is a packaged Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs) Pseudomorphic High Electron Mobility Transistor (PHEMT), utilizing an Electron-Beam direct-write 0.25 m by 200 m Schottky barrier gate. The recessed "mushroom" Ti/Pt/Au gate structure minimizes parasitic gate-source and gate resistances. The epitaxial structure and processing have been optimized for optimum low noise performance. The LP7512's active areas are passivated with Si3 N4 , and the P70 ceramic package is ideal for low-cost, high-performance applications that require a surface-mount package. Typical applications include low noise receiver preamplifiers in wireless systems.
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ELECTRICAL SPECIFICATIONS @ TAmbient = 25C*
Parameter Saturated Drain-Source Current** Noise Figure Associated Gain at minimum NF Transconductance Gate-Source Leakage Current Gate-Drain Leakage Current Symbol IDSS NF GA GM IGSO IGDO Test Conditions VDS = 2 V; VGS = 0 V VDS = 2 V; IDS = 25% IDSS VDS = 2 V; IDS = 25% IDSS VDS = 2 V; VGS = 0 V VGS = -3 V VGS = -3 V -0.2 11 60 Min 15 0.7 12 90 1 1 -0.4 15 15 -1.5 Typ Max 30 1.0 Units mA dB dB mS A A V
Pinch-Off Voltage VP VDS = 2 V; IDS = 1 mA *frequency=18 GHz, unless otherwise noted **Formerly binned as: LP7512P70-1 = 15-30 mA and LP7512P70-2 = 31-50 mA
Phone: (408) 988-1845 Fax: (408) 970-9950
http:// www.filss.com
Revised: 1/20/01 Email: sales@filss.com
PACKAGED ULTRA LOW NOISE PHEMT * ABSOLUTE MAXIMUM RATINGS
Parameter Drain-Source Voltage Gate-Source Voltage Drain-Source Current Gate Current RF Input Power Channel Operating Temperature Storage Temperature Total Power Dissipation Notes: * * Symbol VDS VGS IDS IG PIN TCH TSTG PTOT Test Conditions TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C TAmbient = 22 3 C -- TAmbient = 22 3 C -65 Min Max 4 -2 IDSS 2 50 175 175 300 Units V V mA mA mW C C mW
LP7512P70
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Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device. Power Dissipation defined as: PTOT (PDC + PIN) - POUT, where PDC: DC Bias Power PIN: RF Input Power POUT: RF Output Power Absolute Maximum Power Dissipation to be de-rated as follows above 25C: PTOT= 300mW - (3.5mW/C) x THS where THS = heatsink or ambient temperature.
This PHEMT is susceptible to damage from Electrostatic Discharge. Proper precautions should be used when handling these devices.
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HANDLING PRECAUTIONS To avoid damage to the devices care should be exercised during handling. Proper Electrostatic Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and testing. These devices should be treated as Class 1A (0-500 V). Further information on ESD control measures can be found in MIL-STD-1686 and MIL-HDBK-263. APPLICATIONS NOTES & DESIGN DATA Applications Notes are available from your local Filtronic Sales Representative or directly from the factory. Complete design data, including S-parameters, noise data, and large-signal models are available on the Filtronic web site.
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Phone: (408) 988-1845 Fax: (408) 970-9950
http:// www.filss.com
Revised: 1/20/01 Email: sales@filss.com
PACKAGED ULTRA LOW NOISE PHEMT * PACKAGE OUTLINE
(dimensions in mils)
LP7512P70
All information and specifications are subject to change without notice. Phone: (408) 988-1845 Fax: (408) 970-9950 http:// www.filss.com Revised: 1/20/01 Email: sales@filss.com

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