View SNJ54ALVTHR16245W_242692.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

SN54ALVTHR16245, SN74ALVTHR16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCES075D - JUNE 1996 - REVISED DECEMBER 2002
D D D D D D D D D D D
State-of-the-Art Advanced BiCMOS Technology (ABT) Widebus Design for 2.5-V and 3.3-V Operation and Low Static-Power Dissipation Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC ) Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25C High Drive (-12/12 mA at 3.3-V VCC) Ioff and Power-Up 3-State Support Hot Insertion Use Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From Floating Output Ports Have Equivalent 30- Series Resistors, So No External Resistors Are Required Flow-Through Architecture Facilitates Printed Circuit Board Layout Distributed VCC and GND Pins Minimize High-Speed Switching Noise Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101)
SN54ALVTHR16245 . . . WD PACKAGE SN74ALVTHR16245 . . . DGG, DGV, OR DL PACKAGE (TOP VIEW)
1DIR 1B1 1B2 GND 1B3 1B4 VCC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 VCC 2B5 2B6 GND 2B7 2B8 2DIR
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1OE 1A1 1A2 GND 1A3 1A4 VCC 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCC 2A5 2A6 GND 2A7 2A8 2OE
description/ordering information
The 'ALVTHR16245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for 2.5-V or 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. ORDERING INFORMATION
TA PACKAGE SSOP - DL TSSOP - DGG -40C to 85C 40C TVSOP - DGV VFBGA - GQL Tape and reel Tape and reel Tape and reel Tape and reel ORDERABLE PART NUMBER SN74ALVTHR16245LR SN74ALVTHR16245GR SN74ALVTHR16245VR SN74ALVTHR16245KR TOP-SIDE MARKING ALVTHR16245 ALVTHR16245 TR245 TR245
-55C to 125C CFP - WD Tube SNJ54ALVTHR16245W SNJ54ALVTHR16245W Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303
Copyright 2002, Texas Instruments Incorporated
* DALLAS, TEXAS 75265
1
SN54ALVTHR16245, SN74ALVTHR16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCES075D - JUNE 1996 - REVISED DECEMBER 2002
description/ordering information (continued)
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. All outputs are designed to sink up to 12 mA, and include equivalent 30- resistors to reduce overshoot and undershoot. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. When VCC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
SN74ALVTHR16245 . . . GQL PACKAGE (TOP VIEW) 1 A B C D E F G H J K 2 3 4 5 6
terminal assignments
1 A B C D E F G H J K 1DIR 1B2 1B4 1B6 1B8 2B1 2B3 2B5 2B7 2DIR 2 NC 1B1 1B3 1B5 1B7 2B2 2B4 2B6 2B8 NC GND VCC GND NC GND VCC GND NC 3 NC GND VCC GND 4 NC GND VCC GND 5 NC 1A1 1A3 1A5 1A7 2A2 2A4 2A6 2A8 NC 6 1OE 1A2 1A4 1A6 1A8 2A1 2A3 2A5 2A7 2OE
NC - No internal connection FUNCTION TABLE (each 8-bit section) INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation
2
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54ALVTHR16245, SN74ALVTHR16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCES075D - JUNE 1996 - REVISED DECEMBER 2002
logic diagram (positive logic)
1DIR 1 2DIR 48 24
1OE
25
2OE
1A1
47
2A1
36
2
1B1
13
2B1
To Seven Other Channels Pin numbers shown are for the DGG, DGV, DL, and WD packages.
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Voltage range applied to any output in the high or power-off state, VO (see Note 1) . . . . . . . . . -0.5 V to 7 V Output current in the low state, IO: SN54ALVTHR16245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74ALVTHR16245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Output current in the high state, IO: SN54ALVTHR16245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -48 mA SN74ALVTHR16245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -64 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Package thermal impedance, JA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63C/W GQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
3
SN54ALVTHR16245, SN74ALVTHR16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCES075D - JUNE 1996 - REVISED DECEMBER 2002
recommended operating conditions, VCC = 2.5 V 0.2 V (see Note 3)
SN54ALVTHR16245 MIN VCC VIH VIL VI IOH IOL t/v Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise or fall rate Outputs enabled 0 VCC 2.3 1.7 0.7 5.5 -6 6 10 0 VCC TYP MAX 2.7 SN74ALVTHR16245 MIN 2.3 1.7 0.7 5.5 -8 12 10 TYP MAX 2.7 UNIT V V V V mA mA ns/V
t/VCC Power-up ramp rate 200 200 s/V TA Operating free-air temperature -55 125 -40 85 C NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
recommended operating conditions, VCC = 3.3 V 0.3 V (see Note 3)
SN54ALVTHR16245 MIN VCC VIH VIL VI IOH IOL t/v t/VCC TA Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise or fall rate Power-up ramp rate Operating free-air temperature Outputs enabled 200 -55 125 0 VCC 3 2 0.8 5.5 -8 8 10 200 -40 85 0 VCC TYP MAX 3.6 SN74ALVTHR16245 MIN 3 2 0.8 5.5 -12 12 10 TYP MAX 3.6 UNIT V V V V mA mA ns/V s/V C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
4
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54ALVTHR16245, SN74ALVTHR16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCES075D - JUNE 1996 - REVISED DECEMBER 2002
electrical characteristics over recommended operating free-air temperature range, VCC = 2.5 V 0.2 V (unless otherwise noted)
PARAMETER VIK VOH TEST CONDITIONS VCC = 2.3 V, VCC = 2.3 V to 2.7 V, VCC = 2 3 V 2.3 VCC = 2.3 V to 2.7 V, VOL VCC = 2 3 V 2.3 Control inputs II A or B ports Ioff IBHL IBHH IBHLO IBHHO# IEX|| IOZ(PU/PD)k VCC = 2.7 V VCC = 0, VCC = 2.3 V, VCC = 2.3 V, VCC = 2.7 V, VCC = 2.7 V, VCC = 2.3 V, VCC = 2.7 V, VCC = 0 or 2.7 V, II = -18 mA IOH = -100 A IOH = -6 mA IOH = -8 mA IOL = 100 A IOL = 6 mA IOL = 12 mA VI = VCC or GND VI = 5.5 V VI = 5.5 V VI = VCC VI = 0 VI or VO = 0 to 4.5 V VI = 0.7 V VI = 1.7 V VI = 0 to VCC VI = 0 to VCC VO = 5.5 V 300 -300 125 100 0.04 2.5 0.04 3.5 0.1 4.5 0.1 0.04 2.5 0.04 3.5 115 -10 300 -300 125 100 0.1 4.5 0.1 pF mA SN54ALVTHR16245 MIN TYP MAX -1.2 VCC-0.2 1.7 0.2 0.7 0.7 1 10 20 1 -5 115 -10 1 10 20 1 -5 100 A A A A A A A A VCC-0.2 V 1.7 0.2 V SN74ALVTHR16245 MIN TYP MAX -1.2 UNIT V
VCC 1.2 V, VO = 0.5 V to VCC, VI = GND or VCC, OE = don't care VCC = 2.7 V, IO = 0, VI = VCC or GND VCC = 2.5 V, VCC = 2.5 V, Outputs high Outputs low Outputs disabled VI = 2.5 V or 0 VO = 2.5 V or 0
ICC Ci
Cio 8 8 pF All typical values are at VCC = 2.5 V, TA = 25C. The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND and then raising it to VIL max. The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to VCC and then lowering it to VIH min. An external driver must source at least IBHLO to switch this node from low to high. # An external driver must sink at least IBHHO to switch this node from high to low. || Current into an output in the high state when VO > VCC k High-impedance state during power up or power down
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
5
SN54ALVTHR16245, SN74ALVTHR16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCES075D - JUNE 1996 - REVISED DECEMBER 2002
electrical characteristics over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted)
PARAMETER VIK VOH TEST CONDITIONS VCC = 3 V, VCC = 3 V to 3.6 V, VCC = 3 V VCC = 3 V to 3.6 V, VOL VCC = 3 V Control inputs II A or B ports Ioff IBHL IBHH IBHLO IBHHO# IEX|| IOZ(PU/PD)k VCC = 3.6 V VCC = 0, VCC = 3 V, VCC = 3 V, VCC = 3.6 V, VCC = 3.6 V, VCC = 3 V, VCC = 3.6 V, VCC = 0 or 3.6 V, II = -18 mA IOH = -100 A IOH = -8 mA IOH = -12 mA IOL = 100 A IOL = 8 mA IOL = 12 mA VI = VCC or GND VI = 5.5 V VI = 5.5 V VI = VCC VI = 0 VI or VO = 0 to 4.5 V VI = 0.8 V VI = 2 V VI = 0 to VCC VI = 0 to VCC VO = 5.5 V 75 -75 500 -500 125 100 0.07 3.5 0.07 0.1 5 0.1 0.4 3.5 3.5 0.07 3.5 0.07 SN54ALVTHR16245 MIN TYP MAX -1.2 VCC-0.2 2 0.2 0.8 0.8 1 10 20 1 -5 75 -75 500 -500 125 100 0.1 5 0.1 0.4 mA pF mA 1 10 20 1 -5 100 A A A A A A A A VCC-0.2 V 2 0.2 V SN74ALVTHR16245 MIN TYP MAX -1.2 UNIT V
VCC 1.2 V, VO = 0.5 V to VCC, VI = GND or VCC, OE = don't care VCC = 3.6 V, IO = 0, VI = VCC or GND Outputs high Outputs low Outputs disabled
ICC ICCh Ci
VCC = 3 V to 3.6 V, One input at VCC - 0.6 V, Other inputs at VCC or GND VCC = 3.3 V, VCC = 3.3 V, VI = 3.3 V or 0 VO = 3.3 V or 0
Cio 8 8 pF All typical values are at VCC = 3.3 V, TA = 25C. The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND and then raising it to VIL max. The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to VCC and then lowering it to VIH min. An external driver must source at least IBHLO to switch this node from low to high. # An external driver must sink at least IBHHO to switch this node from high to low. || Current into an output in the high state when VO > VCC k High-impedance state during power up or power down h This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
6
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54ALVTHR16245, SN74ALVTHR16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCES075D - JUNE 1996 - REVISED DECEMBER 2002
switching characteristics over recommended operating free-air temperature range, CL = 30 pF, VCC = 2.5 V 0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) A or B TO (OUTPUT) B or A A or B A or B SN54ALVTHR16245 MIN 0.5 0.5 1.8 1.6 1.7 1.4 MAX 4.3 3.7 5.6 4.7 5 4.4 SN74ALVTHR16245 MIN 0.5 0.5 1.8 1.6 1.7 1.4 MAX 4.3 3.7 5.6 4.7 5 4.4 UNIT ns ns ns
OE OE
switching characteristics over recommended operating free-air temperature range, CL = 50 pF, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 2)
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) A or B TO (OUTPUT) B or A A or B A or B SN54ALVTHR16245 MIN 0.5 0.5 1.3 1.3 2 1.5 MAX 3.7 3.9 5.2 4 5.1 4.8 SN74ALVTHR16245 MIN 0.5 0.5 1.3 1.3 2 1.5 MAX 3.7 3.9 5.2 4 5.1 4.8 UNIT ns ns ns
OE OE
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
7
SN54ALVTHR16245, SN74ALVTHR16245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCES075D - JUNE 1996 - REVISED DECEMBER 2002
PARAMETER MEASUREMENT INFORMATION
2 x VCC From Output Under Test CL (see Note A) RL RL S1 Open GND TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH VCC 2.5 V 0.2 V 3.3 V 0.3 V CL 30 pF 50 pF S1 Open 2 x VCC GND
LOAD CIRCUIT
RL 500 500
V 0.15 V 0.3 V
VCC Timing Input tw VCC Input VCC/2 VCC/2 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Data Input tsu VCC/2 th VCC VCC/2 0V VCC/2 0V
VCC Input tPLH Output tPHL VCC/2 VCC/2 VCC/2 VCC/2 0V tPHL VOH VCC/2 VOL tPLH VOH Output VCC/2 VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS
Output Control tPZL Output Waveform 1 S1 at 2 x VCC (see Note B) tPZH Output Waveform 2 S1 at GND (see Note B)
VCC VCC/2 VCC/2 0V tPLZ VCC VCC/2 VOL + V tPHZ VCC/2 VOH - V VOH 0 V VOL
VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2 ns, tf 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
5-Sep-2005
PACKAGING INFORMATION
Orderable Device 74ALVTHR16245GRE4 74ALVTHR16245VRE4 74ALVTHR16245ZQLR SN74ALVTHR16245DL SN74ALVTHR16245GR SN74ALVTHR16245KR SN74ALVTHR16245LR SN74ALVTHR16245VR
(1)
Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type TSSOP TVSOP VFBGA SSOP TSSOP VFBGA SSOP TVSOP
Package Drawing DGG DGV ZQL DL DGG GQL DL DGV
Pins Package Eco Plan (2) Qty 48 48 56 48 48 56 48 48 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 1000 25 Pb-Free (RoHS) Green (RoHS & no Sb/Br)
Lead/Ball Finish CU NIPDAU CU NIPDAU SNAGCU CU NIPDAU CU NIPDAU SNPB CU NIPDAU CU NIPDAU
MSL Peak Temp (3) Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-240C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
2000 Green (RoHS & no Sb/Br) 1000 TBD 1000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS006C - FEBRUARY 1996 - REVISED AUGUST 2000
DGV (R-PDSO-G**)
24 PINS SHOWN 0,23 0,13 13
PLASTIC SMALL-OUTLINE
0,40 24
0,07 M
0,16 NOM 4,50 4,30 6,60 6,20
Gage Plane
0,25 0- 8 1 A 12 0,75 0,50
Seating Plane 1,20 MAX 0,15 0,05 0,08
PINS ** DIM A MAX A MIN
14 3,70 3,50
16 3,70 3,50
20 5,10 4,90
24 5,10 4,90
38 7,90 7,70
48 9,80 9,60
56 11,40 11,20
4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins - MO-153 14/16/20/56 Pins - MO-194
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C - JANUARY 1995 - REVISED DECEMBER 2001
DL (R-PDSO-G**)
48 PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0.025 (0,635)
0.0135 (0,343) 0.008 (0,203) 25
0.005 (0,13) M
48
0.010 (0,25) 0.005 (0,13)
0.299 (7,59) 0.291 (7,39) 0.420 (10,67) 0.395 (10,03)
Gage Plane 0.010 (0,25)
1 A
24
0- 8 0.040 (1,02) 0.020 (0,51)
Seating Plane 0.110 (2,79) MAX 0.008 (0,20) MIN 0.004 (0,10)
PINS ** DIM A MAX
28 0.380 (9,65) 0.370 (9,40)
48 0.630 (16,00) 0.620 (15,75)
56 0.730 (18,54) 0.720 (18,29) 4040048 / E 12/01
A MIN
NOTES: A. B. C. D.
All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). Falls within JEDEC MO-118
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D - JANUARY 1995 - REVISED JANUARY 1998
DGG (R-PDSO-G**)
48 PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,50 48
0,27 0,17 25
0,08 M
6,20 6,00
8,30 7,90
0,15 NOM
Gage Plane 0,25 0- 8 A 0,75 0,50
1
24
Seating Plane 1,20 MAX 0,15 0,05 0,10
PINS ** DIM A MAX
48
56
64
12,60
14,10
17,10
A MIN
12,40
13,90
16,90 4040078 / F 12/97
NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold protrusion not to exceed 0,15. Falls within JEDEC MO-153
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Amplifiers Data Converters DSP Interface Logic Power Mgmt Microcontrollers amplifier.ti.com dataconverter.ti.com dsp.ti.com interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com Applications Audio Automotive Broadband Digital Control Military Optical Networking Security Telephony Video & Imaging Wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2005, Texas Instruments Incorporated www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless

▲Up To Search▲

Price & Availability of SNJ54ALVTHR16245W

	To Download SNJ54ALVTHR16245W Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .