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| (R) VNQ500PEP QUAD CHANNEL HIGH SIDE DRIVER TARGET SPECIFICATION TYPE VNQ500PEP s s RDS(on) 500 m IOUT 0.35 A VCC 36V CMOS COMPATIBLE I/O's CHIP ENABLE s JUNCTION OVERTEMPERATURE PROTECTION s CURRENT LIMITATION s SHORTED LOAD PROTECTION s UNDERVOLTAGE SHUTDOWN s PROTECTION AGAINST LOSS OF GROUND s VERY LOW STAND-BY CURRENT DESCRIPTION The VNQ500PEP is a monolithic device designed in STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active current limitation combined with latched thermal shutdown, protect the device against overload. Device automatically turns off in case of ground pin disconnection. ABSOLUTE MAXIMUM RATING Symbol VCC -VCC - IGND IOUT - IOUT IIN VESD Tj Tstg Parameter DC Supply voltage Reverse supply voltage DC Ground pin reverse current DC Output current Reverse DC output current DC Input current Electrostatic discharge (R=1.5K; C=100pF) - I/On - OUTn & Vcc Junction operating temperature Storage temperature PowerSSO-12 ORDER CODES PACKAGE TUBE T&R PowerSSO-12 VNQ500PEP VNQ500PEP13TR APPLICATION s Relay Driver s LED Driver Value 41 -0.3 - 250 Internally Limited -1 +/- 10 4000 5000 Internally Limited - 55 to 150 Unit V V mA A A mA V V C C October 2003 - Revision 1.3 (Working document) 1/11 This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice. VNQ500PEP BLOCK DIAGRAM VCC UNDERVOLTAGE DETECTION VCC CLAMP CE GND I/O 1 CLAMP POWER I/O 2 OUTPUT 1 LOGIC I/O 3 CURRENT LIMITER I/O 4 JUNCTION TEMP. DETECTION Same structure for all channels OUTPUT 2 OUTPUT 3 OUTPUT 4 PIN DEFINITIONS AND FUNCTIONS Pin No TAB 7,12 1 2 3 4 5 6 8 9 10 11 Symbol VCC VCC GND CE I/O 1 I/O 2 I/O 3 I/O 4 OUTPUT 4 OUTPUT 3 OUTPUT 2 OUTPUT 1 Function Positive power supply voltage Positive power supply voltage Logic ground Chip Enable Input/Output of channel 1 Input/Output of channel 2 Input/Output of channel 3 Input/Output of channel 4 High-Side output of channel 4 High-Side output of channel 3 High-Side output of channel 2 High-Side output of channel 1 2/11 1 VNQ500PEP CONNECTION DIAGRAM (TOP VIEW) GND CE I/O1 I/O2 I/O3 I/O4 1 2 3 4 5 6 12 11 10 9 8 7 Vcc OUTPUT1 OUTPUT2 OUTPUT3 OUTPUT4 Vcc TAB = Vcc CURRENT AND VOLTAGE CONVENTIONS ICC IINn I/On VCC OUTPUTn IOUTn ICE CE GND VINn VCE IGND VOUTn VCC 3/11 VNQ500PEP THERMAL DATA Symbol Rthj-case Rthj-amb Parameter Thermal resistance junction-case Thermal resistance junction-ambient (*) Max Max Value 4.6 60 Unit C/W C/W (*) When mounted on FR4 printed circuit board with 0.5 cm2 of copper area (at least 35 thick) connected to all TAB pins. ELECTRICAL CHARACTERISTICS (8V IOUTn=0.25A; Tj=25C IOUTn=0.25A VCE=VI/On=0V; VCC=13V; Tcase=25C On state (all channels ON); VCC=13V VCC=VCE=VI/On=VGND=13V VOUTn=0V VI/On=VOUTn=0V VI/On=0V, VOUTn=0V, VCC=13V; Tcase=25C IS Supply current ILGND(**) IL(off)(**) ILoff2(**) Output current at turn-off Off state output current Off state output current (**) Per channel SWITCHING (VCC=13V) Symbol ton toff dVOUT/ dt(on) dVOUT/ dt(off) Parameter Turn-on time Turn-off time Turn-on voltage slope Turn-off voltage slope Test Conditions RL=52 from 80% VOUT (*) RL=52 to 10% VOUT (*) RL=52 from VOUT=1.3V to VOUT=10.4V (*) RL=52 from VOUT=11.7V to VOUT=1.3V (*) Min Typ 50 75 0.3 0.3 Max Unit s s V/s V/s (*) see fig.1a :switching time waveforms INPUT & CE PINS Symbol VINL IINL VINH IINH VI(hyst) VICL VOL Parameter I/O low level Low level I/O current I/O high level High level I/O current I/O hysteresis voltage I/O clamp voltage Test Conditions VIN=1.25V VIN=3.25V IIN=1mA IIN=-1mA 0.5 6 6.8 -0.7 0.5 Min 1 3.25 10 8 Typ Max 1.25 Unit V A V A V V V V I/O low level default detecIIN=1mA, latched thermal shutdown tion 4/11 1 VNQ500PEP ELECTRICAL CHARACTERISTICS (continued) PROTECTIONS Symbol TTSD Ilim Vdemag treset Parameter Junction shut-down temperature DC Short circuit current Turn-off output clamp voltage Thermal latch reset time Test Conditions Min 150 VCC=13V; RLOAD=10m IOUT=0.25 A; L=20mH Tj < TTSD (see figure 3 in waveforms) 0.35 Typ 175 Max 200 0.7 Unit C A V s VCC-41 VCC-48 VCC-55 10 5/11 2 VNQ500PEP Switching Time Waveforms Fig. 1a : Turn-on & Turn-off ton VIN toff t VOUT 80% dVOUT/dt(on) tr 10% 90% dVOUT/dt(off) tf t Driving circuit MCOUTn R I/On OUTPUTn MCU VNQ500PEP 6/11 VNQ500PEP TRUTH TABLE CONDITIONS Normal operation Current limitation Overtemperature Undervoltage Stand-by MCOUTn L H L H L H L H X CE H H H H H H H H L I/On L H L H L L (latched) L H X OUTPUTn L H L H L L L L L ELECTRICAL TRANSIENT REQUIREMENTS ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2 I C C C C C C IV C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. 7/11 VNQ500PEP APPLICATION SCHEMATIC +5V VCC Rprot CE Dld C Rprot I/0n OUTPUT GND VGND RGND DGND GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / (IS(on)max). 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggest to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. LOAD DUMP PROTECTION Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table. C I/Os PROTECTION: If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k. 8/11 1 VNQ500PEP Waveforms 1) NORMAL OPERATION CE MCOUTn I/On VOUTn 2) UNDERVOLTAGE CE VCC MCOUTn I/On VOUTn VUSDhyst VUSD 3) SHORTED LOAD OPERATION CE TTSD Tjn MCOUTn I/On IOUTn treset VOL 9/11 VNQ500PEP PowerSSO-12TM MECHANICAL DATA MIN. 1.250 0.000 1.100 0.230 0.190 4.800 3.800 5.800 0.250 0.400 0 1.900 3.600 TYP A A1 A2 B C D E e H h L k X Y ddd A 0.800 IN IM PR EL 10/11 RY MAX. 1.620 0.100 1.650 0.410 0.250 5.000 4.000 6.200 0.500 1.270 8 2.500 4.200 0.100 DIM. mm. VNQ500PEP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 11/11 |
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