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| CXA3174N AGC IF for GSM/PCS For the availability of this product, please contact the sales office. Description The CXA3174N is a 4-bit digital control variable gain amplifier suitable for the communications. Features * Gain control amplifier with the wide gain variable range * Doubler circuit for the LO (local) signal eliminates need for the phase shifter Functions * IF signal gain control circuit * I/Q quadrature demodulator * Doubler circuit for the LO signal * Gain control by the 4-bit digital data * Power saving Applications GSM and PCS portable telephones Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta = 25 C) * Supply voltage VCC 14 * Operating temperature range Topr -35 to +80 * Storage temperature range Tstg -65 to +150 Operating Conditions Supply voltage VCC 20 pin SSOP (Plastic) V C C 2.7 to 3.3 V Block Diagram and Package Outline IXOUT IOUT GND VCC IFIN IFINX NC NC NC 20 19 18 17 16 15 14 13 12 11 Reg Gain Control AMP Phase Shifter Gain Cont x2 1 QXOUT 2 QOUT 3 NC 4 LOIN 5 NC 6 VC4 7 VC3 8 VC2 9 VC1 10 Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. --1-- E96932A8Z NC PS CXA3174N Pin Description Pin No. 1 Symbol Pin voltage Equivalent circuit Description QXOUT VCC Q inverted signal output. 2 QOUT 5.4k Q signal output. 1.5 V 1 2 19 20 GND 19 IOUT I signal output. 20 3 5 10 12 17 18 IXOUT I inverted signal output. NC -- Not connected. VCC 4 LOIN 1.3 V 4 2k 500 Local signal input. 2k GND 6 VC4 VCC AGC control signal input. MSB. 7 VC3 40k AGC control signal input. 3LSB. -- 6 7 8 9 GND 8 VC2 AGC control signal input. 2LSB. 9 VC1 AGC control signal input. LSB. --2-- CXA3174N Pin No. Symbol Pin voltage Equivalent circuit VCC Description 40k 11 PS -- 11 Power saving control. 60k GND VCC 13 IFINX 13 IF inverted signal input. 800 1.25 V 14 1.1k 1.1k 14 IFIN GND IF signal input. 15 16 VCC GND -- -- Power supply. Ground. --3-- CXA3174N Electrical Characteristics Item Current consumption Current consumption for standby IF input frequency range Symbol ICC ICCps IFINf 1, 2 VC1, 2, 3, 4 = all "Low" Temperature fluctuation : 2 dB IF input level : -80 dBm (330 conversion) 1, 2 VC1, 2, 3, 4 = all "High" Temperature fluctuation : 2 dB IF input level : -20 dBm (330 conversion) PS=0 V 5 Conditions Min. VCC = 3.0 V, Ta = 27 C Typ. 10 10 Max. 15 100 20 Unit mA A MHz Maximum gain Gmax 57 60 63 dB Minimum gain Gmin -3 0 -3 dB Gain variable step Gain setting deviation Gain setting time LO input frequency range LO input level I/Q output frequency range I/Q output signal amplitude I/Q output maximum amplitude1 I/Q output maximum amplitude2 I/Q output maximum amplitude3 I/Q output maximum amplitude4 I/Q output amplitude deviation 1 2 Gstep Gdev Gt LOINf LOINv IQf Differential I/Q output amplitude 1, 2 10 k load IF input level : -20 dBm (330 conversion) Gain=0 dB Differential I/Q output amplitude 2 10 k load Gain=60 dB Differential I/Q output amplitude 2 10 k load Gain=40 dB Differential I/Q output amplitude 2 10 k load Gain=20 dB Differential I/Q output amplitude 2 10 k load Gain=0 dB Differential I/Q output amplitude 1, 2 10 k load IF input level : -20 dBm (330 conversion) Gain=0 dB 5 30 -3 4 +3 5 20 55 80 2000 dB dB S MHz mVrms kHz IQv 45 64 91 mVp-p IQvmax1 IQvmax2 IQvmax3 IQvmax4 2.0 2.0 400 210 2.7 2.4 480 250 Vp-p Vp-p mVp-p mVp-p IQvdev -0.5 0.5 dB The IF input level is the value of C4 in the Application Circuit. The measured value is for the differential output. --4-- CXA3174N Item Symbol Conditions Differential I/Q output 1, 2 Min. Typ. Max. Unit I/Q output phase deviation1 IQpdev1 10 k load IF input level : -20 dBm (330 conversion) Gain=0 dB LO input level : 30 mVrms 1, 2 Differential I/Q output 10 k load IF input level : -20 dBm (330 conversion) Gain=0 dB LO input level : 80 mVrms -2.5 2.5 deg I/Q output phase deviation2 IQpdev2 -2.5 2.5 deg I/Q output DC voltage I/Q output DC voltage deviation Noise figure1 Noise figure2 Tertiary intercept point1 Tertiary intercept point2 PS input ON voltage Logic input High voltage Logic input Low voltage Logic input resistance LOIN input resistance IFIN input resistance IFIN input level IQvdc IQvdcd NF 1 NF 2 IP31 IP32 VpsL VCvH VCvL VCr LOINr IFINr IFINv Differential input 330 conversion I-IX, Q-QX Output voltage difference Gain=60 dB Gain=20 dB Gain=60 dB, 330 conversion Gain=20 dB, 330 conversion 1 1 1.4 -30 1.5 1.6 30 22.5 40 V mV dB dB dBm dBm -49 -30 0 2.2 0 30 1.4 1.5 -90 2 2.2 2.6 2.9 -10 0.8 VCC+0.3 0.8 V V V k k k dBm --5-- CXA3174N Design Reference Item LOIN input capacitance IFIN input capacitance 1 2 Symbol LOINc IFINc Differential input Conditions Min. Typ. 2 1.2 Max. Unit pF pF The IF input level is the value of C4 in the Application Circuit. The measured value is for the differential output. Control 1 Pin 11 (PS) H L Power saving Power saving off on IC status Active Sleep Control 2 Pin No. Symbol MAX Gain setting 6 VC4 MSB L L L L L L L L H H H H H H H H 7 VC3 3LSB L L L L H H H H L L L L H H H H 8 VC2 2LSB L L H H L L H H L L H H L L H H 9 VC1 LSB L H L H L H L H L H L H L H L H 4-bit display "0000" "0001" "0010" "0011" "0100" "0101" "0110" "0111" "1000" "1001" "1010" "1011" "1100" "1101" "1110" "1111" Setting gain (dB) 60 56 52 48 44 40 36 32 28 24 20 16 12 8 4 0 MIN Note on Operation Take care to handle the IC because the electrostatic discharge strength is weak for Pins 6, 7, 8, 9 and 11. --6-- CXA3174N Gain control characteristics VCC=3.0V, Ta=27C 60 50 Upper 40 Gain (dB) 30 6dB width 20 Lower 10 0 1111 1010 0101 0000 Gain setting value (4bits) Example of gain control temperature characteristics VCC=3.0V 60 -35C Rt 80C 50 40 Gain (dB) 30 20 10 0 1111 1010 0101 0000 Gain setting value (4bits) --7-- CXA3174N Electrical Characteristics Measurement Circuit 10k S1 R1 10k R2 IXOUT 10k R4 IOUT S7 S8 1 C6 C2 C4 C5 1 P19 IOUT IOUT IXOUT P20 IXOUT GND GND QXOUT QXOUT C1 P1 1 C1 C3 20 1 QXOUT 10k R3 GND GND QOUT C2 QOUT 1 P2 19 2 S2 QOUT Phase Shifter GND GND 18 3 NC NC LOIN P4 C5 S3 17 GND 4 LOIN C3 R5 50 1 GND LOIN NC C6 10 C7 GND x2 Gain Control AMP GND GND 1000p 16 5 NC GND P15 VCC 15 VC4 P6 VC4 P14 VCC C8 0.01 C9 1000p 390 R6 GND IFIN 6 S6 VC3 P7 VC3 14 7 Gain Cont IFIN C10 13 R7 C4 280 S5 IF VC2 P8 VC2 8 IFINX 1000p S4 12 VC1 P9 VC1 P13 NC GND IFINX 9 Reg GND P11 PS 10 11 PS NC --8-- CXA3174N Application Circuit QXOUT C1 1 10k QOUT C2 1 10k QOUT GND GND C6 IXOUT 1 20 IXOUT 1 QXOUT GND GND 19 10k C5 IOUT 1 10k GND IOUT 2 Phase Shifter GND 18 3 NC NC GND LOIN C3 5p 5.6 GND 17 4 LOIN 1 NC x2 6.8p to 45p Gain Control AMP GND GND 16 5 NC GND GND 10 1000p 15 VC4 P6 VC4 P15 VCC 6 VCC GND 0.01 VC3 P7 VC3 14 7 Gain Cont IFIN 1000p 390 SAW C4 IF VC2 P8 VC2 13 8 IFINX 1000p GND 12 VC1 P9 VC1 9 Reg NC Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. GND P11 PS 10 11 PS NC --9-- CXA3174N Package Outline Unit : mm 20PIN SSOP (PLASTIC) 6.5 0.1 + 0.2 1.25 - 0.1 0.1 20 11 A 4.4 0.1 1 10 0.65 b 0.13 M + 0.05 0.15 - 0.02 (0.22) 0.1 0.1 b=0.22 0.03 0.5 0.2 DETAIL B : SOLDER (0.15) DETAIL B : PALLADIUM NOTE: Dimension "" does not include mold protrusion. 0 to 10 PACKAGE STRUCTURE DETAIL A PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-20P-L01 SSOP020-P-0044 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER / PALLADIUM PLATING 42/COPPER ALLOY 0.1g NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). --10-- + 0.03 0.15 - 0.01 + 0.1 b=0.22 - 0.05 6.4 0.2 |
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