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UC1910 UC2910 UC3910 4-Bit DAC and Voltage Monitor FEATURES * * * * * Precision 5V Reference 4-Bit Digital-to-Analog (DAC) Converter 0.5% DAC/Reference Combined Error Programmable Undervoltage and Overvoltage Fault Windows Overvoltage Comparator with Complementary SCR Driver and Open Collector Outputs Undervoltage Lockout DESCRIPTION The UC3910 is a complete precision reference and voltage monitor circuit for Intel Pentium(R) Pro and other high-end microprocessor power supplies. It is designed for use in conjunction with the UC3886 PWM. The UC3910 together with the UC3886 converts 5VDC to an adjustable output ranging from 2.0VDC to 3.5VDC in 100mV steps with 1% DC system accuracy. The UC3910 utilizes thin film resistors to ensure high accuracy and stability of its precision circuits. The chip includes a precision 5V voltage reference which is capable of sourcing 10mA to external circuitry. The output voltage of the DAC is derived from this reference, and the accuracy of the DAC/reference combination is 0.5%. Programmable window comparators monitor the supply voltage to indicate that it is within acceptable limits. The window is programmed as a percentage centered around the DAC output. An overvoltage protection comparator is set at a percentage 2 times larger than the programmed lower overvoltage level and drives an external SCR as well as provides an open collector output. Undervoltage lockout protection assures the correct logic states at the outputs during power-up and power-down. * BLOCK DIAGRAM UDG-95097-3 3/97 UC1910 UC2910 UC3910 CONNECTION DIAGRAM DIL-16, SOIC-16 (Top View) J, N, or D Packages ELECTRICAL CHARACTERISTICS Unless otherwise specified, VCC = 12V, VSENSE = 3.5V, VOVTH/UVTH = 1.26V, VD0 = VD1 = VD2 = VD3 = 0V, 0C < TA < 70C for the UC3910, -25C < TA < 80C for the UC2910, -55C < TA < 125C for the UC1910 TA = TJ. PARAMETER Undervoltage Lockout VIN UVLO Turn-on Threshold UVLO Threshold Hysteresis Supply Current IIN Startup IIN DAC/Reference DACOUT Voltage Accuracy D0-D3 Voltage High D0-D3 Input Bias Current VREF Output Voltage VREF Total Variation VREF Sourcing Current DAC Buffer Input Offset Voltage Output Sourcing Current Monitor Circuitry (Note 2) VSENSE UV Threshold Voltage Code 0, Ratio = 0.45 (Note 3) Code 0, Ratio = 0.9 Code 15, Ratio = 0.45 Code 15, Ratio = 0.9 VSENSE OV Threshold Voltage Code 0, Ratio = 0.45 Code 0, Ratio = 0.9 Code 15, Ratio = 0.45 Code 15, Ratio = 0.9 3.174 2.87 1.816 1.635 3.7 3.92 2.116 1.635 3.237 2.975 1.85 1.7 3.763 4.025 2.15 2.3 3.3 3.08 1.884 1.765 3.826 4.13 2.184 2.365 V V V V V V V V IDACBUF = -1mA, 0C < TA < 70C -25 -12 25 -1 mV mA Line, Load, 0C < TA < 70C (Note 1) Line, Load, -55C < TA < 125C DX Pin Floating DX Pin Tied to GND IVREF = 0mA, 0C < TA < 70C Line, Load, 0C < TA < 70C (Note 1) Line, Load, -55C < TA < 125C VREF = 0V -0.9 -1.5 4.6 -140 4.97 4.96 4.925 10 4.85 -105 5 5 5 5.03 5.04 5.075 0.9 1.5 % % V A V V V mA VCC = 5V VCC = 12V 2 10 3.5 12 mA mA 7 50 8 200 9 500 V mV TEST CONDITIONS MIN TYP MAX UNITS 2 UC1910 UC2910 UC3910 ELECTRICAL CHARACTERISTICS (cont.) Unless otherwise specified, VCC = 12V, VSENSE = 3.5V, VOVTH/UVTH = 1.26V, VD0 = VD1 = VD2 = VD3 = 0V, 0C < TA < 70C for the UC3910, -25C < TA < 80C for the UC2910, -55C < TA < 125C for the UC1910 TA = TJ. PARAMETER Monitor Circuitry (Note 2) (cont.) VSENSE OVP Threshold Voltage Code 0, Ratio = 0.45 Code 0, Ratio = 0.9 Code 15, Ratio = 0.45 Code 15, Ratio = 0.9 OV, UV Comparator Hysteresis OVP Comparator Hysteresis Input Common Mode Range Propagation Delay PWRGOOD, OVP, OVPB Outputs PWRGOOD Voltage Low OVP Sourcing Current OVPB Voltage Low IPWRGOOD = 10mA VOVP = 1.4V IOVPB = 1mA 65 0.4 0.4 V mA V Code 0, Ratio = 0.9 Code 15, Ratio = 0.45 Code 0, Ratio = 0.9 Code 15, Ratio = 0.45 OV, UV, OVP Comparators OV, UV Comparators OVP Comparator 3.937 4.41 2.235 2.505 70 15 160 40 0 4.025 4.55 2.3 2.6 88 25 218 62 4.113 4.69 2.365 2.695 120 40 300 85 5 5 5 V V V V mV mV mV mV V s s TEST CONDITIONS MIN TYP MAX UNITS Note 1: "Line, Load" implies that the parameter is tested at all combinations of the conditions: 10.8V < VCC < 13.2V, -2mA < IVREF < 0mA. Note 2: These are the actual voltages on VSENSE which will cause the OVPB and PWRGOOD outputs to switch, assuming the DACOUT voltage is perfect. These limits apply for 0C < TA < 70C. Note 3: "Code 0" means pins D0 - D4 are all low; "Code 15" means they are all floating or high (See Table 1). "Ratio" is the divider ratio of the resistor string between DACBUF and OVTH/UVTH (See Figure 1). PIN DESCRIPTIONS D0-D3 (DAC Digital Input Control Codes): These are the DAC digital input control codes, with D0 representing the least significant bit (LSB) and D3, the most significant bit (MSB) (See Table 1). A bit is set low by being connected to GND; a bit is set high by floating it, or connecting it to a 3V to 5V voltage source. Each control pin is pulled up to approximately 4.8V by an internal 40A current source. DACBUF (Buffered DACOUT Voltage): This pin provides a buffered version of the DACOUT voltage to allow external programming of the OV/UV thresholds (see OVTH/UVTH below). DACOUT (Digital-to-Analog Converter Output Voltage): This pin is the output of the 4-bit digital to analog (DAC) converter. Setting all input control codes low produces 3.5V at DACOUT; setting all codes high produces 2.0V at DACOUT. The LSB step size (i.e. resolution) is 100mV (See Table 1). The DACOUT source impedance is typically 3k and must therefore drive a high impedance input. Bypass DACOUT at the driven input with a 0.01F, low ESR, low ESL capacitor for best circuit noise immunity. GND (Signal Ground): All voltages are measured with 3 Decimal Code 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 D3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 DACOUT Voltage 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 Table 1. Programming the DACOUT Voltage respect to GND. The two GND pins are connected together internally but should also be connected externally using a short PC board trace. Bypass capacitors on the VCC and VREF pins should be connected directly to the ground plane near one of the signal ground UC1910 UC2910 UC3910 PIN DESCRIPTIONS (cont.) pins. OVP (Overvoltage Comparator Output): This output pin drives an external SCR circuit with up to 65mA when the voltage on VSENSE rises above its nominal value by a percentage set by the voltage on the OVTH/UVTH pin (see below). The OVP comparator hysteresis is a function of both the DACBUF voltage and the OV/UV percentage programmed. OVPB (Overvoltage Comparator Complementary Output): This output is a complement to the OVP output (see above) and provides an open collector capable of sinking 1mA when the voltage on VSENSE rises above its nominal value by a percentage set by the voltage on the OVTH/UVTH pin (see below). OVTH/UVTH (Undervoltage and Lower Overvoltage Threshold Input): This pin is used to program the window thresholds for the OV and UV comparators. The OV-UV window is centered around the DACBUF voltage and can be programmed from 5% to 15% about DACBUF. Connect a resistor divider between DACBUF and GND to set the percentage. The threshold for the OVP comparator is internally set to a percentage 2 times larger than the programmed OV percentage; therefore, its range extends from 10% to 30% above DACBUF. PWRGOOD (Undervoltage/Lower Overvoltage Output): This pin is an open collector output which is driven low to reset the microprocessor when VSENSE rises above or falls below its nominal value by a percentage programmed by OVTH/UVTH. The OV and UV comparators' hysteresis is a function of the DACBUF voltage and the OV/UV programmed percentage. VCC (Positive Supply Voltage): This pin supplies power to the chip. Connect VCC to a stable voltage source of at least 9V and capable of sourcing at least 15mA. The OVP and PWRGOOD outputs are held low, the OVPB output is in a high impedance state, and the VSENSE pin is pulled low until VCC exceeds the upper undervoltage lockout threshold. This pin should be bypassed directly to the GND pin with a 0.1F low ESR, low ESL capacitor. VREF (Voltage Reference Output): This pin provides an accurate 5V reference, capable of delivering up to 10mA to external circuitry, and is internally short circuit current limited. For best reference stability, bypass VREF directly to the GND pin with a 0.1F, low ESR, low ESL capacitor. VSENSE (Output Voltage Sensing Input): This pin is the input to the OVP and PWRGOOD comparators and is connected to the system output voltage through a lowpass filter. When choosing the resistor value for this filter, make sure that no more than 500A will flow APPLICATION INFORMATION The Overvoltage (OV), Undervoltage (UV) and Overvoltage Protection Voltage (OVP) threshold detection voltages are programmed as a percentage about the nominal DAC output voltage, DACOUT. Figure 1 illustrates how to program the UC3910 by setting a voltage divider, RDIV, at the OVTH/UVTH pin. The voltage divider ratio is defined as RDIV = RS1 RS1 + RS2 The UC3910 allows a ratio RDIV at the OVTH/UVTH pin from 0.3 to 0.9, which corresponds to overvoltage and undervoltage percentage thresholds from 5% to 15% and an OVP percentage threshold from 10% to 30%. These thresholds are shown in Figure 2. The OV, UV and OVP percentage thresholds are given by %VOV = RDIV * 16.7 %VUV = -(RDIV * 16.7) %VOVP = %VOV * 2.0 = RDIV * 33.4 UDG-96020 Figure 1. Setting the OV/UV/OVP Threshold Percentages 4 An R-C filter is added to the VSENSE pin to filter noise and ripple at the comparator inputs. An R-C filter frequency of FSWITCH/10 is recommended. Choose the UC1910 UC2910 UC3910 APPLICATION INFORMATION (cont.) 30 25 20 Thresholds (%) 15 10 5 0 -5 -10 -15 0.3 0.4 0.5 0.6 Ratio RDIV 0.7 0.8 0.9 UDG-96019 OVP OV UV Figure 2. OV, UV and OVP Percentage Thresholds as a Function of the Divider Ratio RDIV value of RF such that it limits the current into VSENSE to 0.5mA. RF * CF = 1 FSWITCH 2* * 10 VOUT RF 0.5mA Figure 3. Driving and SCR Using the UC3910 OVP Signal The Overvoltage Protection output, OVP, can be used to directly drive a crowbarring SCR, as shown in Figure 3. A typical application is shown in Figure 4 using the UC3910 together with the UC3886 Average Current Mode PWM Controller IC for a power supply to drive Intel's Pentium(R)Pro processor. UDG-96021 Figure 4. UC3910 Configured with the UC3886 for a Pentium(R) Pro DC/DC Converter UNITRODE CORPORATION 7 CONTINENTAL BLVD. * MERRIMACK, NH 03054 TEL. (603) 424-2410 * FAX (603) 424-3460 5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof. Copyright (c) 1999, Texas Instruments Incorporated |
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