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| Philips Semiconductors Product specification N-channel enhancement mode TrenchMOSTM transistor GENERAL DESCRIPTION N-channel enhancement mode standard level field-effect power transistor in a plastic envelope using 'trench' technology. The device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in switched mode power supplies and general purpose switching applications. IRFZ48N QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance VGS = 10 V MAX. 55 64 140 175 16 UNIT V A W C m PINNING - TO220AB PIN 1 2 3 tab gate drain source drain DESCRIPTION PIN CONFIGURATION tab SYMBOL d g s 1 23 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR VGS ID ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 k Tmb = 25 C Tmb = 100 C Tmb = 25 C Tmb = 25 C MIN. - 55 MAX. 55 55 20 64 45 210 140 175 UNIT V V V A A A W C ESD LIMITING VALUE SYMBOL VC PARAMETER Electrostatic discharge capacitor voltage, all pins CONDITIONS Human body model (100 pF, 1.5 k) MIN. MAX. 2 UNIT kV THERMAL RESISTANCES SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS in free air TYP. 60 MAX. 1.1 UNIT K/W K/W February 1999 1 Rev 1.000 Philips Semiconductors Product specification N-channel enhancement mode TrenchMOSTM transistor STATIC CHARACTERISTICS Tj= 25C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS V(BR)GSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Gate source leakage current Gate-source breakdown voltage Drain-source on-state resistance CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55C VDS = VGS; ID = 1 mA Tj = 175C Tj = -55C VDS = 55 V; VGS = 0 V; VGS = 10 V; VDS = 0 V IG = 1 mA; VGS = 10 V; ID = 25 A Tj = 175C Tj = 175C Tj = 175C MIN. 55 50 2 1 16 TYP. 3.0 0.05 0.02 12 - IRFZ48N MAX. 4.0 4.4 10 500 1 20 16 30 UNIT V V V V V A A A A V m m DYNAMIC CHARACTERISTICS Tmb = 25C unless otherwise specified SYMBOL gfs Ciss Coss Crss Qg(tot) Qgs Qgd td on tr td off tf Ld Ld Ls PARAMETER Forward transconductance Input capacitance Output capacitance Feedback capacitance Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance CONDITIONS VDS = 25 V; ID = 25 A VGS = 0 V; VDS = 25 V; f = 1 MHz MIN. 8 TYP. 39 2200 500 200 18 35 45 30 3.5 4.5 7.5 MAX. 2900 600 270 85 19 37 26 85 60 45 UNIT S pF pF pF nC nC nC ns ns ns ns nH nH nH ID = 50 A; VDD = 44 V; VGS = 10 V VDD = 30 V; ID = 25 A; VGS = 10 V; RG = 10 Resistive load Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad February 1999 2 Rev 1.000 Philips Semiconductors Product specification N-channel enhancement mode TrenchMOSTM transistor REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS MIN. IF = 25 A; VGS = 0 V IF = 65 A; VGS = 0 V IF = 65 A; -dIF/dt = 100 A/s; VGS = -10 V; VR = 30 V TYP. 0.95 1.0 57 0.14 IRFZ48N MAX. 64 210 1.2 - UNIT A A V V ns C AVALANCHE LIMITING VALUE SYMBOL WDSS PARAMETER Drain-source non-repetitive unclamped inductive turn-off energy CONDITIONS ID = 65 A; VDD 25 V; VGS = 10 V; RGS = 50 ; Tmb = 25 C MIN. TYP. MAX. 200 UNIT mJ 120 110 100 90 80 70 60 50 40 30 20 10 0 PD% Normalised Power Derating 120 110 100 90 80 70 60 50 40 30 20 10 0 ID% Normalised Current Derating 0 20 40 60 80 100 Tmb / C 120 140 160 180 0 20 40 60 80 100 Tmb / C 120 140 160 180 Fig.1. Normalised power dissipation. PD% = 100PD/PD 25 C = f(Tmb) Fig.2. Normalised continuous drain current. ID% = 100ID/ID 25 C = f(Tmb); conditions: VGS 5 V February 1999 3 Rev 1.000 Philips Semiconductors Product specification N-channel enhancement mode TrenchMOSTM transistor IRFZ48N SOAX514 RDS(ON)/mOhm 30 VGS/V = 6 6.5 7 20 8 15 9 10 1000 ID / A RDS(ON) = VDS/ID 100 tp = 1 us 10 us 100 us DC 1 ms 25 10 10 10 ms 100 ms 1 5 1 10 VDS / V 55 100 0 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 ID/A Fig.3. Safe operating area. Tmb = 25 C ID & IDM = f(VDS); IDM single pulse; parameter tp Fig.6. Typical on-state resistance, Tj = 25 C. RDS(ON) = f(ID); parameter VGS 100 ID/A 80 1E+01 Zth / (K/W) BUKX514-55 1E+00 0.5 1E-01 0.2 0.1 0.05 0.02 1E-02 0 T t 20 60 P D tp D= tp T 40 Tj/C = 175 25 1E-03 1E-07 1E-05 1E-03 t/s 1E-01 1E+01 0 0 1 2 3 4 5 VGS/V 6 7 8 9 Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T 100 ID/A 80 Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj 40 gfs/S 35 30 16 10 8 7.5 VGS/V = 7 6.5 60 6 40 5.5 25 20 15 10 20 5 0 4.5 4 0 2 4 VDS/V 6 8 10 5 0 0 20 40 60 80 100 ID/A Fig.5. Typical output characteristics, Tj = 25 C. ID = f(VDS); parameter VGS Fig.8. Typical transconductance, Tj = 25 C. gfs = f(ID); conditions: VDS = 25 V February 1999 4 Rev 1.000 Philips Semiconductors Product specification N-channel enhancement mode TrenchMOSTM transistor IRFZ48N 2.5 a BUK959-60 Rds(on) normlised to 25degC 4 3.5 Thousands (pF) 2 3 2.5 2 1.5 1 5 Coss Crss 100 Ciss 1.5 1 0.5 -100 -50 0 50 Tmb / degC 100 150 200 0 0.01 0.1 1 VDS/V 10 Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 C = f(Tj); ID = 25 A; VGS = 5 V VGS(TO) / V max. 4 typ. 3 min. 2 BUK759-60 Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 12 VGS/V 10 VDS = 14V 8 VDS = 44V 5 6 4 1 2 0 -100 -50 0 50 Tj / C 100 150 200 0 0 10 20 30 QG/nC 40 50 60 Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS Sub-Threshold Conduction Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 50 A; parameter VDS 100 IF/A 80 1E-01 1E-02 2% typ 98% 60 Tj/C = 40 175 25 1E-03 1E-04 20 1E-05 0 1E-06 0 0.2 0.4 0 1 2 3 4 5 0.6 0.8 VSDS/V 1 1.2 1.4 Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 C; VDS = VGS Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj February 1999 5 Rev 1.000 Philips Semiconductors Product specification N-channel enhancement mode TrenchMOSTM transistor IRFZ48N 120 110 100 90 80 70 60 50 40 30 20 10 0 WDSS% + RD VDS VGS 0 RG T.U.T. VDD - 20 40 60 80 100 120 Tmb / C 140 160 180 Fig.15. Normalised avalanche energy rating. WDSS% = f(Tmb); conditions: ID = 75 A Fig.17. Switching test circuit. + L VDS VGS 0 RGS T.U.T. R 01 shunt VDD -ID/100 Fig.16. Avalanche energy test circuit. 2 WDSS = 0.5 LID BVDSS /(BVDSS - VDD ) February 1999 6 Rev 1.000 Philips Semiconductors Product specification N-channel enhancement mode TrenchMOSTM transistor MECHANICAL DATA Dimensions in mm Net Mass: 2 g IRFZ48N 4,5 max 10,3 max 1,3 3,7 2,8 5,9 min 15,8 max 3,0 max not tinned 3,0 13,5 min 1,3 max 1 2 3 (2x) 2,54 2,54 0,9 max (3x) 0,6 2,4 Fig.18. SOT78 (TO220AB); pin 2 connected to mounting base. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for SOT78 (TO220) envelopes. 3. Epoxy meets UL94 V0 at 1/8". February 1999 7 Rev 1.000 Philips Semiconductors Product specification N-channel enhancement mode TrenchMOSTM transistor DEFINITIONS Data sheet status Objective specification Product specification Limiting values IRFZ48N This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1999 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. February 1999 8 Rev 1.000 |
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