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| ARA05050 Reverse Amplifier with Step Attenuator FEATURES * * * * * * * * * * * * Data Sheet - Rev 2.0 Low cost integrated monolothic GaAs amplifier with step attenuator Attenuation Range: 0-30 dB, adjustable in 2dB increments via a 4 wire parallel control Meets DOCSIS distortion requirements at +58dBmV output signal level Low distortion and low noise Low signal to noise ratio at all gain levels Frequency range: 5-100MHz 5 Volt operation MCNS/DOCSIS Compliant Cable Modems CATV Interactive Set-Top Box OpenCable Set-Top Box Fiber Nodes Cable Modem Termination Systems (CMTS) APPLICATIONS S12 Package 28 Pin SSOP with Heat Slug PRODUCT DESCRIPTION The ARA05050 is a GaAs IC designed to provide the reverse path amplification and output level control functions in a CATV Set-Top Box or Cable Modem. It incorporates a digitally controlled precision step attenuator that is preceded by an ultra low noise amplifier stage, and followed by an ultra-linear output driver amplifier. This device is capable of meeting the MCNS/DOCSIS requirements for harmonic performance at a +58dBmV output level while requiring only a single polarity +5V supply. Both the input and the output are single-ended and matched to 75 Ohms. The precision attenuator provides up to 30 dB of attenuation in 2 dB increments. The ARA05050 is offered in a 28-pin SSOP package featuring a heat slug on the bottom of the package. 4 Attenuation Control Switch ARA05050 LPF Balun Upstream QPSK/16QAM Modulator Clock Data RAM ROM 5-42 MHz Transmit Enable/Disable MAC Clock 44 MHz Data Microcontroller with Ethernet MAC Diplexer 54-860 MHz DoubleConversion Tuner SAW Filter QAM Receiver with FEC 10Base-T Transceiver RJ45 Connector Figure 1. Cable Modem or Set Top Box Application Diagram 07/2001 ARA05050 RFOUT1 ATTIN ATTOUT RFIN2 30 dB, 2dB step digital attenuator section RFIN A1 A2 RFOUT ISET1 16 dB 8 dB 4 dB 2 dB ISET2 Figure 2: Functional Block Diagram 1 2 3 4 5 6 7 8 9 10 11 12 13 14 N/C Bypass ATTIN RFOUT1 VREF1 ATTACG1 ATTACG1 ATTACG1 ATTACG1 RFIN ISET1 VATT 16 dB 8 dB N/C N/C ATTOUT ISET2 RFIN2 ATTACG2 ATTACG2 ATTACG2 ATTACG2 VREF2 RFOUT GND 2 dB 4 dB 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Figure 3: Pin Out 2 Data Sheet - Rev 2.0 07/2001 ARA05050 Table 1: Pin Description PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 N AME N/C Bypass ATTIN RFOUT1 VREF1 ATTACG1 ATTACG1 ATTACG1 ATTACG1 RFIN ISET1 VATT 16 dB 8 dB D ESC R IPTION No C onnecti on Internal bypass Attenuator Input (2) Ampli fi er A1 Output and Supply Reference Voltage for Ampli fi er A1 Attenuator AC Ground 1 Attenuator AC Ground 1 Attenuator AC Ground 1 Attenuator AC Ground 1 Ampli fi er A1 Input (4) Ampli fi er A1 C urrent Adjust (4) Attenuator Supply 16 dB Attenuti on C ontrol Bi t 82 dB Attenuti on C ontrol Bi t (3) (1) PIN 15 16 17 18 19 20 21 22 23 24 25 26 27 28 N AME 4 dB 2 dB GND RFOUT VREF2 ATTACG2 ATTACG2 ATTACG2 ATTACG2 RFIN2 ISET2 ATTOUT N/C N/C D ESC R IPTION 4 dB Attenuti on C ontrol Bi t 2 dB Attenuti on C ontrol Bi t Ground Ampli fi er A2 Output and Supply Reference Voltage for Ampli fi er A2 Attenuator AC Ground 2 Attenuator AC Ground 2 Attenuator AC Ground 2 Attenuator AC Ground 2 Ampli fi er A2 Input (4) Ampli fi er A2 C urrent Adjust (4) Attenuator Output (2) No C onnecti on No C onnecti on (1) (3) (3) (3) (3) (3) (3) (3) (1) Notes: (1) All N/C pins should be grounded. (2) Pins should be AC-coupled. No external DC bias should be applied. (3) Pins should be AC-grounded. No external DC bias should be applied. (4) Pins should be grounded or pulled to ground through a resistor. No external DC bias should be applied. Data Sheet - Rev 2.0 07/2001 3 ARA05050 ELECTRICAL CHARACTERISTICS Table 2: Absolute Minimum and Maximum Ratings PAR AMETER Analog Supply: VSUP (pi ns 4, 12, 18) Ampli fi er Reference Voltages (pi ns 5, 19) RF P ower at A mpli fi er Inputs (pi ns 10, 24) MIN 0 -2.5 0 -55 - MAX 9 VSUP 2 +60 6 +200 260 5 U N IT VD C VD C dBmV V o Attenuator C ontrols (pi ns 13, 14, 15, 16) Storage Temperature Solderi ng Temperature Solderi ng Ti me C C o S ec Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability. Notes: 1. Pins 3 and 26 should be AC-coupled. No external DC bias should be applied. 2. Pins 10, 11, 24 and 25 should be grounded or pulled to ground through a resistor. No external DC bias should be applied. 3. Pins 6, 7, 8, 9, 20, 21, 22 and 23 should be AC-grounded. No external DC bias should be applied. Table 3: Operating Ranges PAR AMETER Ampli fi er Supply: VDD (pi ns 4, 18) Attenuator Supply: VATTN (pi n 12) Attenuator C ontrols (pi ns 13, 14, 15, 16) Ampli fi er Reference Voltages (pi ns 5, 19) C ase Temperature MIN 4.5 VDD-0.5 0 -40 TYP 5 5 1.75 25 MAX 7 7 5.5 85 U N IT VD C VD C V VD C o C The device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications. 4 Data Sheet - Rev 2.0 07/2001 ARA05050 Table 4: DC Electrical Specifications TA=25C; VDD, VATTN = +5.0 VDC PAR AMETER Ampli fi er A1 C urrent (pi n 4) Ampli fi er A2 C urrent (pi n 18) Attenuator C urrent (pi n 12) Total Power C onsumpti on MIN - TYP 75 100 8 0.92 MAX 95 130 1.2 U N IT mA mA mA W Table 5: AC Electrical Specifications TA=25C; VDD, VATTN = +5.0 VDC PAR AMETER Gai n (10 MHz) Gai n Flatness Gai n Vari ati on over Temperature Attenuati on Steps 2 dB 4 dB 8 dB 16 dB MIN 30 1.6 3.8 8.0 16.0 78 - TYP 32 0.75 -0.006 1.85 4.0 8.3 16.6 -60 -63 -63 -63 70 1.7 MAX 33 1.5 2.2 4.2 8.5 17.0 -55 -55 -60 -60 2.5 U N IT dB dB dB/C C OMMEN TS 0 dB attenuati on setti ng 5 to 100 MHz dB 5 to 42 MHz (1), Monotoni c 2nd Harmoni c D i storti on Level 5 MHz 25 MHz 3rd Harmoni c D i storti on Level 5 MHz 25 MHz 3rd Order Output Intercept 1 dB Gai n C ompressi on Poi nt Noi se Fi gure dB c +58 dBmV i nto 75 Ohms dB c dBmV dBmV dB +58 dBmV i nto 75 Ohms Notes: (1) See Figures 5 and 6 for performance at higher frequencies. All specifications as measured in ANADIGICS test fixture. Data Sheet - Rev 2.0 07/2001 5 ARA05050 continued: AC Electrical Specifications TA=25C; VDD, VATTN = +5.0 VDC PAR AMETER Output Noi se Power Acti ve / No Si gnal / Mi n. Atten. Set. Acti ve / No Si gnal / Max. Atten. Set. Input Impedance Input Return Loss Output Impedance Output Return Loss Note: As measured in ANADIGICS test fixture MIN - TYP 75 -20 75 -20 MAX -37.6 -54.6 -15 -15 U N IT dBmV Ohms dB Ohms dB C OMMEN TS Any 160 kHz bandwi dth from 5 to 42 MHz 75 Ohm system 75 Ohm system Table 6: Logic Interface Specifications TA=25C; VDD, VATTN = +5.0 VDC PAR AMETER Attenuator C ontrol Logi c VIN,LOW VIN,HIGH (1) MIN 0 2.8 - TYP 5K MAX 0.5 5.5 - U N IT C OMMEN TS Bypasses atten. stage Enables atten. stage V Ohms Attenuator C ontrol Impedance Note: (1) Specification applies when 470 Ohm resistor is connected from pin 2 to ground (see test circuit in Figure 4). Table 7: Attenuator Logic ATTEN U ATION (dB ) 2 dB Logi c Input (pi n 16) 4 dB Logi c Input (pi n 15) 8 dB Logi c Input (pi n 14) 16 dB Logi c Input (pi n 13) 0 L L L L 2 H L L L 4 L H L L 6 H H L L 8 L L H L 10 H L H L 12 L H H L 14 H H H L 16 L L L H 18 H L L H 20 L H L H 22 H H L H 24 L L H H 26 H L H H 28 L H H H 30 H H H H Note: L = logic low, H = logic high 6 Data Sheet - Rev 2.0 07/2001 +5 V 1uF 470 Ohms (see note) Note: The 470 Ohm resistor from pin 2 to ground is installed for 3V attenuator control logic levels. For 5V logic, the 470 Ohm resistor is removed. 0.01uF 3.3K Ohms 10uH 1 2 N/C Bypass ATTIN RFOUT1 VREF1 ATTACG1 ATTACG1 ATTACG1 ATTACG1 RFIN ISET1 VATT 16 dB 8 dB ARA05050 N/C N/C ATTOUT ISET2 RFIN2 ATTACG2 ATTACG2 ATTACG2 ATTACG2 VREF2 RFOUT GND 2 dB 4 dB 28 27 26 25 24 23 22 0.1uF 3 4 5 5K Ohms 0.1uF Figure 4: Test Circuit 1uF 1.8K Ohms 620 Ohms RF Input (75 Ohms) 1pF 0.1uF 16 dB 8 dB 4 dB 2 dB Data Sheet - Rev 2.0 07/2001 20 Ohms 0.01uF 6 7 0.01uF 0.1uF 620 Ohms 1uF 0.1uF 0.1uF 8 9 10 11 12 21 20 19 18 17 16 15 1uF 1uF 1.8K Ohms RF Output (75 Ohms) 0.1uF 10uH 3.3K Ohms 20 Ohms 3.9 Ohms 1uF 0.01uF 13 14 +5 V 5K Ohms 0.01uF 1uF +5 V ARA05050 7 ARA05050 PERFORMANCE DATA Figure 5: S21 (0 - 16 dB Attenuation) Figure 6: S21 (16 - 30 dB Attenuation) Figure 7: S11 - Log Scale Figure 8: S22 - Log Scale Figure 9: S11 - Smith Chart Figure 10: S22 - Smith Chart 8 Data Sheet - Rev 2.0 07/2001 ARA05050 Figure 11: Attenuator Switching Speed - 16 dB Step Figure 12: Harmonic Performance Data Sheet - Rev 2.0 07/2001 9 ARA05050 APPLICATION INFORMATION Printed Circuit Board Layout Considerations The ARA05050 is a high-performance RF device. Special consideration must be given to certain features of the the printed circuit board layout, as they can affect the RF performance of the IC. Refer to the ANADIGICS application note CATV Reverse Amp w/ Step Attenuator for more details. Amplifier Enable / Disable The ARA05050 includes two amplification stages that each can be shut down through external control pins VREF1 and VREF2 (pins 5 and 19, respectively.) By applying a typical bias of 1.75 Volts to these pins, the amplifiers are enabled. In order to fully disable an amplifier, its control pin requires a negative bias of -1.5 to -2.0 Volts. Amplifier Bias Current The ISET pins (11 and 25) set the bias current for the amplification stages. Grounding these pins results in the maximum possible current. By placing a resistor from the pin to ground, the current can be reduced. The recommended bias conditions use the configuration shown in the test circuit schematic in Figure 4. Thermal Layout Considerations The device package for the ARA05050 features a heat slug on the bottom of the package body. Use of the heat slug is an integral part of the device design. Soldering it to the ground plane of the PC board will ensure the lowest possible thermal resistance for the device, and will result in the longest MTF (mean time to failure.) A PC board layout that optimizes the benefits of the heat slug is shown in Figure 13. The via holes located under the body of the device must be plated through to a ground plane layer of metal, in order to provide sufficient thermal conductivity. The recommended solder mask outline is shown in Figure 14. ESD Sensitivity Electrostatic discharges can cause permanent damage to this device. Electrostatic charges accumulate on test equipment and the human body, and can discharge without detection. Proper precautions and handling are strongly recommended. Refer to the ANADIGICS application note on ESD precautions. Figure 13: PC Board Layout 10 Data Sheet - Rev 2.0 07/2001 ARA05050 Figure 14: Solder Mask Outline Data Sheet - Rev 2.0 07/2001 11 ARA05050 PACKAGE OUTLINE Figure 15: S12 Package Outline - 28 Pin SSOP with Heat Slug 12 Data Sheet - Rev 2.0 07/2001 ARA05050 COMPONENT PACKAGING Volume quantities of the ARA05050 are supplied on tape and reel. Each reel holds 3,500 pieces. Smaller quantities are available in plastic tubes of 50 pieces. Figure 16: Reel Dimensions DIRECTION OF FEED Figure 17: Tape Dimensions Data Sheet - Rev 2.0 07/2001 13 ARA05050 NOTES 14 Data Sheet - Rev 2.0 07/2001 ARA05050 NOTES Data Sheet - Rev 2.0 07/2001 15 ARA05050 ORDERING INFORMATION OR D ER N U MB ER ARA05050S12C TR ARA05050S12C TEMPER ATU R E R AN GE -40 to 85 0C -40 to 85 0C PAC K AGE D ESC R IPTION 28 Pi n SSOP wi th Heat Slug 28 Pi n SSOP wi th Heat Slug C OMPON EN T PAC K AGIN G 3,500 pi ece tape and reel Plasti c tubes (50 pi eces per tube) ANADIGICS, Inc. 141 Mount Bethel Road Warren, New Jersey 07059, U.S.A. Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 URL: http://www.anadigics.com E-mail: Mktg@anadigics.com IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a products formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. WARNING 16 Data Sheet - Rev 2.0 07/2001 |
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