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Ordering number : ENN5981
Monolithic Linear IC
LA9250M
CD Player Analog Signal Processor (ASP)
Overview
The LA9250M is a servo signal-processing IC for CD players. In combination with a CD DSP such as the LC78626KE, it can implement a CD player with a minimal number of external components.
* Built-in EF balance adjustment * Built-in RF level AGC function * RF level follower function for the tracking servo gain (with turn-off function)
Package Dimensions
unit: mm 3159-QIP64E
[LA9250M]
17.2 14.0 0.35
33
Functions
* * * * * * * * * * * * * * I/V amplifier SLC FE Focus servo amplifier Spindle servo amplifier (with gain switching function) Focus detection (DRF and FZD) Defect detection RF amplifier with AGC APC TE (with variable gain and auto balance function) Tracking servo amplifier Sled servo amplifier (with turn-off function) Track detection (HFL, TES) Shock detection
1.0 1.6 1.0
48 49
0.8
1.6 1.0
0.15
32
17.2 14.0 0.8
17
1.0
1
16
3.0max 0.8 Ratings 7 200 -15 to +75
64
0.1 2.7
15.6
Features
* Low-voltage operation: 2.4 V (minimum) * Low current drain: 15 mA (at VCC = 3.0 V, typical)
SANYO: QIP64E
Specifications
Maximum Ratings at Ta = 25C, with pin 46 tied to ground
Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Pin 56 Ta 75C Conditions Unit V mW C C
-40 to +150
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
42800RM (OT) No. 5981-1/17
LA9250M Operating Conditions at Ta = 25C, with pin 46 tied to ground
Parameter Recommended supply voltage Allowable operating supply voltage range Symbol VCC VCC op Conditions Ratings 3 2.4 to 5.5 Unit V V
Electrical Characteristics at Ta = 25C, with pin 46 tied to ground, pin 56 = 3 V
Parameter Current drain Reference voltage [Interface] SLOFvth SP8vth EFBALvth FSTAvth LASERvth CLK [RF Amplifier] RF no-signal voltage Minimum gain [Focus Amplifier] FDO gain FDO offset F search voltage (high) 1 F search voltage (low) 1 F search voltage (high) 2 F search voltage (low) 2 [Tracking Amplifier] TE gain max TE gain min TE-3dB TO gain TGL offset TGH offset THLD offset Off 1 offset Balance range (high) Balance range (low) TGLvth PH no-signal voltage BH no-signal voltage DRF detection voltage DRF output voltage (high) DRF output voltage (low) FZD detection voltage 1 FZD detection voltage 2 HFL detection voltage HFL output voltage (high) HFL output voltage (low) TES output voltage (low-high) TES output voltage (high-low) TES output voltage (high) TES output voltage (low) JP output voltage (high) TEG max TEG min TEfc TOG TGLost TGHost THDost OFF1ost BAL-H BAL-L TGLvth PHo BHo10 DRFvth DRF-H DRF-L FZD1 FZD2 HFLvth HFL-H HFL-L TES-LH TES-HL TES-H TES-L JP-H TJP = 3 V, at TO, the difference from TJP = 1.5 V 0.05 TESI, the difference from VR TESI, the difference from VR -0.15 0.05 2.5 FE, the difference from VR FE, the difference from VR At RF, the difference from VR -0.25 2.5 0 The difference from RFSM The difference from RFSM At RFSM, the difference from VR f = 10 kHz, E: 1 M-input, PH1 = 0.5 V, TGRF = open f = 10 kHz, E: 1 M-input, PH1 = 2 V, TGRF = open E: 1 M-input TH TO gain, THLD mode Servo on, TGL = high, TO TGL = low, the difference from the TGL offset, TO THLD mode, the difference from the TGL offset, TO TOFF = High GainE/F input, TB = 3 V, TBC = open GainE/F input, TB = 0 V, TBC = open 0.8 -0.90 0.40 -0.50 2.5 10.0 -260 -35 -35 -25 6.0 -0.5 7.5 +1.8 70 12.0 0 0 0 0 +35 -35 1.5 -0.65 0.65 -0.25 2.9 0 0.2 0 -0.10 2.9 0 -0.10 0.10 2.9 0 0.25 0.5 0.45 0.5 -0.05 0.15 -0.05 0.5 1.8 -0.40 0.90 -0.10 14.0 +260 +35 +35 +25 9.0 +4.0 dB dB kHz dB mV mV mV mV dB dB V V V V V V V V V V V V V V V V FDG FDost FS max1 FS min1 FS max2 FS min2 FIN1, FIN2: 1 M-input, FDO The difference from the reference voltage, servo on. FDO, FSS = GND FDO, FSS = GND FDO, FSS = VCC FDO, FSS = VCC 3.5 -340 5.0 0 0.8 -0.8 0.8 0 6.5 +340 dB mV V V V V RFo RFGmin FIN1, FIN2: 1 M-input, PH1 = 2 V, f = 200 kHz, RF 0.75 1.00 -15 1.25 V dB SLOFvth SP8vth SLOF SP8: 8 cm mode 0.8 0.8 2.3 2.3 0.8 25 35 45 V V V V V Hz Symbol ICCO VREF No input VR Conditions Ratings min 8 1.2 typ 14 1.5 max 21 1.8 Unit mA V
EFBALvth EFBAL FSTAvth ESTA
LASERvth LASER CLK R = 390 k, C = 0.1 F
Continued on next page.
No. 5981-2/17
LA9250M
Continued from preceding page.
Parameter [Spindle Amplifier] Offset 12 Offset 8 Offset off Output voltage H12 Output voltage H8 [Sled Amplifier] Offset SLD Offset off SLC no-signal voltage Shock no-signal voltage Shock detection voltage (high) Shock detection voltage (low) DEF detection voltage DEF output voltage (high) DEF output voltage (low) APC reference voltage APC off voltage SLDost SLDof SLCo SCIo SCIvthH SCIvthL DEFvth DEF-H DEF-L LDS LDDof The LDS voltage such that LDD = 1.5 V LDD 120 2.7 SLEQ = VR, the difference from VR SLOF = High SLC SCI, the difference from VR SCI, the difference from VR SCI, the difference from VR The difference between the LF2 voltage when DEF is detected with RF = 1.9 V and the LF2 voltage when RF = 1.9 V. -80 -40 1.0 -40 90 -190 0.20 2.5 0 0 1.5 0 140 -140 0.35 2.9 0 170 2.9 0.5 220 +80 +40 2.0 +40 190 -90 0.50 mV mV V mV mV mV V V V mV V SPD12ost At SPD, the difference from VR, SP8 = 0 V: 12 cm mode SPD8ost SPDof At SPD, the difference from VR, SP8 = 3 V: 8 cm mode At SPD, the difference from VR, SP8 = 3 V: 8 cm mode -40 -40 -40 0.35 0.10 0 0 0 0.50 0.20 +40 +40 +40 0.65 0.30 mV mV mV V V Symbol Conditions Ratings min typ max Unit
The difference from offset 12, SPD-H12 SP8 = 0 V, 12 cm mode, CLV = 3 V SPD-H8 The difference from offset 8, SP8 = 3 V, 8 cm mode, CLV = 3 V
Pin Functions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pin FIN2 FIN1 E F TB TE- TE TESI SCI TH TA TD- TD JP TO (NC) FD FD- FA FA- FE FE- SP SPG Pickup photodiode (focus, RF) connection Pickup photodiode (focus, RF) connection Pickup photodiode (tracking) connection Pickup photodiode (tracking) connection TE signal DC component input. Pickup photodiode (tracking) connection TE signal gain setting resistor connection. A resistor is connected between this pin and TE. TE signal output TES comparator input. Takes the bandpass filtered TE signal as its input. Shock detection input Tracking gain time constant setting TA amplifier output In conjunction with the TD and VR pins, used to form the tracking phase compensation circuit constant Tracking phase compensation setting Track jump signal amplitude setting Tracking control signal output No connection Focusing control signal output In conjunction with the FD and FA pins, used to form the focusing phase compensation circuit constant In conjunction with the FD- and FA- pins, used to form the focusing phase compensation circuit constant In conjunction with the FA and FE pins, used to form the focusing phase compensation circuit constant FE signal output FE signal gain setting resistor connection. A resistor is connected between this pin and FE. CLV pin input signal inverted output Gain setting resistor connection (12 cm spindle mode) Function
Continued on next page.
No. 5981-3/17
LA9250M
Continued from preceding page.
Pin No. 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Pin SP- SPD SLEQ SLD SL- SL+ OSC (NC) SLOF TGRF SP8 EFBAL FSTA LASER (NC) TJP TGL TOFF TES HFL CLV GND RF RF- SLC SLI DEF DRF FSC TBC FSS VCC REFI VR LF2 PH1 BH1 LDD LDS (NC) Function In conjunction with the SPD pin, spindle phase compensation time constant connection Spindle control signal output Sled phase compensation time constant connection Sled control signal output Sled feed signal input from the microcontroller Sled feed signal input from the microcontroller Oscillator frequency setting No connection Sled servo off control input Tracking servo gain RF level follower function setting Spindle 8 cm/12 cm mode switching control from the DSP E/F balance adjustment signal input from the DSP Focus search control signal input from the DSP Laser on/off control from the DSP No connection Track jump signal input from the DSP Tracking gain control signal input from the DSP Tracking off control signal input from the DSP TES signal output to the DSP Output for the HFL signal that indicates whether the main beam is positioned over pits or mirror CLV error signal input from the DSP GND RF output In conjunction with the RF pin, sets the RF gain and sets the EFM 3T compensation Output for control of the RF waveform data slice level according to the DSP Input for control of the RF waveform data slice level according to the DSP Disc defect detection output RF level detection output Focus search smoothing capacitor output E/F balance variation range setting Focus search mode setting VCC Reference voltage bypass capacitor connection Reference voltage output Disc defect detection time constant setting RF signal peak hold capacitor connection RF signal bottom hold capacitor connection APC circuit output APC circuit input No connection
No. 5981-4/17
LA9250M Pin Circuits
Pin No. Pin Internal equivalent circuit
VREF 62k
1 2 FIN2 FIN1
2
1 5pF
62k
VREF 100k 4
3 4 E F
3 5pF
100k
5pF
5 6 18 22 25 27 50 TB TE- FD- FE- SP- SLEQ SLI
VREF
22 18 6
5
50 27 25
10 68k 33k 30k
VCC
7 10
TE TH
250
7 GND 8 VCC
8 43
TESI TES
43 200k
1k
GND Continued on next page.
No. 5981-5/17
LA9250M
Continued from preceding page.
Pin No. Pin Internal equivalent circuit
9 VCC 50k
VREF 4k VCC 10k 12 GND 50k GND
9 41
SCI
50k 41
11
11 12
TA TD-
4k VREF
TGL
13
VCC
13
TD
250
GND 14 VCC 50k VCC 4k VREF
14
JP
VREF
20k 10k
50k GND
4k
15 VREF
15 TO
VCC VREF 100k 250 GND 10pF Continued on next page.
40k
No. 5981-6/17
LA9250M
Continued from preceding page.
Pin No. Pin Internal equivalent circuit
VCC
17 26 49 FD SPD SLC
250 49 26 17
GND 19 VREF 240k VREF 250 GND
19 20 21 FA FA- FE
VCC
15pF 20 40k 21 250
VCC
GND 45 VREF 30k
23 45 SP CLV
VCC
10k
10k
250
80k 23 GND 80k 23 SP VREF
24 SPG
VCC
250
5pF
24 50k
GND Continued on next page.
No. 5981-7/17
LA9250M
Continued from preceding page.
Pin No. Pin Internal equivalent circuit
28
VREF 50k 40k
VREF 40k
VCC
28 29 30
SLD SL- SL+
250 GND
29 50k 30 31 VCC
31
OSC
33
33 35 38 SLOF SP8 LASER
30k
GND 34
34
TGRF
36 37
EFBAL FSTA
30k
40 VREF 30k
40 TJP
20k GND
50k
36
VCC
VCC
20k
20k
250
GND Continued on next page.
No. 5981-8/17
LA9250M
Continued from preceding page.
Pin No. Pin Internal equivalent circuit
42
TOFF
30k
60k 1k
42
VCC
GND 53 52
44 51 52 53 HFL DEF DRF FSC
VCC
51 44
GND 47 VCC
47 60 61 RF PH1 BH1
250 GND 60 61 48 VREF 5k 3k
48
RF-
5k
VREF
VCC
5k
VREF 10k VREF
54
TBC
1k 54
GND Continued on next page.
15k 10k
5k VREF GND No. 5981-9/17
28k
VCC
LA9250M
Continued from preceding page.
Pin No. Pin Internal equivalent circuit
VCC 50k
55 FSS
50k 55 GND 57 20k VCC VCC
57 58
REFI
100 20k GND 58 GND
VR
59 50k 1k
59 LF2
VCC 5k
GND 62 200 VCC
62
LDD
GND 180k 63
63
LDS
No. 5981-10/17
LA9250M Equivalent Circuit
REFI
VCC
DRF
TBC
FSC
DEF
LDD
LDS
FSS
BH1
PH1
LF2
64
NC
63
62
61
60
59
58
57
56
55
54
53
52
51
50
SLI
VR
49
SLC
FIN2
1
APC
RF DET
REF SLC
RF48
FIN1
2
VCA I/V
RF
47
E
3
GND
46
F
4
BAL
VCA
RF AMP
CLV
45
TB
5
HFL
44
TE6
TE
TES
43
TE
7
TOFF
42
TESI
8 7
LA9250M
T. SERVO &T. LOGIC
TGL
41
SCI
9
TJP
40
TH
10
NC
39
TA TD12
LASER LATCH
38
11
FSTA
37
TD REF
13
EFBAL
36
TOFF
JP
14
F. SERVO &F. LOGIC SPINDLE SERVO SLED SERVO
SP8
35
TO
15
TGRF
34
NC
16
SLOF
33
FD
FD-
FA-
FE-
SP-
SPG
SLEQ
SPD
SLD
SL-
FA
FE
SP
SL+
OSC
NC
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A11345
No. 5981-11/17
LA9250M Operation 1. APC (Auto Laser Power Control) This circuit controls the laser power, turning the laser on and off (pin 38). The laser is turned on when the LASER pin is high. 2. RF amplifier (eye pattern output) The pickup photodiode output current input to FIN1 (pin 2) and FIN2 (pin 1) is I/V converted, passed through an AGC circuit, and output from the RFSUM amplifier RF pin (pin 47). The built-in AGC circuit has a variable range of about 4 dB, and its time constant is set by the external capacitor connected to PH1 (pin 60). The EFM signal bottom level is also controlled, and the response is set by the external capacitor attached to PH1 (pin 60). The center gain for the AGC variable range is set by the value of the resistor between RF (pin 47) and RF- (pin 48). If required, these pins can also be used for EFM signal 3T compensation. 3. SLC (Slice Level Controller) Since the SLC circuit sets the duty of the EFM signal input to the DSP to 50%, the DC level is controlled by integrating the EFMO signal from the DSP. 4. Focus Servo The focus error signal is acquired by detecting the difference between (A + C) and (B + D) from the pickup and the result is output from FE (pin 21). The FE signal gain is set by the value of the resistor between FE and FE- (pin 22). The FA amplifier is the pickup phase compensation amplifier, and its equalization curve is set by an external capacitor and resistor. The FD amplifier provides a phase compensation circuit and a focus search signal synthesis function. A focus search operation is started by switching FSTA (pin 37) from low to high. A ramp waveform is generated by an internal oscillator; this ramp completes in about 560 ms. We recommend holding FSTA (pin 37) high until another focus search is to be performed. Focus is detected (the focus zero cross state) from the focus error signal generated, in effect, by this waveform, and this turns the focus servo on. The ramp waveform amplitude is set by the value of the resistor between FD (pin 17) and FE- (pin 18). Since FSC (pin 53) is used to smooth the focus search ramp waveform, a capacitor is connected between FSC and VR (pin 58). FSS (pin 55) switches the focus search mode; when FSS is shorted to VCC the circuit performs a + search with respect to the reference voltage VR, and when open or shorted to ground, it performs a search. 5. Tracking Servo The pickup photodiode output current input to E (pin 3) and F (pin 4) is I/V converted and passed first through a balance adjustment VCA circuit and then through a VCA circuit that performs gain following for the RF AGC circuit. The resulting signal is then output from TE (pin 7). The gain follower function can be turned off by setting TGRF (pin 34) high. The tracking error gain is set by the value of the resistor between TE- (pin 6) and TE (pin 7). The TH amplifier detects either the JP signal or the TGL signal from the DSP, and functions to change the response characteristics of the servo according to the THLD signal generated internally. When a defect is detected, the circuit switches to THLD mode internally. Set DEF (pin 51) low to prevent this. Note that an external bandpass filter that extracts only the shock component from the tracking error signal is formed on SCI (pin 9), and that the gain is automatically increased if this signal is inserted. The TA output (pin 11) has an internal resistor so that a low-pass filter can be formed. The TD amplifier circuit is provided to perform servo loop phase compensation, and its characteristics are set by external RC components. This amplifier also provides a muting function, and the servo can be turned off by setting TOFF (pin 42) high. The TO amplifier provides a function for synthesizing JP pulses, and JP (pin 14) is used to set the JP pulse conditions. The E/F balance adjustment operation is started by switching EFBAL (pin 36) from low to high. After that, the adjustment operation is performed by a clock generated by an internal oscillator, and the adjustment completes in about 500 ms. We recommend holding EFBAL (pin 36) high until the next time an E/F balance operation is to be performed.
No. 5981-12/17
LA9250M This adjustment operation must be performed over the disc pit area, not over the disc mirror area. Note that applications must take measures to assure that a stable TE signal is acquired so that track kick operations do not occur during the adjustment. (This includes sled feed commands from the microcontroller.) The E/F balance adjustment precision and adjustment range can be set to be optimal for the pickup characteristics by the value of the resistor between TBC (pin 54) and the reference voltage, VR. 6. Sled Servo The response characteristics are set at SLEQ (pin 27). The amplifier that follows SLEQ has a muting function, and the sled servo can be turned off by setting SLOF (pin 33) high. Sled feed is performed in a current input form at SL- (pin 29) and SL+ (pin 30). In particular, a resistor is connected to a microcontroller output port and the feed gain is set by the value of that resistor. 7. Spindle Servo A servo circuit that holds the disc at a constant linear velocity is formed by the internal servo circuit in conjunction with the DSP. A signal from the DSP is accepted by CLV (pin 45), and output from SPD (pin 26). The phase compensation characteristics are set by SP (pin 23), SP- (pin 25), and SPD. The 12 cm mode amplifier gain is set by a resistor connected between SPG (pin 24) and the reference voltage. In 8 cm mode, this amplifier is internally buffered and not affected by SPG. The circuit switches to 8 cm mode when SP8 (pin 35) is set high. 8. TES and HFL (Traversal signal) The sub-beam signals from the pickup are connected to E (pin 3) and F (pin 4) so that HFL and TES have the phase relationship shown in the figure when the pickup moves from the outside towards the inside of the disc. The TES comparator has a hysteresis of about 100 mV at the minus polarity of the comparator with respect to the TESI (pin 8) input. An external bandpass filter is formed so that only the required signal is extracted from the TE signal.
2.0 V RFSM 1.4 V 1.0 V
HFL
TES
TE
A11267
9. DRF (Optical level decision) A peak hold operation is applied to the EFM signal (RF output) by a capacitor at PH1 (pin 60), and DRF goes high when the RF peak value exceeds about 1.3 V (when VCC = 3.0 V). The PH1 capacitor is related to the settings of both the DRF detection time constant and the RF AGC response.
DRF 2.0 V RFSM FE Pickup position Focus
A11268
1.3 V 1.0 V
No. 5981-13/17
LA9250M 10. Focus Detection The pickup is seen as being in focus when, after a VR + 0.2 V level is detected in the focus error signal S-curve, that S-curve next goes to the VR level.
REF + 0.2 V
Focus
A11269
11. Defect Detection The mirror surface level is held by the capacitor on LF2 (pin 59), and DEF (pin 51) goes high if a drop in the EFM signal (RF output) exceeds about 0.35 V. When DEF goes high, the tracking servo goes to THLD mode. When a defect is detected applications can prevent the LA9250M from going to THLD mode either by setting DEF to low or by setting LF2 (pin 59) low and thus setting the LA9250M not to output DEF.
EFM signal (RFSM output)
LF2 (pin 59)
0.35 V
DEF (pin 51)
A11270
12. Oscillator Circuit The oscillator frequency is set by the external RC circuit attached to OSC (pin 31). This oscillator frequency is used as the reference clock for focus search and E/F balance adjustment.
No. 5981-14/17
LA9250M Test Circuit
77 0.1F 100k VCC
0.1F
47F
10k
47F
SLI1 76 100k DRF 0.1F DEF 51 50 SLI 49 SLC RF48 RF 47 GND 46 CLV 45 HFL 44 TES 43 TOFF 42 TBC 53 FSC 52
0.33F
0.47F
REF LF2
REFI
0.1F
VCC
LDD
LDS
64
NC
63
62
61
60
59
58
57
56
55
FSS
BH1
PH1
VR
F2I F2IAC F1IAC EIAC FIAC
65
1M 0.01F 1M 0.01F 1M 0.01F
66 F1I 67 68 EI 69
1M 1M 1M 1M 100k
FIN2 1 FIN1 2 E 3 F 4 TB 5 TE6 TE 7
TBC 54
10k 2k
70 1M FI 71 0.01F 72 0.01F
20k
TESI AC 73
0.01F
TESI 8 SCI 9
LA9250M
TGL 41 TJP 40 NC 39 LASER 38 FSTA 37 EFBAL 36 SP8 35 TGRF 34 SLOF 33
0.068F
TH 10 TA 11 TD12 TD 13 JP 14
REF 2k
68k 68k
REF
TO 15 NC 16
FD-
FA-
FE-
SP-
SL-
SPG
SPD
15k SLEQ
SLD
SL+
FA
FE
SP
OSC
390k
24k
200k
30k REF
REF
74 SLI-
75 SLI+ A11346
200k
S1
100pF
0.1F
20k
50k
39k 15k
NC
FD
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
No. 5981-15/17
VCC D-VCC REF 0.01F 0.001F 10k 4.7F 0.033F 51k DRF DEF SLI SLC
VCC
REF
10
0.01F
47F
220F
MCN1 0.022F 10F GND 47F
LASER
APC.ADJ
LDD
BH1
PH1
LF2
VR
REFI
VCC
FSS
TBC
NC
64
10pF 10k GND 4pF 20k
63
LDS
62
61
60
59
58
57
56
55
54
53
FSC
GND
0.01F
GND
0.33F
GND
100F
0.001F
1F
100F
GND
FSS.SW:Hi +F-SEARCH LOW: +F-SEARCH -
52
51
50
49
VCC RF10k
DXX
FIN2
APC SLC 48
RF
RF DET
REF
Sample Application Circuit
1
Micro-controller
DXX
DXX
FIN1
2
GND
VCA 47
DXX
DXX
E
I/V 46
CS 16M RES
3 RF AMP
4.2M COIN TEST1 TEST5 680 1 DEF1 2 TAI VDD 3 PDO 4 VVSS 5 ISET 56k 6 VVDD 7 FR 1.2k GND 33k 10 EFMIN 11 TEST2 12 CLV+ 13 CLV14 V/P 15 HFL LASER 16 TES TOFF TCL JP+ JPPCK FSEQ VDD CONT1 CONT2 CONT3 8 VSS 9 EFMO 0.1F HFL TEST11 CLV GND CQCK 0.1F
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 RWC WRQ FSX SQOUT SBCK SFSY PW EFLG 48 SBSY 47 XVSS 46 XIN 45 XOUT 44 XVDD 43 MUTER 42 RVDD 41 10pF 10pF
DXX
F
BAL 45
VCA
4
TB
REF
100k
0.22F TES
5
44
TE9.1k
6 43
TOFF 22k
TE 42
TGL
TE
7
220k
2.2k
0.1F
330 0.01F
0.033F TESI
8 7
TJP
0.1F
330F
LA9250M
41 40
NC
LC78626KE
RCHO 40 RVSS 39 LVSS 38 LCH0 37 LVDD 36 MUTEL 35 N.C. 34 TEST4 33 CONT4 CONT5 EMPH C2F DOUT TEST3 47F
GND
100F GND
LA9250M
4.7k
0.047F
REF
TA
560
56k
0.0033F FSTA
11 LATCH
38
0.047F
TD-
10k
12
EFBAL
37
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
220k
0.15F
TD
VDD
GND
REF
13
36
SP8
JP
TOFF
REF
14 SPINDLE SERVO SLED SERVO
2.2k
F. SERVO &F. LOGIC
35
TGRF
TO
P-CP
15
34
SLOF
VCC TGRF.Hi
TE GAIN DCES NOT FOLLOW RF LEVEL.
NC
16
33
FA
FD
FE
SP
FA-
FE-
SL-
FD-
SP-
SPG
SPD
SLD
SL+
47k
39k
56k
15k
470k
56k 0.47F P-CP 330
0.001F REF
47F 1.8k
0.22F
P-CP REF
SLD-
SLD+
A11271
No. 5981-16/17
100pF 10F 0.0047F
P-CP
470k 0.1F
0.15F
0.01F
390k
22k
33k
2.7k
24k
15k
15k
SLEQ
0.0033F
OSC
NC
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
0.1F
REF
SCI
9
VDD
TH
T. SERVO &T. LOGIC 39
0.22F
10
LA9250M
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of April, 2000. Specifications and information herein are subject to change without notice. PS No. 5981-17/17

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