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| MCR12DSM, MCR12DSN Preferred Device Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed for high volume, low cost, industrial and consumer applications such as motor control; process control; temperature, light and speed control. * Small Size * Passivated Die for Reliability and Uniformity * Low Level Triggering and Holding Characteristics * Device Marking: Logo, Device Type, e.g., R12DSM, Date Code http://onsemi.com SCRs 12 AMPERES RMS 600 thru 800 VOLTS G MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Peak Repetitive Off-State Voltage(1) (TJ = -40 to 110C, Sine Wave, 50 to 60 Hz, Gate Open) MCR12DSM MCR12DSN On-State RMS Current (180 Conduction Angles; TC = 75C) Average On-State Current (180 Conduction Angles; TC = 75C) Peak Non-Repetitive Surge Current (1/2 Cycle, Sine Wave 60 Hz, TJ = 110C) Circuit Fusing Consideration (t = 8.3 msec) Forward Peak Gate Power (Pulse Width 1.0 msec, TC = 75C) Forward Average Gate Power (t = 8.3 msec, TC = 75C) Forward Peak Gate Current (Pulse Width 1.0 msec, TC = 75C) Operating Junction Temperature Range Storage Temperature Range Symbol VDRM, VRRM 600 800 IT(RMS) IT(AV) ITSM 12 7.6 100 Amps Amps Amps Value Unit Volts A K 4 12 3 D-PAK CASE 369A STYLE 4 PIN ASSIGNMENT 1 I2t PGM PG(AV) IGM TJ Tstg 41 5.0 0.5 2.0 - 40 to 110 - 40 to 150 A2sec Watts Watts 2 3 4 Cathode Anode Gate Anode ORDERING INFORMATION Amps C C MCR12DSNT4 DPAK 369A Device MCR12DSMT4 Package DPAK 369A Shipping 16mm Tape and Reel (2.5K/Reel) 16mm Tape and Reel (2.5K/Reel) (1) VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the device are exceeded. Preferred devices are recommended choices for future use and best overall value. (c) Semiconductor Components Industries, LLC, 1999 1 December, 1999 - Rev. 1 Publication Order Number: MCR12DSM/D MCR12DSM, MCR12DSN THERMAL CHARACTERISTICS Characteristic Thermal Resistance -- Junction to Case Thermal Resistance -- Junction to Ambient Thermal Resistance -- Junction to Ambient(1) Maximum Lead Temperature for Soldering Purposes(2) Symbol RqJC RqJA RqJA TL Max 2.2 88 80 260 Unit C/W C ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Characteristics Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current(3) (VAK = Rated VDRM or VRRM; RGK = 1.0 KW) TJ = 25C TJ = 110C IDRM, IRRM -- -- -- -- 10 500 mA ON CHARACTERISTICS Peak Reverse Gate Blocking Voltage (IGR = 10 mA) Peak Reverse Gate Blocking Current (VGR = 10 V) Peak Forward On-State Voltage(4) (ITM = 20 A) Gate Trigger Current (Continuous dc)(5) (VD = 12 V, RL = 100 W) Gate Trigger Voltage (Continuous dc)(5) (VD = 12 V, RL = 100 W) TJ = 25C TJ = -40C VGT TJ = 25C TJ = -40C TJ = 110C IH TJ = 25C TJ = -40C IL TJ = 25C TJ = -40C tgt -- 2.0 5.0 0.5 -- 1.0 -- 6.0 10 0.5 -- 1.0 -- 6.0 10 mA 0.45 -- 0.2 0.65 -- -- 1.0 1.5 -- mA VGRM 10 IGRM -- VTM -- IGT 5.0 -- 12 -- 200 300 1.3 1.9 -- 1.2 12.5 18 Volts mA Volts mA Volts Holding Current (VD = 12 V, Initiating Current = 200 mA, Gate Open) Latching Current (VD = 12 V, IG = 2.0 mA) Turn-On Time (Source Voltage = 12 V, RS = 6.0 KW, IT = 16 A(pk), RGK = 1.0 KW) (VD = Rated VDRM, Rise Time = 20 ns, Pulse Width = 10 ms) ms DYNAMIC CHARACTERISTICS Characteristics Critical Rate of Rise of Off-State Voltage (VD = 0.67 X Rated VDRM, Exponential Waveform, RGK = 1.0 KW, TJ = 110C) Symbol dv/dt 2.0 10 -- Min Typ Max Unit V/ms (1) Surface mounted on minimum recommended pad size. (2) 1/8 from case for 10 seconds. (3) Ratings apply for negative gate voltage or RGK = 1.0 KW. Devices shall not have a positive gate voltage concurrently with a negative voltage on the anode. Devices should not be tested with a constant current source for forward and reverse blocking capability such that the voltage applied exceeds the rated blocking voltage. (4) Pulse Test: Pulse Width 2.0 msec, Duty Cycle 2%. (5) RGK current not included in measurement. http://onsemi.com 2 MCR12DSM, MCR12DSN Voltage Current Characteristic of SCR + Current Anode + VTM on state IRRM at VRRM IH Symbol VDRM IDRM VRRM IRRM VTM IH Parameter Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak On State Voltage Holding Current Reverse Blocking Region (off state) Reverse Avalanche Region Anode - + Voltage IDRM at VDRM Forward Blocking Region (off state) TC , MAXIMUM ALLOWABLE CASE TEMPERATURE ( C) P(AV) , AVERAGE POWER DISSIPATION (WATTS) 110 105 100 95 90 85 80 75 70 0 dc 16 14 12 10 8.0 6.0 4.0 2.0 0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 IT(AV), AVERAGE ON-STATE CURRENT (AMPS) 120 180 a 90 60 dc a = Conduction Angle a = 30 a 180 a = Conduction Angle 1.0 2.0 a = 30 3.0 4.0 60 5.0 90 6.0 120 7.0 8.0 IT(AV), AVERAGE ON-STATE CURRENT (AMPS) Figure 1. Average Current Derating Figure 2. On-State Power Dissipation http://onsemi.com 3 MCR12DSM, MCR12DSN I T, INSTANTANEOUS ON-STATE CURRENT (AMPS) 100 r(t) , TRANSIENT THERMAL RESISTANCE (NORMALIZED) TYPICAL @ TJ = 25C MAXIMUM @ TJ = 110C 10 1.0 0.1 ZqJC(t) = RqJC(t)Sr(t) MAXIMUM @ TJ = 25C 1.0 0.1 0 1.0 2.0 3.0 4.0 5.0 VT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) 0.01 0.1 1.0 10 100 1000 10 K t, TIME (ms) Figure 3. On-State Characteristics Figure 4. Transient Thermal Response 1000 I GT, GATE TRIGGER CURRENT (m A) 1.0 VGT, GATE TRIGGER VOLTAGE (VOLTS) 0.1 -10 5.0 20 35 50 65 80 95 110 -40 -25 -10 5.0 20 35 50 65 80 95 110 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) RGK = 1.0 KW 100 10 GATE OPEN 1.0 -40 -25 Figure 5. Typical Gate Trigger Current versus Junction Temperature Figure 6. Typical Gate Trigger Voltage versus Junction Temperature 10 RGK = 1.0 KW IH , HOLDING CURRENT (mA) IL, LATCHING CURRENT (mA) 10 RGK = 1.0 KW 1.0 1.0 0.1 -40 -25 -10 5.0 20 35 50 65 80 95 110 0.1 -40 -25 -10 5.0 20 35 50 65 80 95 110 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) Figure 7. Typical Holding Current versus Junction Temperature http://onsemi.com 4 Figure 8. Typical Latching Current versus Junction Temperature MCR12DSM, MCR12DSN 10 TJ = 25C IH, HOLDING CURRENT (mA) 8.0 STATIC dv/dt (V/m s) 100 70C 90C TJ = 110C 10 1000 6.0 IGT = 25 mA 4.0 IGT = 10 mA 2.0 0 100 1.0 1000 RGK, GATE-CATHODE RESISTANCE (OHMS) 10 K 100 RGK, GATE-CATHODE RESISTANCE (OHMS) 1000 Figure 9. Holding Current versus Gate-Cathode Resistance Figure 10. Exponential Static dv/dt versus Gate-Cathode Resistance and Junction Temperature 1000 1000 TJ = 110C 400 V STATIC dv/dt (V/ ms) 100 STATIC dv/dt (V/ ms) VD = 800 V TJ = 110C 100 IGT = 25 mA 600 V VPK = 800 V IGT = 10 mA 10 10 1.0 100 RGK, GATE-CATHODE RESISTANCE (OHMS) 1000 1.0 100 RGK, GATE-CATHODE RESISTANCE (OHMS) 1000 Figure 11. Exponential Static dv/dt versus Gate-Cathode Resistance and Peak Voltage Figure 12. Exponential Static dv/dt versus Gate-Cathode Resistance and Gate Trigger Current Sensitivity http://onsemi.com 5 MCR12DSM, MCR12DSN MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.165 4.191 0.100 2.54 0.118 3.0 0.063 1.6 0.190 4.826 0.243 6.172 inches mm DPAK http://onsemi.com 6 MCR12DSM, MCR12DSN PACKAGE DIMENSIONS D-PAK CASE 369A-13 ISSUE Z -T- B V R 4 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.250 0.250 0.265 0.086 0.094 0.027 0.035 0.033 0.040 0.037 0.047 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.090 BSC 0.175 0.215 0.020 0.050 0.020 --- 0.030 0.050 0.138 --- CATHODE ANODE GATE ANODE MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.84 1.01 0.94 1.19 4.58 BSC 0.87 1.01 0.46 0.58 2.60 2.89 2.29 BSC 4.45 5.46 0.51 1.27 0.51 --- 0.77 1.27 3.51 --- C E A S 1 2 3 Z U K F L D G 2 PL J H 0.13 (0.005) T DIM A B C D E F G H J K L R S U V Z M STYLE 4: PIN 1. 2. 3. 4. http://onsemi.com 7 MCR12DSM, MCR12DSN ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (M-F 1:00pm to 5:00pm Munich Time) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (M-F 1:00pm to 5:00pm Toulouse Time) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (M-F 12:00pm to 5:00pm UK Time) Email: ONlit@hibbertco.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, England, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-8549 Phone: 81-3-5740-2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 MCR12DSM/D |
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