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ZL40510/14 Dual Output DVD and CD 4 Channel Laser Diode Drivers
Data Sheet Features
* * * * * * * * * * * * Single 5 V supply (10%) 150 mA low-noise read channel with 100 x current gain Three 500 mA write channels with 240 x gain Combined channel output 700 mA Dual output for DVD/CD laser Rise and fall times 1 ns typical Oscillator, 500 MHz, 100 mA with external resistor control of frequency and amplitude Power Up/Down control LVDS control signals > 2 kV ESD Low Rth QFN package Contact Zarlink for available Custom Gain and Input Impedance options Ordering Information ZL40510LCE ZL40510LCF ZL40514LCE ZL40514LCF (tubes) 24 lead QFN (tape and reel) 24 lead QFN (tubes) 24 lead QFN (tape and reel) 24 lead QFN
February 2005
-40C to +85C
Applications
* * * * * * * DVDRW/RAM DVDR CD-RW CD-R Write optical drives Laser Diode current switch Supports double density DVD
19 20 21
PWR_UP INR IN2 GND GND VCC_A OUTA 18 17
22 23
IN3 IN4
GND
GND 16 OUTB VCC_B 15 14
24 1 2 3 4 5 6
GND GND_IN EN2 /EN2 EN3 /EN3 EN4 /EN4
VCC_IN 7 OSCEN 8
RFA
RFB 9 10
RSA
RSB
SELA 13
11 12
Figure 1 - Functional Block Diagram 1
Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2004-2005, Zarlink Semiconductor Inc. All Rights Reserved.
ZL40510/14
PWR_UP
Data Sheet
GND_IN
24
23
22
21
INR
20
IN4
IN3
IN2
19 18 17 16 15 14 13
EN2 /EN2 EN3 /EN3 EN4 /EN4
1 2 3 4 5 6 7 8 9 10 11 12
VCC_A OUTA GND OUTB VCC_B SELA
ZL40510
VCC_IN
OSCEN
RSA
Figure 2 - Pinout of 4x4 mm 24 Pin QFN (top view)
Description
The ZL40510/14 are high performance laser drivers capable of driving two separate cathode grounded laser diodes (e.g., 650 nm and 780 nm laser diodes). The ZL40510/14 contain a 150 mA low-noise read channel (ChR), and three 500 mA write channels (Ch2, Ch3 and Ch4). The read channel amplifies the positive current supplied at its reference input, INR, by a fixed factor of 100. Write channels amplify the positive currents supplied at its reference inputs IN2, IN3, and IN4 by a fixed factor of 240. An on-chip RF oscillator is provided for the reduction of laser mode hopping noise. The ZL40510 offers higher tolerance performance.
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Zarlink Semiconductor Inc.
RSB
RFA
RFB
ZL40510/14 Table of Contents
Data Sheet
1.0 Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 Read and Write Channel Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 On-chip RF Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.3 Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.4 Electrical and Optical Pulse Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.5 Specified Electrical Performance with 15 mm Interconnect and Zarlink ZLE40510/14 Evaluation Board. . 7 1.6 Application Layout Guide Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.7 ZLE40510/14 Interconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.0 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.0 Evaluation Boards From Zarlink Semiconductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.0 Optical Pulse Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.0 Pin List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.0 Characteristic Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.0 I/O Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 8.0 Timing Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 9.0 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 10.0 Example Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 10.1 Write Waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 10.2 Oscillator Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
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ZL40510/14 List of Figures
Data Sheet
Figure 1 - Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 2 - Pinout of 4x4 mm 24 Pin QFN (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Figure 3 - Pulse Response Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4 - ZLE40510/14 Application Board Electrical Interconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 5 - Application Schematic Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 6 - Typical Optical Eye Diagram Response* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 7 - Write Channel 2, 3 and 4 IP/OP Transfer Characteristic/Temp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 8 - Read Channel IP/OP Transfer Characteristic/Temp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 9 - Write Channel 2, 3 or 4 IP/OP Transfer Characteristic/Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 10 - Write Channel 2, 3 or 4 IP/OP Best Fit Line% Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 11 - Write Channel 2, 3 or 4 lout% Variation with Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 12 - Write Channel 2, 3 or 4 lout% Variation with Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 13 - Oscillator Frequency/RF Vcc = 5 V, Temp = 25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 14 - losc Out/Frequency/ RS = 1 K, 7.5 K, 11 K, Vcc = 5 V, Temp = 25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 15 - losc Amplitude mA pk-pk/RSA or RSB Vcc = 5 V, Temp = 25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 16 - losc/Frequency RS = 7.5 K, Vcc = 5 V, Temp = 25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 17 - Freq% Variation with Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 18 - Oscillator Noise Spectral Density Vcc = 5 V, Temp = 25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 19 - CMOS/LVTTL Input (PWR_UP, OSCEN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 20 - Oscillator Resistors (RF, RS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 21 - Read Current Input (INR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 22 - Output (OUTA, OUTB). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 23 - Write Current Input (IN2, IN3, IN4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 24 - LVDS Input (EN2, /EN2), (EN3, /EN3), (EN4, /EN4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 25 - Timing of Read or Write Channels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 26 - Output Waveform Showing Addition of Read and Write Levels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 27 - Example of Write Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 28 - Example of Oscillator Waveform Superimposed on the Read Waveform . . . . . . . . . . . . . . . . . . . . . . 28
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1.0
1.1
Data Sheet
Application Notes
Read and Write Channel Operation
The read channel is activated by applying a 'High' signal to the PWR_UP pin. In this mode, the fast write channels can be enabled by applying a 'High' signal to the respective pair of write enable pins (EN2, /EN2), (EN3, /EN3) or (EN4, /EN4). The output currents of the four channels are summed together and output as a composite signal at either OUTA (if SELA select is 'High') or OUTB (if SELA select is 'Low'). This provides the ability to drive two different laser diodes with just one ZL40510/14. Voltage control of the channel reference inputs (INR, IN2, IN3 and IN4) can be achieved quite easily using an external resistor Rref in series with the reference channel input to convert a given reference potential Vref to an input current, Iin:
I in =
Vref Rref + Rin
,
where Rin is the input impedance of the respective reference channel.
1.2
On-chip RF Oscillator
An on-chip RF oscillator is enabled if OSCEN = 'High', and its output signal is added to the appropriate current output (OUTA, if SELA select is 'High', or OUTB, if SELA select is 'Low'). The oscillator amplitude is set by an external resistor from RSA or RSB to GND. Its frequency is set by an external resistor RFA or RFB to GND. RSA and RFA are selected when SELA is `High'. The oscillator signal is summed with the programmed Write and Read levels before amplification to the output. The oscillator signal has zero DC level and +I_pk to -I_pk signal swing. Consequently, if the programmed DC level from the Write and Read Channels is less than the PK level programmed for the Oscillator, the combined signal will be clipped on the negative cycle of the signal. This will increase the harmonic content of the output signal and reduce the pk to pk amplitude output.
1.3
Thermal Considerations
Package thermal resistance is 40C/W under the EIA/JESD51-3 compliant PCB test board condition. Users should ensure that the junction temperature does not exceed 150C. Thermal resistance from junction to case and to ambient is very much dependent on how the IC is mounted onto the board, on the PCB layout and on any heat extraction arrangements. Power consumption and system ambient operating temperature limits should be noted and careful thermal gradient calculations undertaken to ensure that the junction temperature never exceeds 150C.
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1.4 Electrical and Optical Pulse Response
Data Sheet
Lfix = 3nH Iout En
2p 15 500
Lint K Lint
C_bypass
Vcc_A K Lfix = 3nH OutA
C_out
17p
ZL40510 Model Lint=5nH , BW = 460MHz, Rd=7, Q=j20/(15+7) =0.9 Lint=5nH, BW = 460MHz, Rd=3, Q=j20/(15+3) = 1.11 Lint=7nH, BW = 411MHz, Rd=7, Q=j18/(15+7) = 0.8 Lint=7nH, BW = 411MHz, Rd=3, Q=j18/(15+3) = 1.0
Cd Rd Vd
Figure 3 - Pulse Response Model Figure 3 illustrates a simplified model of the typical ZL40510/14 and the application. The ZL40510/14 consists of an ideal switched current source and an equivalent model of the ZL40510/14 output stage. The Electrical Model for the Laser Diode is a Voltage source Vd (V_on) in series with the On Resistance Rd all in parallel with the Junction Capacitance Cd. This simplified model approximately represents the Laser Diode Electrical load when operated beyond the Laser Threshold. To a first approximation, the Optical output is proportional to the current flow in the Resistor Rd. The Laser Diode and the ZL40510/14 are connected together by interconnect tracks with the return current passing through the supply decoupling bypass capacitor between ground and output Vcc. The ZL40510/14 can be approximated to an ideal switched programmed current source with a propagation delay of Iout_on (1.2 nS) and a switch transition time of 400 ps. The final output electrical pulse response parameters, Trise, Tfall, Overshoot and Undershoot are determined by the combined electrical network as illustrated in Figure 3. For example, the Rise Time and Fall Time for large current steps can be slew rate limited by the combined interconnect and fixed interconnect inductance. The Fixed Inductance represents that associated with packaging and minimum interconnect distance. The Interconnect Inductance is that associated with the additional tracking between Laser Diode and the ZL40510/14 to accommodate application physical limitations. For example, if a pulse of 360 mA amplitude (40 mA to 400 mA) is to be switched in a time of 1 nS with the Vd = 1.6 V, then the maximum volt drop across the interconnect inductance is approximately 3.5 V (maximum Vpin for 500 mA output) - 1.6 V (Vdiode) = 1.9 V. Consequently, L*di/dt < 1.9 V. Hence, L < 1.9/ (0.36A/1 nS) = 5.3 nH. Small current step size Rise and Fall time will be determined by the Bandwidth of the combined network. This is dominated by the Interconnect Inductance and the output Capacitance. Similarly, the overshoot and undershoot will be determined by the Q of the network. This is a function of the Source Impedance from the ZL40510/14, the Interconnect inductance and the Load impedance of the Laser Diode. Figure 3 includes example simplified estimates of the Q and BW of the combined Laser Diode, ZL40510/14 and interconnect network for two different interconnect inductance values (5 nH and 7 nH) and two different Diode On resistance (3 Ohm and 7 Ohm). This simple analysis illustrates the change in BW and Q of the network depending on these parameters. This in turn effects the Rise Time and Fall time and the Overshoot and Undershoot performance achieved in the application.
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Zarlink Semiconductor Inc.
ZL40510/14
1.5
Data Sheet
Specified Electrical Performance with 15 mm Interconnect and Zarlink ZLE40510/14 Evaluation Board
The specified performance in the table are results based on the electrical measurements and simulations across full process corners using the Zarlink Evaluation Board using a 3.9 Ohm resistive load to ground. The track interconnect between ZL40510/14 and the 3.9 Ohm Resistor is 15 mm long and uses a 2 mm wide track on single sided FR4 board. The return path is via two 2 mm wide tracks spaced 0.25 mm either side of the track between output and the 3.9 Ohm resistor. The combined forward and return path forms a co planar transmission line with a characteristic impedance of approximately 120 Ohms. The tight coupled return paths carrying the return current reduce the effective series inductance (Leff) which can be approximated to: Leff = 2 * Lint * (1 - K) + 2 * Lfix * (1 - K). The ZLE40510 board has two positions for the Laser Diode at two different distances. (15 and 30 mm). * * The measured value of Leff is 7 nH The estimated value of Leff = 2 * 8 (1 - 0.5) = 8 nH
The actual pulse response achieved in an application is thus dependent on the application.
1.6
Application Layout Guide Lines
Minimize interconnect inductance by: a. Using Short Interconnect Distance b. Use wide interconnect tracks c. Keep the return path tightly coupled to the forward path.
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Zarlink Semiconductor Inc.
ZL40510/14
1.7 ZLE40510/14 Interconnect
Data Sheet
Figure 4 - ZLE40510/14 Application Board Electrical Interconnect
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Zarlink Semiconductor Inc.
ZL40510/14
2.0 Application Diagram
750R 750R 750R 620R 10K
Data Sheet
1nF PWR_UP
19 18 17 16 15 14 13 7 8 9 10 11 12
GND
GND_IN
24
23
22
21
INR
20
IN4
IN3
IN2
EN2 /EN2 EN3 /EN3 EN4 /EN4
1 2 3 4 5 6
VCC_A OUTA GND OUTB
VCC
ZL40510
VCC_B SELA 470nF 470nF 470uF
VCC_IN
OSCEN
RSA
RSB
RFA
RFB
4R7 750R 12k 12k 6k2 1nF 50R
GND
Figure 5 - Application Schematic Diagram
3.0
Evaluation Boards From Zarlink Semiconductor
Zarlink Semiconductor provides an LDD evaluation board. This is primarily for those interested in performing their own assessment of the operation of the LDDs. Figure 5 shows a recommended application configuration. The inputs are connected via side launch SMA connectors. Please order as ZLE40510.
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Zarlink Semiconductor Inc.
ZL40510/14
4.0 Optical Pulse Response
Data Sheet
5nS
Figure 6 - Typical Optical Eye Diagram Response*
* (Measured using Sanyo DL-7140-201S Infra Red Laser Mounted on ZLE40510 Application Board) (I read = 50 mA, I write =125 mA, at 15 mm with 200 MHz PRBS Pattern)
Figure 6 illustrates the typical optical response measured with the ZL40510/14 mounted on the ZLE40510/14 application board driving a Sanyo DL-7140-201S Infra Red Laser. The test condition is driving a PRBS pattern at 200 MHz clock rate which is representative of a 16X DVD write pattern using Block Write Strategy with minimum write pulse of 2T duration. The Sanyo DL-7140-201S Infra Red Laser Diode On resistance is typically 3 Ohms which is representative of the On resistance of the Latest generation 250 mW pulsed High Power Red Laser Diodes that are targeted at 16X and 8X DVD. The pulse is measured stepping from a low level which is above the laser threshold thus avoiding the laser turn on transient which can distort the measured response. The ZL40510/14 exhibits excellent pulse response characteristics when used with the optimum interconnect.
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5.0 Pin List
Pin name EN2 /EN2 EN3 /EN3 EN4 /EN4 VCC_IN OSCEN RFA RFB RSA RSB SELA VCC_B OUTB GND OUTA VCC_A PWR_UP INR IN2 IN3 IN4 GND_IN Type LVDS LVDS LVDS LVDS LVDS LVDS supply digital analog analog analog analog digital supply analog supply analog supply digital analog analog analog analog supply Function Positive digital control input for channel 2 Negative digital control input for channel 2 Positive digital control input for channel 3 Negative digital control input for channel 3 Positive digital control input for channel 4 Negative digital control input for channel 4 +5 V Input power supply Oscillator enable control input, high active (TTL)
Data Sheet
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Resistor to GND sets oscillator frequency when SELA = 'High' Resistor to GND sets oscillator frequency when SELA = 'Low' Resistor to GND sets oscillator amplitude when SELA = 'High' Resistor to GND sets oscillator amplitude when SELA = 'Low' Output select input; 'High' selects OUTA, 'Low' selects OUTB (TTL) Output B Vcc Current output source B Ground Current output source A Output A Vcc Digital chip enable control input, high active (CMOS) Current input, Rin = 400 Ohms to GND Current input, Rin = 250 Ohms to GND (Optional 500 Ohms) Current input, Rin = 250 Ohms to GND (Optional 500 Ohms) Current input, Rin = 250 Ohms to GND (Optional 500 Ohms) Ground for input circuit
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Zarlink Semiconductor Inc.
ZL40510/14
Absolute Maximum Ratings Characteristic Supply voltage (VCC, VCC_IN) Input voltage (INR, IN2, IN3, IN4) Input voltage (PWR_UP, EN2, /EN2, EN3, /EN3, EN4, /EN4, OSCEN, SELA) Output voltage (OUTA, OUTB) Junction temperature Min. -0.5 -0.5 -0.5 Typ. Max. 6.0 6.0 (VCC_I N + 0.5) Vcc 150 Units V V V
Data Sheet
Comments
-0.5
V C
Operating Range Characteristic Supply voltage (VCC, VCC_IN) Input voltage (INR) Input voltage (IN2, IN3, IN4) Output voltage (OUTA, OUTB) RF RS Operating temperature range, junction -0.3 1 1 0 150 Min. 4.5 Typ. Max. 5.5 0.7 0.7 (VCCA, B-0.9) Units V V V V k k C External resistor to GND External resistor to GND Comments
Package Thermal Resistance Junction to Package Type Case RthJC ambient RthJA 40 Units Comments
24 pin QFN
K/W
Exposed paddle soldered to multi-layer PCB
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Zarlink Semiconductor Inc.
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Data Sheet
Electrical Characteristics Vcc = 5 V, Tamb = 25C, INR = 400 A, IN2 = IN3 = IN4 = 160 A, PWR_UP = High, Ch2, Ch3, Ch4 disabled, OSCEN = Low, unless otherwise specified. Characteristic Supply Current (into VCC-pin) Supply current, power down, IccPD Supply current, read mode, oscillator disabled, IccR0 Supply current, read mode, oscillator enabled, IccR1 Supply current, write mode, IccW Supply current, input off SelA & OscEn Digital Inputs Logic low voltage Logic high voltage Threshold level Logic low input current Logic high input current Power_Up Digital Input Logic low voltage Logic high voltage Logic low input current Logic high input current LVDS Digital Inputs Input voltage range Differential input voltage 0 100 2.4 600 V mV V(EN2~/EN2) LVDS Compatible V(EN3~/EN3) LVDS Compatible V(EN4~/EN4) LVDS Compatible B A 2.7 -50 50 0.5 V V A A CMOS compatible level CMOS compatible level Vin = 0 V Vin = 3.3 V A A B B -50 50 2.2 1.68 0.8 V V V A A Temperature stabilised Vin = 0 V Vin = 3.3 V A A B B B 80 69 70 210 18 220 84 85 250 A mA mA mA mA ENABLE = Low INR = 400 A OSCEN = High, RF = 6.8 kOhm, RS = 8.2 kOhm, Ch2, Ch3, Ch4 enabled Ch2, Ch3, Ch4 enabled INR = IN2 = IN3 = IN4 = 0 A A A B B Min. Typ. Max. Units Comments Type
Differential Input impedance Common mode input impedance
87
110 10
133
k internal resistor to Vcc
B B
Note: A = 100% Tested B = Guaranteed by Characterization and Design C = Guaranteed by Simulation
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Zarlink Semiconductor Inc.
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Characteristic Current Outputs (OutA & OutB) Output current, ChR Output current, Ch2, Ch3, Ch4 150 500 200 mA mA Vout 3.5 V Channel enabled, INR = 0 A, Vout 3.5 V,Iin = 2.8 mA Min. Typ. Max. Units Comments
Data Sheet
Type
B A
Total output current Write Output current, zero input, Iout0 (ZL40510) Write Output current, zero input, Iout0 (ZL40514) Read Output current, zero input, Iout0 Input impedance (INR) Input impedance (IN2, IN3, IN4) Iout supply sensitivity (any channel) Iout temperature sensitivity (any channel) Iout current output noise Current Output OutA & OutB Current gain, ChR, best fit Current gain, Ch2, best fit Current gain, Ch3, best fit Current gain, Ch4, best fit ZL40510 Output current offset, ChR, best fit. Output current offset, Ch2, best fit Output current offset, Ch3, best fit
700 12 15 2.5 330 205 -5 300 3 400 250 470 295 +5
mA mA mA mA %/V ppm/ C nA/ Hz
Ch2, 3, 4 enabled, Vout 3.5 V INR = IN2 = IN3 = IN4 = 0 A, Ch2, or Ch3 or Ch4 enabled INR = IN2 = IN3 = IN4 = 0 A, Ch2, or Ch3 or Ch4 enabled INR = IN2 = IN3 = IN4 = 0 A, Ch2, 3 & 4 disabled Rin is to GND Rin is to GND Iout = 40 mA to 300 mA Iout = 40 mA to 300 mA, Iin temp coefficient = 0 ppm/C Iout = 50 mA InR = 500 uA
A A
A B B B B B
85 205 205 205
100 240 240 240
115 275 275 275
mA/m A mA/m A mA/m A mA/m A
Iout = 20 mA to 80 mA Note 1 Iout = 20 mA to 120 mA Note 2 Iout = 20 mA to 120 mA Note 2 Iout = 20 mA to 120 mA Note 2
A A A A
-1 -4 -4
8 12 12
mA mA mA
Iout = 20 mA to 80 mA Note 1 Iout = 20 mA to 120 mA Note 2 Iout = 20 mA to 120 mA Note 2
A A A
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Characteristic Output current offset, Ch4, best fit ZL40514 Output current offset, ChR, best fit. Note 3 Output current offset, Ch2, best fit. Note 4 Output current offset, Ch3, best fit. Note 4 Output current offset, Ch4, best fit. Note 4 ZL40510 & Zl40514 Output current linearity (any channel). Note 3 Gain tracking, Ch2 to Ch3 to Ch4 -3.5 -2.5 1.5 +2.5 % % -1 -7 -7 -7 8 15 15 15 mA mA mA mA Min. -4 Typ. Max. 12 Units mA Comments
Data Sheet
Type A
Iout = 20 mA to 120 mA Note 2
Iout = 20 mA to 80 mA Note 1 Iout = 20 mA to 120 mA Note 2 Iout = 20 mA to 120 mA Note 2 Iout = 20 mA to 120 mA Note 2
A A A A
Iout = 20 mA to 120 mA Note 2 Iout = 20 mA to 120 mA Note 2
A A
Note: A = 100% Tested B = Guaranteed by Characterization and Design C= Guaranteed by Design Note 1: Gain, offset and linearity of a channel are derived from a best fit line (linear regression graph) to the following three operating points: Iout = 20mA, 50mA and 80mA. Note 2: Note 3: Note 4: Gain, offset and linearity of a channel are derived from a best fit line (linear regression graph) to the following three operating points: Iout = 20mA, 70mA and 120mA. Best Fit output line through 20mA,50mA,80mA Best Fit output line through 20mA,70mA,120mA
Electrical measurement into 3.9 Ohm to Gnd
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Zarlink Semiconductor Inc.
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Characteristic Timing Current Output OutA & OutB Channel rise time, (10% to 90%), tr2 Channel fall time, (10% to 90%), tf2 Output current overshoot (any write channel) Output current undershoot (any write channel) Channel to Channel Enable Skew Tr Channel to Channel Enable Skew Tf Iout ON propagation delay, tonCh Iout OFF propagation delay, toffCh Amplifier -3dB bandwidth (ChR) Amplifier -3dB bandwidth (Ch2, 3, 4) Power_Up & SelA Power_Up time, ton Power_Up time, toff Output A select delay Output A deselect delay 1.5 20 5 5 3.5 33 8 8 s ns ns ns 23 6 50 25 1.4 1.2 43 11 1.8 1.6 68 16 0.9 1.1 1.2 1.4 13 13 ns ns % % ps ps ns ns MHz MHz Min. Typ. Max. Units Comments
Data Sheet
Type
40 to 375 mA, Ch2, 3 or 4 pulsed
B B B B B B
40 to 375 mA, Ch2, 3 or 4 pulsed
40 to 375 mA Ch2 3, 4 pulsed 40 to 375 mA Ch2 3, 4 pulsed
50% En High-Low to 50% Iout, any write channel 50% En Low-High to 50% Iout, any write channel INR = 400 A IN2, IN3, IN4 = 400 A
B B C C
50% Enable Low-High to 50% Iout 50% Enable High-Low to 50% Iout 50% DVD/CD select Low-High to 50% IOUTA 50% DVD/CD select High-Low to 50% IOUTA
C C C C
Note: A = 100% Tested B = Guaranteed by Characterization and Design C= Guaranteed by Design (EN2, /EN2), (EN3, /EN3), (EN4, /EN4) input pulse rise and fall time = 0.4 ns. Parameter is measured Electrical Pulse Response using 3.9 Ohm load to gnd and Zarlink Application Board. Pulse response performance parameters Trise, Tfall, Overshoot and Undershoot can be limited by interconnect inductance. Optical Response is influenced by Laser Diode response. See Application Notes.
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Data Sheet
Electrical Dynamic Characteristics Vcc = 5 V, Tamb = 25C, INR = 400 uA, IN2 = IN3 = IN4 = 160 A, PWR_UP = High, Ch2, Ch3, Ch4 disabled, OSCEN = Low, unless otherwise specified. Characteristic Oscillator
Frequency adjust range Low Frequency adjust range High Frequency tolerance (ZL40510) Frequency tolerance (ZL40514) Frequency temperature coefficient
Min.
Typ.
Max.
Units
Comments
Type
250 575 338 322 375 375 200 36 100 -30 412 428
MHz MHz MHz MHz ppm/ C mA pk to pk mA pk to pk dBC
RF = 16 k, OSCEN = High RF = 2 k, OSCEN = High RF = 7.5 k, OSCEN = High RF = 7.5 k, OSCEN = High RF = 7.5 k, OSCEN = High RS = 11 k, OSCEN = High RF=9 K (350 MHz) InR = 1 mA RS = 1 k, OSCEN = High RF = 9 K (330 MHz) InR = 1 mA RS = 10 k to 2 k, OSCEN = High RF = 9 K (330 MHz) InR = 400 uA RS = 10 k to 2 k, OSCEN = High RF = 9 K (330 MHz) InR = 400 uA Fosc= 250 MHz to 450 MHz, OSCEN = High, RS 1% f = 375 MHz, RS = 7.5 k, OSCEN = High RS = 7.5 k, RF = 9 k to 4 k RF = 5.6 k, OSCEN = High 50% OSCEN High-Low to 50% Iout 50% OSCEN Low-High to 50% Iout
B B A A C B B C
Amplitude adjust range Low (RS=11K) Amplitude adjust range High (RS=1K) Third Harmonic
Second Harmonic
-20
dBC
C
Amplitude tolerance Amplitude (RS = 7.5 K)
-20
0 42 4 800
20
% mA pk to pk dB ppm/ C
C C B C B B
Amplitude flatness Amplitude temperature coefficient
Oscillator enable time, tonOsc Oscillator disable time, toffOsc
2 3
ns ns
Note: A = 100% Tested B = Guaranteed by Characterization and Design C= Guaranteed by Design (EN2, /EN2), (EN3, /EN3), (EN4, /EN4) pulse rise and fall time = 0.4 ns.
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Zarlink Semiconductor Inc.
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6.0 Characteristic Curves
Data Sheet
Figure 7 - Write Channel 2, 3 and 4 IP/OP Transfer Characteristic/Temp
Figure 8 - Read Channel IP/OP Transfer Characteristic/Temp
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Zarlink Semiconductor Inc.
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Data Sheet
Figure 9 - Write Channel 2, 3 or 4 IP/OP Transfer Characteristic/Vcc
Figure 10 - Write Channel 2, 3 or 4 IP/OP Best Fit Line% Error
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Zarlink Semiconductor Inc.
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Data Sheet
Figure 11 - Write Channel 2, 3 or 4 lout% Variation with Temperature
Figure 12 - Write Channel 2, 3 or 4 lout% Variation with Vcc
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Zarlink Semiconductor Inc.
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Data Sheet
Figure 13 - Oscillator Frequency/RF Vcc = 5 V, Temp = 25C
Figure 14 - losc Out/Frequency/ RS = 1 K, 7.5 K, 11 K, Vcc = 5 V, Temp = 25C
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Zarlink Semiconductor Inc.
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Data Sheet
Figure 15 - losc Amplitude mA pk-pk/RSA or RSB Vcc = 5 V, Temp = 25C
Figure 16 - losc/Frequency RS = 7.5 K, Vcc = 5 V, Temp = 25C
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Data Sheet
Figure 17 - Freq% Variation with Temperature
Figure 18 - Oscillator Noise Spectral Density Vcc = 5 V, Temp = 25C
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7.0 I/O Diagrams
VCC
Data Sheet
300k
Figure 19 - CMOS/LVTTL Input (PWR_UP, OSCEN)
VCC
Vref
Figure 20 - Oscillator Resistors (RF, RS)
VCC
400R
Figure 21 - Read Current Input (INR)
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Zarlink Semiconductor Inc.
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VCC
Data Sheet
Figure 22 - Output (OUTA, OUTB)
VCC
250R
Figure 23 - Write Current Input (IN2, IN3, IN4)
VCC 15k 15k
5k 110R
5k
Figure 24 - LVDS Input (EN2, /EN2), (EN3, /EN3), (EN4, /EN4)
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Zarlink Semiconductor Inc.
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8.0 Timing Waveforms
Data Sheet
Applying logic levels to the inputs, as shown in Table 1, gives the output waveform shown in Figure 26. PWR_UP 0 1 1 1 1 EN2 X 0 1 1 1 EN3 X 0 0 1 1 EN4 X 0 0 0 1 OFF READ LEVEL 2 LEVEL 3 LEVEL 4 OUTPUT
Note: 1 = logic high, 0 = logic low and X = "don't care"
Table 1 - Output Function for Set Logic Inputs
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Zarlink Semiconductor Inc.
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9.0 Timing Diagrams
/EN(n)
Data Sheet
EN(n)
Iout=Iin(n)*gain
Iout=0 t_on_ch t_off_ch
Figure 25 - Timing of Read or Write Channels
PWR_UP
50%
En2
En3
En4
LEVEL 4 LEVEL 3 LEVEL 2 READ OFF
tON_PWR_UP tON2 tON3 tON4 tOFF4 tOFF3 tOFF2 tOFF_PWR_UP
Figure 26 - Output Waveform Showing Addition of Read and Write Levels
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Zarlink Semiconductor Inc.
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10.0
10.1
Data Sheet
Example Waveforms
Write Waveform
The Write output waveform may be produced as shown in example 1, Figure 27. The Erase level is set by switching off both the Bias level and the Write level. The Write switching waveform is produced by switching off the Erase level and Switching on the Bias level and then modulating that with the Write level. The peak of the Write waveform is the sum of the Bias and the Write levels.
WRITE
INPUT
ERASE
BIAS
WRITE WRITE OUTPUT ERASE BIAS
ERASE
Figure 27 - Example of Write Waveform NOTES: 1. Only the Write signal changes to modulate the output during the Write pulse. 2. Each of the Write Channels can provide up to 500 mA. It is not necessary to add together the output of more than one Write Channel to achieve 500 mA.
10.2
Oscillator Waveform
The Oscillator may be enabled independently and is summed with the selected level.
PWR_UP
Osc_En
50%
READ OFF
Osc_tON Osc_tOFF
Figure 28 - Example of Oscillator Waveform Superimposed on the Read Waveform NOTE: The amplitude of the Oscillator must be less than the programmed DC output level to avoid clipping and subsequent increase in harmonic distortion.
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Zarlink Semiconductor Inc.
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Purchase of Zarlink's I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright Zarlink Semiconductor Inc. All Rights Reserved.
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