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E2D0018-27-41 Semiconductor
Semiconductor MSM9802/03/05-xxx
Built-in Mask ROM Voice Synthesis IC
This version: Jan. 1998 MSM9802/03/05-xxx Previous version: May. 1997
GENERAL DESCRIPTION
The MSM9802/03/05 is a PCM voice synthesis IC with built-in mask ROM. This IC employs the OKI nonlinear PCM method and contains a current mode 10-bit D/A converter and a low-pass filter. External control has been made easy by the built-in edit ROM that can form sentences by linking phrases. With the stand-alone mode/microcontroller interface mode switching pin, the MSM9802/03/ 05 can support various applications.
FEATURES
Speech period (sec) fSAM=4.0 kHz 16.0 32.4 65.1 fSAM=6.4 kHz 10.0 20.2 40.7 fSAM=8.0 kHz 8.0 16.2 32.5 fSAM=16.0 kHz 4.0 8.1 16.2
Device MSM9802 MSM9803 MSM9805
ROM size* 512 Kbits 1 Mbits 2 Mbits
*
Actual voice ROM area is smaller by 11 Kbits.
* ROM custom * 8-bit OKI nonlinear PCM method * Built-in edit ROM * Random playback function * Sampling frequency : 4.0 kHz/5.3 kHz/6.4 kHz/8.0 kHz/10.6 kHz/12.8 kHz/ 16.0 kHz Note: If RC oscillation is selected, 10.6 kHz, 12.8 kHz, and 16.0 kHz cannot be selected. * Maximum number of phrases : 63 (Microcontroller interface mode) 56 (Stand-alone mode) * Built-in current mode 10-bit D/A converter * Built-in low-pass filter * Standby function * RC oscillation (256 kHz)/ceramic oscillation(4.096 MHz) selectable * Package options: 18-pin plastic DIP (DIP18-P-300-2.54) (Product name: MSM9802-xxxRS/MSM9803-xxxRS/ MSM9805-XXXRS) 24-pin plastic SOP (SOP24-P-430-1.27-K) (Product name: MSM9802-xxxGS-K/MSM9803-xxxGS-K/ MSM9805-XXXGS-K) 30-pin plastic SSOP (SSOP30-P-56-0.65-K) (Product name: MSM9802-xxxGS-AK/MSM9803-xxxGSAK/MSM9805-XXXGS-AK) xxx indicates code number. Chip Note: This data sheet explains a stand-alone mode and a microcontroller interface mode, separately.
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CONTENTS
(1) Stand-alone Mode BLOCK DIAGRAM ............................................................................................................................. 3 PIN CONFIGURATION ..................................................................................................................... 4 PIN DESCRIPTIONS ........................................................................................................................... 6 ABSOLUTE MAXIMUM RATINGS ................................................................................................. 8 RECOMMENDED OPERATING CONDITIONS ........................................................................... 8 ELECTRICAL CHARACTERISTICS ................................................................................................ 9 TIMING DIAGRAMS ....................................................................................................................... 11 FUNCTIONAL DESCRIPTION ....................................................................................................... 13 1. Playback Code Specification ............................................................................................. 13 2. Pull-up/Pull-down Resistor .............................................................................................. 13 3. Stand-alone Mode ............................................................................................................... 13 APPLICATION CIRCUITS .............................................................................................................. 18 (2) Microcontroller Interface Mode BLOCK DIAGRAM ........................................................................................................................... PIN CONFIGURATION ................................................................................................................... PIN DESCRIPTIONS ......................................................................................................................... ABSOLUTE MAXIMUM RATINGS ............................................................................................... RECOMMENDED OPERATING CONDITIONS ......................................................................... ELECTRICAL CHARACTERISTICS .............................................................................................. TIMING DIAGRAMS ....................................................................................................................... FUNCTIONAL DESCRIPTION ....................................................................................................... 1. Playback Code Specification ............................................................................................. 2. Address Data ....................................................................................................................... 3. Stop Code ............................................................................................................................. 4. Generating Pseudo - BUSY Signal through NAR pin.................................................... APPLICATION CIRCUITS .............................................................................................................. (3) Common 1. Sampling Frequency ........................................................................................................... 2. Voice Playback Time .......................................................................................................... 3. Playback Method ................................................................................................................ 4. Edit ROM ............................................................................................................................. 5. RC Oscillation ...................................................................................................................... 6. Ceramic Oscillation ............................................................................................................ 7. Low-pass Filter .................................................................................................................... 8. Standby Transition .............................................................................................................. D/A CONVERTER CURRENT CHARACTERISTICS ................................................................ PAD CONFIGURATION .................................................................................................................
20 21 23 24 24 25 28 30 30 30 31 32 33
34 34 34 35 37 38 40 41 42 43
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BLOCK DIAGRAM
(1) STAND-ALONE MODE (CPU/STD: "L" level)
A2 A1 A0 SW2 SW1 SW0
Address & Switching Controller
6
16-Bit (MSM9802) 17-Bit (MSM9803) 18-Bit (MSM9805) Multiplexer
512-Kbit (MSM9802) 1-Mbit (MSM9803) 2-Mbit (MSM9805) ROM (Including 11 Kbits of Edit ROM & Address ROM)
8
CPU/STD RND
Random Circuit
16-Bit (MSM9802) 17-Bit (MSM9803) 18-Bit (MSM9805) Address Counter
DATA Controller PCM Synthesizer
BUSY
I/O Interface 10
OSC1 OSC2 OSC3/TEST OSC XT/RC Timing Controller
10-Bit DAC & LPF
MSM9802/03/05-xxx
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XT/CR
RESET
VDD
GND
VREF
AOUT
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PIN CONFIGURATION (TOP VIEW)
A0 A1 A2 RESET XT/CR BUSY GND VREF AOUT
1 2 3 4 5 6 7 8 9
18 SW2 17 SW1 16 SW0 15 RND 14 CPU/STD 13 OSC3/TEST 12 OSC2 11 OSC1 10 VDD
18-Pin Plastic DIP Note: Applicable to MSM9802-xxxRS, MSM9803-xxxRS, and MSM9805-XXXRS.
VDD 1 2 3 4 5 6 7 8 9 OSC1 OSC2 NC 21 NC OSC3/TEST NC 19 NC CPU/STD RND NC 16 NC SW0 10 SW1 11 SW2 12 15 A2 14 A1 13 A0
24 AOUT 23 VREF 22 GND
20 BUSY
18 XT/CR 17 RESET
NC: No connection
24-Pin Plastic SOP
Note: Applicable to MSM9802-xxxGS-K, MSM9803-xxxGS-K, and MSM9805-XXXGS-K.
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VDD OSC1 OSC2 NC NC OSC3/TEST NC CPU/STD NC
1 2 3 4 5 6 7 8 9
30 AOUT 29 VREF 28 GND 27 NC 26 NC 25 BUSY 24 NC 23 XT/CR 22 NC 21 RESET 20 NC 19 NC 18 A2 17 A1 16 A0
RND 10 NC 11 NC 12 SW0 13 SW1 14 SW2 15
NC: No connection 30-Pin Plastic SSOP Note: Applicable to MSM9802-xxxGS-AK, MSM9803-xxxGS-AK, and MSM9805-XXXGS-AK.
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PIN DESCRIPTIONS
Pin DIP SOP SSOP Symbol Type Description The IC enters the standby state if this pin is set to "L" level. At this time, oscillation stops and AOUT drives a current of 0mA and becomes GND level, then the IC returns to the initial state. This IC has a built-in 4 17 21 RESET I power-on reset circuit. To operate power-on reset correctly, apply the power within 1 ms up to VDD. If the power cannot be applied within 1 ms, apply a RESET pulse during power-on. This pin has an internal pull-up resistor. 6 5 14 20 18 7 25 23 8 BUSY XT/CR CPU/STD O I I Outputs "L" level while voice is being played back. At power-on, this pin is at "H" level. XT/RC switching pin. Set to "H" level if ceramic oscillation is used. Set to "L" level if RC oscillation is used. Microcontroller interface/stand-alone mode switching pin. Set to "L" level if the MSM9802/03/05 is used in stand-alone mode. Volume setting pin. If this pin is set to GND level, the maximum 8 23 29 VREF I current is forced in. If this pin is set to VDD level, the minimum current is forced in. This pin has a built-in pull-down resistor of approx. 10 kW. Voice output pin. 9 7 10 24 22 1 30 28 1 AOUT GND VDD O -- -- The voice signals are output as current changes. In standby state, this pin drives a current of 0 mA and becomes GND level. Ground pin. Power supply pin. Insert a bypass capacitor of 0.1 mF or more between VDD and GND pins. Ceramic oscillator connection pin when ceramic oscillation is selected. 11 2 2 OSC1 I RC connection pin when RC oscillation is selected. Input from this pin if external clock is used. Ceramic oscillator connection pin when ceramic oscillation is selected. 12 3 3 OSC2 O RC connection pin when RC oscillation is selected. Leave this pin open if external clock is used. Outputs "L" level in standby state. Leave this pin open when ceramic oscillation is used. 13 5 6 OSC3/TEST O RC connection pin when RC oscillation is selected. Outputs "H" level in standby state when RC oscillation is selected. Random playback starts if RND pin is set to "L" level. 15 8 10 RND I Fetches addresses from random address generation circuit in the IC at fall of RND. Set to "H" level when the random playback function is not used. This pin has internal pull-up resistor.
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Pin DIP SOP SSOP
Symbol
Type
Description Phrase input pins corresponding to playback sound.
16-18 10-12 13-15 SW0 - SW2
I
If input changes, SW0 to SW2 pins fetch addresses after 16 ms and start voice synthesis. Each of these pins has internal pull-down resistor. Phrase input pins corresponding to playback sound. A0 input becomes invalid if the random playback function is used.
1-3
13-15 16-18
A0 - A2
I
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ABSOLUTE MAXIMUM RATINGS
(GND=0 V) Parameter Power Supply Voltage Input Voltage Storage Temperature Symbol VDD VIN TSTG Condition Ta=25C -- Rating -0.3 to +7.0 -0.3 to VDD+0.3 -55 to +150 Unit V V C
RECOMMENDED OPERATING CONDITIONS
(GND=0 V) Parameter Power Supply Voltage Operating Temperature Master Clock Frequency 1 Master Clock Frequency 2 Symbol VDD Top fOSC1 fOSC2 Condition -- -- When crystal is selected When RC is selected (*1) Min. 3.5 200 Range 2.0 to 5.5 -40 to +85 Typ. 4.096 256 Max. 4.5 300 Unit V C MHz kHz
*1 The accuracy of the oscillation frequency when RC oscillation is selected depends largely on the accuracy of the external R and C.
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ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD=5.0 V, GND=0 V, Ta=-40 to +85C, unless otherwise specified) Parameter "H" Input Voltage "L" Input Voltage "H" Output Voltage "L" Output Voltage "H" Input Current 1 "H" Input Current 2 "H" Input Current 3 "L" Input Current 1 "L" Input Current 2 *2 *1 Symbol VIH VIL VOH VOL IIH1 IIH2 IIH3 IIL1 IIL2 IDD1 Condition -- -- IOH=-1 mA IOL=2 mA VIH=VDD Internal pull-down resistor Applies to OSC1 pin only. VIH=VDD VIL=GND Internal pull-up resistor VREF=VDD, AOUT bias voltage=0V At maximum output current Dynamic supply Current 2 *4 IDD2 VREF=GND, AOUT bias voltage=0V Standby Supply Current IDS Ta=-40 to +70C Ta=70 to 85C At maximum output current, AOUT Output Current VREF Pin Pull-down Resistance IAOUT RVREF VREF=GND, AOUT bias voltage=0V -- 7 10 13 kW 6 9.5 15 mA -- -- -- -- 10 50 A A -- -- 16 mA Min. 4.2 -- 4.6 -- -- 30 -- -10 -200 -- Typ. -- -- -- -- -- 90 -- -- -90 0.4 Max. -- 0.8 -- 0.4 10 200 15 -- -30 1 Unit V V V V A A A A A mA
Dynamic supply Current 1 *3
*1 *2 *3 *4
Applicable to SW0-SW2 Applicable to RESET, RND Dynamic supply current (excluding DAC output current) Dynamic supply current at maximum output current
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DC Characteristics
(VDD=3.1 V, GND=0 V, Ta=-40 to +85C, unless otherwise specified) Parameter "H" Input Voltage "L" Input Voltage "H" Output Voltage "L" Output Voltage "H" Input Current 1 "H" Input Current 2 "H" Input Current 3 "L" Input Current 1 "L" Input Current 2 *2 *1 Symbol VIH VIL VOH VOL IIH1 IIH2 IIH3 IIL1 IIL2 IDD1 Condition -- -- IOH=-1 mA IOL=2 mA VIH=VDD Internal pull-down resistor Applies to OSC1 pin only. VIH=VDD VIL=GND Internal pull-up resistor VREF=VDD, AOUT bias voltage=0V At maximum output current Dynamic Supply Current 2 *4 IDD2 VREF=GND, AOUT bias voltage=0V Standby Supply Current IDS Ta=-40 to +70C Ta=70 to 85C At maximum output current, AOUT Output Current VREF Pin Pull-down Resistance IAOUT RVREF VREF=GND, AOUT bias voltage=0V -- 7 10 13 kW 1.4 3.2 5 mA -- -- -- -- 5 20 A A -- -- 5.5 mA Min. 2.7 -- 2.6 -- -- 10 -- -10 -100 -- Typ. -- -- -- -- -- 30 -- -- -30 0.15 Max. -- 0.5 -- 0.4 10 100 15 -- -10 0.5 Unit V V V V A A A A A mA
Dynamic Supply Current 1 *3
*1 *2 *3 *4
Applicable to SW2-SW0 Applicable to RESET, RND Dynamic supply current (excluding DAC output current) Dynamic supply current at maximum output current
AC Characteristics
(VDD=5.0 V, GND=0 V, Ta=-40 to +85C) Parameter Master Clock Duty Cycle RESET Input Pulse Width RESET Input Time After Power-on RND Input Pulse Width SW0-SW2 Input Pulse Width BUSY Output Time Chattering Prevention Time 1 Chattering Prevention Time 2 D/A Converter Change Time Standby Transition Time Silence Time Between Phrases Random Address Fetch Time Symbol fduty tw(RST) tD(RST) tw(RAN) tw(SW) tSBS tCHA tCHB tDAR, tDAF tSTB tBLN tRA Condition -- -- -- -- -- -- -- -- -- -- fSAM=8 kHz -- Min. 40 10 0 100 16 -- 14 -- 60 200 350 15 Typ. 50 -- -- -- -- -- 15 -- 64 250 375 16 Max. 60 -- -- -- -- 10 16 16 68 300 500 17 Unit % s s s ms s ms ms ms ms s s
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TIMING DIAGRAMS
AC Characteristics at Power-On
VDD tD(RST) RESET (I) BUSY (O) tw(RST)
AC Characteristics in Standby Status and when the IC is Activated
tw(SW) SW0 (I) BUSY (O) AOUT (O) tDAR Standby status Oscillation start tSTB Standby transition time D/A converter change time tDAF Standby status tSBS Address data fetch tCHA
Repeated Playback Timing
SW0 (I) BUSY (O) AOUT (O) Single phrase playback Single phrase repeated playback tBLN
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Timing when Changing from SW2 to SW0 During Playback
A2-A0 (I) SW2 (I) "L" SW1 (I) SW0 (I) BUSY (O) AOUT (O) First phrase playback tBLN tCHB
Second phrase playback
First phrase playback stops
Repeated Playback Timing for Random Playback
RND (I) BUSY (O) AOUT (O) First phrase playback Oscillation start Same phrase repeated playback tBLN
Timing when Changing from A2 to A0 During Playback
A2-A0 (O) SW0 (I) BUSY (O) AOUT (O) First phrase playback
tBLN Second phrase playback
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FUNCTIONAL DESCRIPTION
1. Playback Code Specification The users can specify a maximum of 56 phrases. Table 1.1 shows the settings by the A2-A0 and SW2-SW0 pins. Table 1.1 User-specified Phrases
A2-A0 000 SW2-SW0 000 001 111 111 Code Details Inhibit code User-specified phrase (56 phrases)
2. Pull-up/Pull-down Resistor The RESET and RND pins have internal pull-up resistors and the SW2-SW0 pins have internal pull-down resistors. 3. Stand-alone Mode In a stand-alone mode, the SW input interface function and the random playback function can be used. 3.1 SW input interface With the SW input interface, speech synthesis starts when the state of the SW2-SW0 pins has changed. To prevent chattering, the address data is latched 16 ms (tCHA) after the state of SW2SW0 has changed. Voice synthesis does not start if the state of the A2-A0 pins has changed. Set the RND pin to "H" level if the random playback function is not used. Set the A2-A0 pins to "L" level at power-on or at reset. The SW input interface is effective when the MSM9802/03/05 is operated using a push-button switch. Voice synthesis starts when an address is changed by pressing the push-button switch. If the push-button switch is released during playback, then playback stops after the current phrase is completed.
A2-A0 (I) SW2-SW1 (I) "L" SW0 (I) BUSY (O) AOUT (O) Oscillation start tCHA tw(SW)
Figure 3.1 SW Input Interface Single-Phrase Playback Timing 13/48
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If playback is attempted at an unused address in the phrases, AOUT goes to 1/2 IAOUT and playback does not occur. Figure 3.2 shows the timing.
A2-A0 (I) SW2-SW1 (I) "L" SW0 (I) BUSY (O) AOUT (O) Oscillation start
Figure 3.2 Timing when Playback is Attempted at an Unused Phrase Address
In the SW input interface, addresses (against SW2-SW0) that do not start up voice playback exist without fail. Therefore, when the circuit consists of a diode matrices that use push-button switches, the maximum playback phrases are 56 phrases. Combinations of A2-A0 are eight kinds. When addresses of SW2-SW0 that do not start up voice playback are 000 (at power-on), 26-8=56 (phrases)
3.2 Random playback function The random playback function randomly generates 15 different addresses corresponding to the four bits of the addresses of A0 and SW2-SW0 (except ALL "L") on the IC, after which playback commences. This means there is no external input to the A0 and SW2-SW0 pins. Since the A0 pin has no internal pull-up/pull-down resistors, permanently tie it "L" or "H". Playback may not occur if all the 15 addresses have not been assigned a phrase. Care must be taken when creating ROM data. For example, when four phrases, "sunny", "rainy", "cloudy", and "snowy", are to be played randomly, set the phrases as shown in Table 3.1 to 15 addresses. The four phrases are then played back at random as shown below.
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Table 3.1 Random Address Setup Example
A2, A1 00 A0, SW2-SW0 0001 0010 0011 0100 0101 Phrase sunny rainy cloudy snowy sunny
1110 1111
rainy snowy
Random playback starts when the timing shown in Figure 3.3 is input to the RND pin. A random address is fixed based on the "H" level time of the RND pin during IC oscillation. Random address is captured at the fall of the RND pin, and voice playback commences. Therefore, when power is turned on, or when RESET is input, the phrase at fixed address "0001" is played while the random counter remains initialized until random playback is initiated.
RND (I) BUSY (O) AOUT (O) tRA
tw(RAN)
Random address fixed time
Voice output Oscillation start
Figure 3.3 Random Address Capture
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A2, A1 00 A0, SW2-SW0* 0001 1111 01 10 11 Same as above
MSM9802/03/05-xxx
Code Details Random playback address (15 addresses)
Same as above
*
Address(es) corresponding to the A0 and SW2-SW0 pins
For a random address, 15 phrases can be set for each logical condition of addresses A2 and A1 (i.e., "00", "01", "10", and "11"). In random playback, the four logic states ("000000", "010000", "100000" and "110000") in userspecified phrases cannot be used. Take it into consideration when creating ROM data. A random address is set by the "H" level time of the RND pin, so if the same pulse width is input by microcontroller, the random address fixed time becomes constant, and a random phrase may not be played under these conditions. The random address fixed time must be inconsistent in order to produce random playback.
Invalid pulse RND (I) BUSY (O) AOUT (O) Oscillation start
Figure 3.4 Timing when a Pulse is Input to the RND Pin During Random Playback
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Table 3.3 Random Playback and Stop Address
A2, A1 00 1111 01 0001 A0, SW2-SW0* 0001 Code Details Random playback address (15 addresses) Stop address
*
Address(es) corresponding to the A0 and SW2-SW0 pins
SW0 SW1 SW2 A0 A1 A2
RND
Figure 3.5 Circuit Example for Random Playback Stop
An unused user-specified address is used as a stop address, therefore the IC can enter standby without voice playback, as shown in Figure 3.2.
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APPLICATION CIRCUITS
VDD S3 S2 S1 SW0 SW1 SW2 AOUT
A0 S4 A1 A2 XT/CR CPU/STD GND OSC3 OSC2 OSC1
A2 S1 S4="L" S2 S3 S1 S4="H" S2 S3 0 0 0 0 0 0
A1 0 0 0 0 0 0
A0 0 0 0 1 1 1
SW2 0 0 1 0 0 1
SW1 0 1 0 0 1 0
SW0 1 0 0 1 0 0
Address [HEX] 01 02 04 09 0A 0C
Application Circuit for Playing Six Phrases Using Four Switches
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AOUT
VREF
OSC3
OSC2
OSC1 A2 GND
VDD
CPU/STD
XT/CR
SW0
SW1
SW2
RND
A0
1
2
3
4
5
6
7
Application Circuit Using Switches
A1
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BLOCK DIAGRAM
(2) MICROCONTROLLER INTERFACE MODE (CPU/STD: "H" level)
I5 I4 I3 I2 I1 I0
Address Controller
6
16-Bit (MSM9802) 17-Bit (MSM9803) 18-Bit (MSM9805) Multiplexer
512-Kbit (MSM9802) 1-Mbit (MSM9803) 2-Mbit (MSM9805) ROM (Including 11Kbit of Edit ROM & Address ROM)
8
CPU/STD ST NAR
I/O Interface
16-Bit (MSM9802) 17-Bit (MSM9803) 18-Bit (MSM9805) Address Counter
DATA Controller PCM Synthesizer
10
OSC1 OSC2 OSC3/TEST OSC XT/RC Timing Controller
10-Bit DAC & LPF
MSM9802/03/05-xxx
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XT/CR
RESET
VDD
GND
VREF
AOUT
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PIN CONFIGURATION (TOP VIEW)
I3 I4 I5 RESET XT/CR NAR GND VREF AOUT
1 2 3 4 5 6 7 8 9
18 I2 17 I1 16 I0 15 ST 14 CPU/STD 13 OSC3/TEST 12 OSC2 11 OSC1 10 VDD
18-Pin Plastic DIP Note: Applicable to MSM9802-xxxRS, MSM9803-xxxRS, and MSM9805-XXXRS.
VDD 1 2 3 4 5 6 7 8 9 OSC1 OSC2 NC 21 NC OSC3/TEST NC 19 NC CPU/STD ST NC 16 NC I0 10 I1 11 I2 12 15 I5 14 I4 13 I3
24 AOUT 23 VREF 22 GND
20 NAR
18 XT/CR 17 RESET
NC: No connection
24-Pin Plastic SOP
Note: Applicable to MSM9802-xxxGS-K, MSM9803-xxxGS-K, and MSM9805-XXXGS-K.
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VDD OSC1 OSC2 NC NC OSC3/TEST NC CPU/STD NC
1 2 3 4 5 6 7 8 9
30 AOUT 29 VREF 28 GND 27 NC 26 NC 25 NAR 24 NC 23 XT/CR 22 NC 21 RESET 20 NC 19 NC 18 I5 17 I4 16 I3
ST 10 NC 11 NC 12 I0 13 I1 14 I2 15
NC: No connection 30-Pin Plastic SSOP Note: Applicable to MSM9802-xxxGS-AK, MSM9803-xxxGS-AK, and MSM9805-XXXGS-AK.
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PIN DESCRIPTIONS
Pin DIP SOP SSOP Symbol Type Description The IC enters the standby state if this pin is set to "L" level. At this time, oscillation stops and AOUT drives a current of 0 mA and becomes GND level, then the IC returns to the initial state. This IC has a built-in 4 17 21 RESET I power-on reset circuit. To operate power-on reset correctly, apply the power within 1 ms up to VDD. If the power cannot be applied within 1ms, apply a RESET pulse during power-on. This pin has an internal pull-up resistor. Signal output pin that indicates whether the 6-bit LATCH (see Block 6 20 25 NAR O Diagram) is idle. NAR at "H" level indicates that the LATCH is empty and ST input is enabled. 5 14 18 7 23 8 XT/CR CPU/STD I I XT/RC switching pin. Set to "H" level if ceramic oscillation is used. Set to "L" level if RC oscillation is used. Microcontroller interface/stand-alone mode switching pin. Set to "H" level if the MSM9802/03/05 is used in microcontroller interface mode. Volume setting pin. If this pin is set to GND level, the maximum 8 23 29 VREF I current is forced in, and if set to VDD level, the minimum current is forced in. This pin has a built-in pull-down resistor of approx. 10 kW. Voice output pin. 9 7 10 24 22 1 30 28 1 AOUT GND VDD O -- -- The voice signals are output as current changes. In standby state, this pin drives a current of 0 mA and becomes GND level. Ground pin. Power supply pin. Insert a bypass capacitor of 0.1 mF or more between this pin and the GND pin. Ceramic oscillator connection pin when ceramic oscillation is selected. 11 2 2 OSC1 I RC connection pin when RC oscillation is selected. Input from this pin if external clock is used. Ceramic oscillator connection pin when ceramic oscillation is selected. 12 3 3 OSC2 O RC connection pin when RC oscillation is selected. Leave this pin open if external clock is used. Outputs "L" level in standby state. Leave this pin open when ceramic oscillation is used. 13 5 6 OSC3/TEST O RC connection pin when RC oscillation is selected. Outputs "H" level in standby state when RC oscillation is selected. Voice synthesis starts at fall of ST, and addresses I0 to I5 are fetched 15 16-18 1-3 8 10 ST I at rise of ST. Input ST when NAR, the status signal, is at "H" level. This pin has internal pull-up resistor. 10-15 13-18 I0 - I5 I Phrase input pins corresponding to playback sound.
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ABSOLUTE MAXIMUM RATINGS
(GND=0V) Parameter Power Supply Voltage Input Voltage Storage Temperature Symbol VDD VIN TSTG Condition Ta=25C -- Rating -0.3 to +7.0 -0.3 to VDD+0.3 -55 to +150 Unit V V C
RECOMMENDED OPERATING CONDITIONS
(GND=0 V) Parameter Power Supply Voltage Operating Temperature Original Oscillation Frequency 1 Original Oscillation Frequency 2 Symbol VDD Top fOSC1 fOSC2 Condition -- -- When crystal is selected When RC is selected (*1) Min. 3.5 200 Range 2.0 to 5.5 -40 to +85 Typ. 4.096 256 Max. 4.5 300 Unit V C MHz kHz
*1 The accuracy of the oscillation frequency when RC oscillation is selected depends largely on the accuracy of the external R and C.
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ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD=5.0 V, GND=0 V, Ta=-40 to +85C, unless otherwise specified) Parameter "H" Input Voltage "L" Input Voltage "H" Output Voltage "L" Output Voltage "H" Input Current 1 "H" Input Current 2 "L" Input Current 1 "L" Input Current 2 *1 Symbol VIH VIL VOH VOL IIH1 IIH2 IIL1 IIL2 IDD1 Condition -- -- IOH=-1 mA IOL=2 mA VIH=VDD Applies to OSC1 pin only. VIH=VDD VIL=GND Internal pull-up resistor VREF=VDD, AOUT bias voltage=0V At maximum output current Dynamic Supply Current 2 *3 IDD2 VREF=GND, AOUT bias voltage=0V Standby Supply Current IDS Ta=-40 to +70C Ta=70 to 85C At maximum output current, AOUT Output Current VREF Pin Pull-down Resistance IAOUT RVREF VREF=GND, AOUT bias voltage=0V -- 7 10 13 kW 6 9.5 15 mA -- -- -- -- 10 50 A A -- -- 16 mA Min. 4.2 -- 4.6 -- -- -- -10 -200 -- Typ. -- -- -- -- -- -- -- -90 0.4 Max. -- 0.8 -- 0.4 10 15 -- -30 1 Unit V V V V A A A A mA
Dynamic Supply Current 1 *2
*1 Applicable to RESET, ST *2 Dynamic supply current (excluding DAC output current) *3 Dynamic supply current at maximum output current
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Semiconductor DC Characteristics
MSM9802/03/05-xxx
(VDD=3.1 V, GND=0 V, Ta=-40 to +85C, unless otherwise specified) Parameter "H" Input Voltage "L" Input Voltage "H" Output Voltage "L" Output Voltage "H" Input Current 1 "H" Input Current 2 "L" Input Current 1 "L" Input Current 2 *1 Symbol VIH VIL VOH VOL IIH1 IIH2 IIL1 IIL2 IDD1 Condition -- -- IOH=-1 mA IOL=2 mA VIH=VDD Applies to OSC1 pin only. VIH=VDD VIL=GND Internal pull-up resistor VREF=VDD, AOUT bias voltage=0V At maximum output current Dynamic Supply Current 2 *3 IDD2 VREF=GND, AOUT bias voltage=0V Standby Supply Current IDS Ta=-40 to +70C Ta=70 to 85C At maximum output current, AOUT Output Current VREF Pin Pull-down Resistance IAOUT RVREF VREF=GND, AOUT bias voltage=0V -- 7 10 13 kW 1.4 3.2 5 mA -- -- -- -- 5 20 A A -- -- 5.5 mA Min. 2.7 -- 2.6 -- -- -- -10 -100 -- Typ. -- -- -- -- -- -- -- -30 0.15 Max. -- 0.5 -- 0.4 10 15 -- -10 0.5 Unit V V V V A A A A mA
Dynamic Supply Current 1 *2
*1 Applicable to RESET, ST *2 Dynamic supply current (excluding DAC output current) *3 Dynamic supply current at maximum output current
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Semiconductor AC Characteristics
MSM9802/03/05-xxx
(VDD=5.0 V, GND=0 V, Ta=-40 to +85C) Parameter Master Clock Duty Cycle RESET Input Pulse Width RESET Input Time After Power-on ST Signal Setup Time ST Input Pulse Width ST-ST Pulse Interval Data Setup Time Data Hold Time NAR Output Time (1) NAR Output Time (2) NAR Output Time (3) NAR Output Time (4) D/A Converter Change Time Standby Transition Time (at end of voice output) Silence Time Between Phrases Symbol fduty tw(RST) tD(RST) tSTP t(ST) tSS tDW tWD tSNS tNAA tNAB tNAC tDAR, tDAF tSTB tBLN Condition -- -- -- At power-on -- Upon entering the stop code -- -- fSAM=8 kHz fSAM=8 kHz fSAM=8 kHz fSAM=8 kHz -- -- fSAM=8 kHz Min. 40 10 0 1 0.35 40 1 1 -- 350 315 350 60 200 350 Typ. 50 -- -- -- -- -- -- -- -- 375 440 375 64 250 375 Max. 60 -- -- -- 2000 -- -- -- 10 400 500 500 68 300 500 Unit % s s s s s s s s s s s ms ms s
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Semiconductor
MSM9802/03/05-xxx
TIMING DIAGRAMS
AC Characteristics at Power-On
VDD RESET ( I ) NAR (O) ST (I)
tD(RST) tW(RST) tSTP
AC Characteristics in Standby Status and when the IC is Activated
I5-I0 (I) t(ST) ST ( I ) NAR (O) tDW tWD
tSNS
AOUT (O) tDAR Oscillation start
tNAA Voice playback tSTB tDAF
Standby transition time D/A converter change time
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Semiconductor
Playback Timing
I5-I0 (I)
1st phrase address
2nd phrase address
3rd phrase address
ST ( I ) tNAC NAR (O) tNAB AOUT (O) tDAR
Oscillation start 1st phrase playback 2nd phrase playback 3rd phrase playback
tBLN
MSM9802/03/05-xxx
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Semiconductor
MSM9802/03/05-xxx
FUNCTIONAL DESCRIPTION
1. Playback Code Specification The user can specify a maximum of 63 phrases. Table 1.1 shows the settings by the I5-I0 pins. Table 1.1 User-specified Phrases
I5-I0 000000 000001 111111 Code Details Stop code User-specified phrase (63 Phrases)
2. Address Data If a phrase is input at I5-I0 pins by address data, and if a ST pulse is then applied, voice playback starts. Figure 2.1 shows voice start timing. Figure 2.2 shows timing when an address other than a phrase is input.
I5-I0 (I) ST ( I ) NAR (O) AOUT (O) Oscillation start
User phrase
Voice end
Figure 2.1 Voice Start Timing
I5-I0 (I) ST ( I ) NAR (O) AOUT (O) Oscillation start
Address other than user phrase
Figure 2.2 Timing when Address Other than a Phrase is Input in Stand-by Mode
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Semiconductor
MSM9802/03/05-xxx
3. Stop Code If I5-I0 are set to "000000" during voice playback, and a ST signal is input, playback stops regardless of whether NAR is at "H" or "L" level, then AOUT becomes 1/2 IAOUT. Stop code becomes valid at the falling edge of ST. Figure 3.1 shows stop code input timing.
I5-I0 (I) "000000" tSS ST ( I ) NAR (O) User phrase
AOUT (O) Voice stop
Figure 3.1 Stop Code Input Timing The stop code does not initialize internal units but only stops playback. To initialize an internal register, use the RESET pin.
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Semiconductor
MSM9802/03/05-xxx
4. Generating Pseudo-BUSY Signal through NAR Pin If the application in use requires a BUSY signal when this IC is used in microcontroller interface mode, a pseudo-BUSY signal can be generated through the NAR pin by controlling signal timing, as shown below. 4.1 When edit ROM is not used
I5-I0 01 (Phrase 1)
02 (Phrase 2) 03 (Phrase 3) 04 (Silence phrase of 32 ms or more)
ST 30ms or more NAR (Pseudo-BUSY) AOUT tDAR Phrase 1 Phrase 2 tNAB Phrase 3 tNAB
Silence phrase
30ms or more
30ms or more
tSTB
tDAF
tNAB
4.2 When edit ROM is used
01 I5-I0 (Phrases 1+2+3) 02 (Silence phrase of 32 ms or more)
ST 30ms or more NAR (Pseudo-BUSY) AOUT tDAR Phrase 1 Phrase 2 tBLN Phrase 3 tBLN
Silence phrase
tSTB
tDAF
tNAB
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Semiconductor
MSM9802/03/05-xxx
APPLICATION CIRCUIT
+ - VDD P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 P2.2 P2.1 P3.0 I5 I4 I3 I2 I1 I0 ST RESET NAR CPU/STD XT/CR OSC2 OSC1 GND VREF
MSC1157 (Speaker AMP)
VCC
MSM83C154 (MCU)
SP SP
MSM9802/03/05
AOUT
AIN
RESET XTAL1 XTAL2
OSC3
STBY VR GND
SEL
+ -
Application Circuit when Used as Microcontroller Interface
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Semiconductor
MSM9802/03/05-xxx
(3) Common
1. Sampling Frequency Sampling frequencies can be specified for each phrase in the voice data of the internal ROM. The following seven frequencies can be selected when creating voice data: 4.0 kHz, 5.3 kHz, 6.4 kHz, 8.0 kHz, 10.6 kHz, 12.8 kHz, 16.0 kHz Note: When RC oscillation is selected, 10.6 kHz, 12.8 kHz, and 16 kHz cannot be selected. 2. Voice Playback Time Table 2.1 shows the internal ROM configuration. The actual ROM area in the voice data is different from the indicated ROM capacity. The Voice data management area and edit ROM area contain 4 Kbits each, and the test data area contains approx. 3 Kbits. Table 2.1 ROM Configuration
Edit ROM Area Voice Data Management Area Test Data Area Voice Data Area
Use the following expression for a rough estimate of voice playback time. Playback time = ((internal ROM capacity) - 4 - 4 - 3) [Kbits] 1024 / 8 / (sampling frequency) [kHz] For example, if data is created at an 8.0 kHz sampling rate, the playback time is (512 - 4 - 4 - 3) [Kbits] 1024 / 8 / 8000 [Hz] = 8.0 [sec] 3. Playback Method (Nonlinear PC Method) The MSM9802/03/05 uses the nonlinear PCM method. Its accuracy around the center of a waveform is equivalent to the 10-bit straight PCM.
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Semiconductor 4. Edit ROM
MSM9802/03/05-xxx
With the internal edit ROM, the MSM9802/03/05 can perform continuous playback of multiple phrases with the same control as single phrase playback. For example: The phrase "Today's weather is ..." can be used to illustrate the differences between an IC without the edit ROM and the MSM9802/03/05. In the case of an IC without the edit ROM, individual data must be stored as a phrase in ROM (see Table 4.1), then for playback of "Today's weather is sunny" and "Today's weather is rainy", each phrase must be addressed individually. On the other hand, the MSM9802/03/05 has edit ROM functions, which eliminate the need for an external microcontroller to provide the continuous timing necessary for voice concatenation. This means that individual phrases or words which are stored in phrase ROM can be concatenated in the edit ROM and assigned a single address according to their content. This feature allows for efficient use of memory for phrase storage in ROM. Table 4.2 shows phrases/words stored in ROM and their addresses, Table 4.3 shows how you can combine the phrase/word addresses (up to a maximum of 8) in the edit ROM to achieve fully concatenated phrases. The edit ROM can also perform silence playback without storing silence data in the voice data area. Minimum silence time ............ 32 ms Maximum silence time ........... 2016 ms Setting of silence time ............. every 32 ms steps
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Semiconductor
MSM9802/03/05-xxx
Table 4.1 Conventional Phrase ROM Configuration
Adress [HEX] 01 02 03 3F Phrase Today's weather is sunny. Today's weather is rainy. Today's weather is sunny becoming cloudy, rainy in some areas.
Table 4.2 Phrase ROM Configuration with Edit ROM
Address [HEX] 01 02 03 10 11 12 13 20 21 22 3F Phrase Today's weather is sunny cloudy rainy snowy occasionally becoming in some areas
Table4.3 Edit ROM Configuration
Address [HEX] 01 02 03 3F Edit Content (Up to 8 Phrases) [01][02][10][03] [01][02][12][03] [01][02][10][21][11][22][12][03]
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Semiconductor 5. RC Oscillation
MSM9802/03/05-xxx
Figure 5.1 shows an external circuit using RC oscillation. Figure 5.2 shows the RC oscillation frequency characteristics.
R1 OSC1 R2 OSC2 C OSC3
Figure 5.1 RC Oscillation
500 450 400 Oscillaiton Frequency fOSC (kHz) 350 300 250 200 150 100 50 0
VDD=3 V C=47 pF VDD=5 V C=47 pF VDD=5 V C=30 pF
R1=100 kW
VDD=3 V C=30 pF
10
20
30
40
50
60
70
Load Resistance R2 (kW)
Figure 5.2 RC Oscillation Frequency Characteristics
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Semiconductor 5.1 Determining RC constants
MSM9802/03/05-xxx
The RC oscillation frequecy characteristics are shown in Figure 5.2. If fosc is set to 256 kHz, use the following values as a guide (see Figure 5.2) to set the C and R2 that fit the printed-circuit board type used. R1=100 kW, R2=30 kW, C=30 pF When choosing RC oscillation, the RC oscillation frequency varies according to the fluctuation of the external C and R2. 5.2 Fluctuation of RC oscillation frequencies When choosing RC oscillation, the error of RC oscillation frequency due to process variations of the IC is 4% maximum, and the fluctuation of the RC oscillation frequency when using a capacitor (C) of 1% accuracy and a resistor (R2) of 2% accuracy is a maximum of 7% approximately.
6. Ceramic Oscillation Figure 6.1 shows an external circuit using a ceramic oscillator.
OSC1
OSC2
C1
C2
Figure 6.1 Ceramic Oscillation Diagram Figures 6.2 and 6.3 show external circuits using a ceramic oscillator, CSA4.09MGU and CST4.09MGWU made by Murata MFG. Co., Ltd. Operating range: VDD=3.0 to 5.5 V, Ta=-40 to +85C
OSC1
OSC2
OSC1
OSC2
30pF
30pF
Internal Capacitor
Figure 6.2 CSA4.09MGU
Figure 6.3 CST4.09MGWU
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Semiconductor
MSM9802/03/05-xxx
Figures 6.4 and 6.5 show external circuits using a ceramic oscillator, PBRC4.00A/KBR-4.0MSB and PBRC4.00B/KBR-4.0MKC made by Kyocera Corp. Operating range: VDD=3.1 to 5.5V, Ta=-20 to +80C Note: When using an oscillator 4.00 MHz, playback speed is approximately 2% slower than AR761 and AR762 analysis tools and demonstration board.
OSC1
OSC2
OSC1
OSC2
33pF
33pF
Internal Capacitor
Figure 6.4 PBRC4.00A/KBR-4.0MSB
Figure 6.5 PBRC4.00B/KBR-4.0MKC
Figures 6.6 shows an external circuit using the ceramic oscillator CCR4.00MC3 made by TDK Corp. Operating range: VDD=2.4 to 5.5V, Ta=-40 to +85C Note: When a 4.00 MHz oscillator is used, the playback speed is approximately 2% slower than a voice played with the analysis tools AR761 and AR762 and a demonstration board.
OSC1
OSC2
Internal Capacitor
Figure 6.6 CCR4.00MC3
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Semiconductor 7. Low-Pass Filter
MSM9802/03/05-xxx
In this IC, all voice outputs are through the built-in low-pass filter (LPF). Figure 7.1 and Table 7.2 show the LPF frequency characteristics and LPF cutoff frequency respectively. Only the voice output through LPF is enabled in this IC.
[dB] 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 10 100 1k 10k [Hz]
Figure. 7.1 LPF Frequency Characteristics (fSAM=8 kHz)
Table 7.2 LPF Cutoff Frequency
Sampling Frequency (kHz) (fSAM) 4.0 5.3 6.4 8.0 10.6 12.8 16.0 Cutoff Frequency (kHz) (fCUT) 1.2 1.6 2.0 2.5 3.2 4.0 5.0
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Semiconductor 8. Standby Transition
MSM9802/03/05-xxx
When playback of a phrase is finished, if playback of the next pharase does not start up within tSTB (0.25 sec. typ.), the IC enters standby status and the entire operation stops.
A2 - A0
SW2 - SW1 "L"
SW0
BUSY
AOUT
Figure 8.1 Timing for Voice Playback during D/A Converter Change Time (Stand-alone Mode)
I5 - I0
ST
NAR
AOUT
Figure 8.2 Timing for Voice Playback during D/A Converter Change Time (Microcontroller Interface Mode)
If playback is attempted during D/A converter change time as shown in figures 8.1 and 8.2, the IC exits from standby status and the output from the D/A converter begins going to the 1/2 IAOUT level. When the output reaches 1/2 IAOUT, voice playback starts.
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Semiconductor
MSM9802/03/05-xxx
D/A CONVERTER OUTPUT CURRENT CHARACTERISTICS
Power Supply Voltage vs. Output Current Characteristics (Ta=25C, VAOUT=0V)
AOUT Output Current [mA]
14 12 10 8 6 4 2 0 0 1 2 3 4 5 6
Power Supply Voltage [V]
Temperature vs. Output Current Characteristics (VDD=5V, VAOUT=0V)
AOUT Output Current [mA]
14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100
Ambient Temperature Ta [C]
VREF Voltage vs. Output Current Characteristics (Ta=25C, VDD=5V, VAOUT=0V)
10
AOUT Output Current [mA]
8 6 4 2 0 0.0
0.5
1.0
1.5
2.0
2.5 VREF [V]
3.0
3.5
4.0
4.5
5.0
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Semiconductor
MSM9802/03/05-xxx
PAD CONFIGURATION MSM9802
Pad Layout Chip size Chip thickness Pad size Substrate potential : : : : X=3.22mm Y=3.17mm 350m 30m 110m 110m GND
Y-axis 3 4 MSM9802 2 1 18 17 16 15
14 X-axis
5 (NC) 6 13
7
8
9
10 11
12
Pad Coordinates (Chip center is located at X=0 and Y=0)
(Unit: m) Pad No. 1 2 3 4 5 6 7 8 9 Pad Name I3/ (A0) I4/ (A1) I5/ (A2) RESET XT/CR NAR GND VREF AOUT X-axis -415 -816 -1460 -1460 -1458 -1460 -1460 -1135 -585 Y-axis 1385 1385 1385 1049 -20 -899 -1375 -1333 -1333 Pad No. 10 11 12 13 14 15 16 17 18 Pad Name VDD OSC1 OSC2 OSC3 CPU/STD ST/(RND) I0/(SW0) I1/(SW1) I2/(SW2) X-axis 462 742 1349 1460 1389 1389 1389 719 276 Y-axis -1347 -1333 -1333 -972 183 1058 1385 1385 1385
Pad name in parentheses is for stand-alone mode. 43/48
Semiconductor
MSM9802/03/05-xxx
MSM9803
Pad Layout Chip size Chip thickness Pad size Substrate potential : : : : X=3.22mm Y=4.06mm 350m 30m 110m 110m GND
Y-axis 3 2 1 18 17 16
4
MSM9803
15
14
5 X-axis
(NC) 6 13
7
8
9
10 11
12
Pad Coordinates (Chip center is located at X=0 and Y=0)
Pad No. 1 2 3 4 5 6 7 8 9 Pad Name I3/ (A0) I4/ (A1) I5/ (A2) RESET XT/CR NAR GND VREF AOUT X-axis -415 -816 -1460 -1460 -1458 -1460 -1460 -1135 -585 Y-axis 1829 1829 1829 1493 424 -1342 -1818 -1776 -1776 Pad No. 10 11 12 13 14 15 16 17 18 Pad Name VDD OSC1 OSC2 OSC3 CPU/STD ST/(RND) I0/(SW0) I1/(SW1) I2/(SW2) X-axis 452 742 1349 1460 1389 1389 1389 720 276
(Unit: m) Y-axis -1788 -1776 -1776 -1415 628 1502 1829 1829 1829
Pad name in parentheses is for stand-alone mode.
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Semiconductor
MSM9802/03/05-xxx
MSM9805
Pad Layout Chip size Chip thickness Pad size Substrate potential : : : : X=3.22mm Y=5.96mm 350m 30m 110m 110m GND
Y-axis 3 2 1 18 17 16
15 4 5 MSM9805 14 X-axis
(NC) 6 13
7
8
9
10 11
12
Pad Coordinates (Chip center is located at X=0 and Y=0)
Pad No. 1 2 3 4 5 6 7 8 9 Pad Name I3/ (A0) I4/ (A1) I5/ (A2) RESET XT/CR NAR GND VREF AOUT X-axis -415 -816 -1460 -1460 -1458 -1460 -1460 -1136 -585 Y-axis 2777 2777 2777 882 364 -1546 -2768 -2726 -2726 Pad No. 10 11 12 13 14 15 16 17 18 Pad Name VDD OSC1 OSC2 OSC3 CPU/STD ST/(RND) I0/(SW0) I1/(SW1) I2/(SW2) X-axis 452 742 1349 1460 1453 1455 1432 754 312
(Unit: m) Y-axis -2723 -2726 -2726 -1532 267 1338 2777 2777 2777
Pad name in parentheses is for stand-alone mode. 45/48
Semiconductor
MSM9802/03/05-xxx
PACKAGE DIMENSIONS
(Unit : mm)
DIP18-P-300-2.54
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 1.30 TYP.
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Semiconductor
MSM9802/03/05-xxx
(Unit : mm)
SOP24-P-430-1.27-K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.58 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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Semiconductor
MSM9802/03/05-xxx
(Unit : mm)
SSOP30-P-56-0.65-K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.19 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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