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Final Electrical Specifications
LT6552 3.3V Single Supply Video Difference Amplifier
FEATURES
s s s s s s s s s s s s s
DESCRIPTIO
July 2003
Differential or Single-Ended Gain Block Wide Supply Range 3V to 12.6V Output Swings Rail-to-Rail Input Common Mode Range Includes Ground 600V/s Slew Rate -3dB Bandwidth = 75MHz, AV = 2 CMRR at 10MHz: >60dB Output Swings Rail-to-Rail Specified on 3.3V, 5V and 5V Supplies High Output Drive: 70mA Power Shutdown to 300A Operating Temperature Range: -40C to 85C Tiny 3mm x 3mm x 1mm DFN Package
The LT(R)6552 is a video difference amplifier optimized for low voltage single supply operation. This versatile amplifier features uncommitted high input impedance (+) and (-) inputs and can be used in differential or single-ended configurations. A second set of inputs gives gain adjustment and DC control to the differential amplifier. On a single 3.3V supply, the input voltage range extends from ground to 1.3V and the output can swing to within 400mV of the supply voltage while driving a 150 load. The LT6552 features 75MHz - 3dB bandwidth, 600V/s slew rate, and 70mA output current making it ideal for driving cables directly. The LT6552 maintains its performance for supplies from 3V to 12.6V and is fully specified at 3.3V, 5V and 5V supplies. The shutdown feature reduces power dissipation to less than 1mW and allows multiple amplifiers to drive the same cable. The LT6552 is available in the 8-pin SO package as well as a tiny, dual fine pitch leadless package (DFN). The device is specified over the commercial and industrial temperature range.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
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Differential to Single-Ended Conversion Video Line Driver Automotive Displays RGB Amplifiers Coaxial Cable Drivers Low Voltage High Speed Signal Processing
TYPICAL APPLICATIO
Cable Sense Amplifier for Loop Through Connections with DC Adjust
COMMON MODE REJECTION RATIO (dB)
Input Referred CMRR vs Frequency
100 90 80 70 60 50 40 30 20 10 100k 1 10 FREQUENCY (MHz) 100
6552 TA01b
VS = 5V, 0V
VIN 5V CABLE VDC = 0.25V 3 2 7 + - LT6552 4 RF 500 RG 500 CF 8pF 75 VOUT 75
1 REF 8 FB
6
6552 TA01a
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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VCM = 0V
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ABSOLUTE
AXI U RATI GS (Note 1)
Operating Temperature Range (Note 4) ...-40C to 85C Specified Temperature Range (Note 5) ....-40C to 85C Maximum Junction Temperature .......................... 150C (DD Package) ................................................... 125C Storage Temperature Range ..................-65C to 150C (DD Package) ....................................-65C to 125C Lead Temperature (Soldering, 10 sec).................. 300C
Supply Voltage (V + to V -) .................................... 12.6V Input Current (Note 2) ........................................ 10mA Input Voltage Range ................................................. VS Differential Input Voltage +Input (Pin 3) to -Input (Pin 2) ................................ VS Output Short-Circuit Duration (Note 3) ............ Indefinite
PACKAGE/ORDER I FOR ATIO
TOP VIEW REF -IN +IN V- 1 2 3 4 8 7 6 5 FB V+ OUT SHDN
ORDER PART NUMBER LT6552CDD LT6552IDD DD PART MARKING* ADR
REF 1 -IN 2 +IN 3 V- 4
DD PACKAGE 8-LEAD (3mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 160C/W (NOTE 3) UNDERSIDE METAL INTERNALLY CONNECTED TO V- (PCB CONNECTION OPTIONAL)
*The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges.
3.3V ELECTRICAL CHARACTERISTICS
SYMBOL VOS VOS/T IB IOS PARAMETER Input Offset Voltage Input VOS Drift Input Bias Current Input Offset Current Any Input
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 3.3V, 0V. Figure 1 shows the DC test circuit, VREF = VCM = 1V, VDIFF = 0V, VSHDN = V+, unless otherwise noted. RL = RF + RG = 1k. (Note 6)
CONDITIONS Both Inputs (Note 7)
q q q q
Either Input Pair
2
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WW
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TOP VIEW 8 7 6 5 FB V+ OUT SHDN
ORDER PART NUMBER LT6552CS8 LT6552IS8 S8 PART MARKING 6552 6552I
S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150C, JA = 100C/W
MIN
TYP 5 40 25 1
MAX 20 25 50 5
UNITS mV mV V/C A A
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3.3V ELECTRICAL CHARACTERISTICS
SYMBOL en in RIN CMRR PSRR GE VOH PARAMETER Input Noise Voltage Density Input Noise Current Density Input Resistance Common Mode Rejection Ratio Input Range Power Supply Rejection Minimum Supply (Note 8) Gain Error Swing High
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 3.3V, 0V. Figure 1 shows the DC test circuit, VREF = VCM = 1V, VDIFF = 0V, VSHDN = V+, unless otherwise noted. RL = RF + RG = 1k. (Note 6)
CONDITIONS f = 10kHz f = 10kHz Common Mode, VCM = 0V to 1.3V VCM = 0V to 1.3V VS = 3V to 12V VO = 0.5V to 2V, RL = 1k RL = 150 (VDIFF = 0.4V), VREF (Pin 1) = 0V, AV = 10 RL = 1k RL = 150 RL = 75 (VDIFF = -0.1V), VREF(Pin 1) = 0V, AV = 10 RL = 1k ISINK = 5mA ISINK = 10mA VOUT = 0.5V to 2.5V Measure from 1V to 2V, RL = 150, AV = 2 VO = 2VP-P AV = 2, RL = 150 AV =50, VO = 0.5V to 2.5V, 20% to 80%, RL = 150 AV = 2, VOUT = 2V RL = 150 AV = 2, RL = 150, Black Level = 0.6V AV = 2, RL = 150, Black Level = 0.6V VOUT = 0V, VDIFF = 1V
q q q q q q q q q
MIN
TYP 55 0.7 300
MAX
UNITS nV/Hz pA/Hz k dB
58 0 48 3
75 1.3 54 1 1 3 3
V dB V % % V V V
3.1 2.5 2
3.2 2.9 2.5 8 65 40 350 55 65 125 20 30 0.4 0.15 175 50 120 200
VOL
Swing Low
q q q
mV mV mV V/s MHz MHz ns ns ns % Deg mA mA
SR FPBW BW tr, tf tS
Slew Rate Full-Power Bandwidth (Note 9) Small-Signal -3dB Bandwidth Rise Time, Fall Time (Note 10) Settling Time to 3% Settling Time to 1% Differential Gain Differential Phase
ISC IS
Short-Circuit Current Supply Current
35 25
50 12 13.5 15 750 0.5
q
mA mA A V V A A ns ns
Supply Current Shutdown VL VH Shutdown Pin Input Low Voltage Shutdown Pin Input High Voltage Shutdown Pin Current tON tOFF Turn On-Time Turn Off-Time
VSHDN = 0.5V
q q q
300 3 40 3 250 450
VSHDN = 0.5V VSHDN = 3V VSHDN from 0.5V to 3V VSHDN from 3V to 0.5V
q q
150 10
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The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, 0V; Figure 1 shows the DC test circuit, VREF = VCM = 1V, VDIFF = 0V, VSHDN = V+, unless otherwise noted. RL = RF + RG = 1k. (Note 6)
SYMBOL VOS VOS/T IB IOS en in RIN CMRR PSRR GE VOH PARAMETER Input Offset Voltage Input VOS Drift Input Bias Current Input Offset Current Input Noise Voltage Density Input Noise Current Density Input Resistance Common Mode Rejection Ratio Input Range Power Supply Rejection Minimum Supply (Note 8) Gain Error Swing High VO = 0.5V to 3.5V, RL = 1k RL = 150 (VDIFF = 0.6V), VREF(Pin 1) = 0V, AV = 10 RL = 1k RL = 150 RL = 75, 0C TA 70C (Only) (VDIFF = -0.1V), VREF (Pin 1) = 0V, AV = 10 RL = 1k ISINK = 5mA ISINK = 10mA VOUT = 0.5V to 3.5V Measure from 1V to 3V, RL = 150, AV = 2 VO = 2VP-P AV = 2, RL = 150 5V, 0V; AV = 50, VO = 0.5V to 3.5V, 20% to 80%, RL = 1k AV = 2, VOUT = 2V RL = 150 AV = 2, RL = 150, Black Level = 1V AV = 2, RL = 150, Black Level = 1V VOUT = 0V, VDIFF = 1V 0C TA 70C -40C TA 85C
q q q
5V ELECTRICAL CHARACTERISTICS
CONDITIONS Both Inputs (Note 7)
q q
MIN
TYP 5 40 25 1 55 0.7 300
MAX 20 25 50 5
UNITS mV mV V/C uA uA nV/Hz pA/Hz k dB
Any Input Either Input Pair f = 10kHz f = 10kHz Common Mode, VCM = 0V to 3V VCM = 0V to 3V VS = 3V to 12V
q q
q q q q q q q q q q q q
58 0 48 3
75 3 54 1 1 3 3
V dB V % % V V V
4.8 3.6 2.75
4.875 4.3 3.4 8 65 110 450 70 70 125 20 30 0.25 0.04 175 50 120 200
VOL
Swing Low
mV mV mV V/s MHz MHz ns ns ns % Deg mA mA mA
SR FPBW BW tr, tf tS
Slew Rate Full-Power Bandwidth (Note 9) Small-Signal -3dB Bandwidth Rise Time, Fall Time Settling Time to 3% Settling Time to 1% Differential Gain Differential Phase
ISC
Short-Circuit Current
50 45 35
70
IS
Supply Current Supply Current Shutdown VSHDN = 0.5V
q q q
13 400 4.7 70 4
14.5 16 900 0.5 200 10
mA mA A V V A A
VL VH
Shutdown Pin Input Low Voltage Shutdown Pin Input High Voltage Shutdown Pin Current VSHDN = 0.5V VSHDN = 4.7V
q q
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5V ELECTRICAL CHARACTERISTICS
SYMBOL tON tOFF PARAMETER Turn-On Time Turn-Off Time
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, 0V. Figure 1 shows the DC test circuit, VREF = VCM = 1V, VDIFF = 0V, VSHDN = V+, unless otherwise noted. RL = RF + RG = 1k. (Note 6)
CONDITIONS VSHDN from 0.5V to 4.7V VSHDN from 4.7V to 0.5V MIN TYP 250 450 MAX UNITS ns ns
5V ELECTRICAL CHARACTERISTICS
SYMBOL VOS VOS/T IB IOS en in RIN CMRR PSRR GE PARAMETER Input Offset Voltage Input VOS Drift Input Bias Current Input Offset Current Input Noise Voltage Density Input Noise Current Density Input Resistance Common Mode Rejection Ratio Input Range Power Supply Rejection Gain Error Output Voltage Swing Any Input Either Input Pair f = 10kHz f = 10kHz CONDITIONS
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V. Figure 2 shows the DC test circuit, VREF = VCM = 0V, VDIFF = 0V, VSHDN = V +, unless otherwise noted. RL = RF + RG = 1k. (Note 6)
MIN
q q q q
TYP 10 50 25 1 55 0.7 300
MAX 25 30 50 5
UNITS mV mV V/C A A nV/Hz pA/Hz k dB
Both Inputs (Note 7)
Common Mode, VCM = -5V to 3V VCM = -5V to 3V VS = 2V to 6V, VCM = 0V VO = -3V to 3V, RL = 1k RL = 150 (VDIFF = 0.6V), VREF (Pin 1) = 0V, AV = 10 RL = 1k RL = 150 RL = 75, 0C TA 70C (Only) VCM = 0V, VDIFF = -1.5V to +1.5V, VO = -5V to 5V Measure from -2V to 2V, RL = 150 VO = 6VP-P (Note 9) AV = 50, VO = -3V to 3V, 20% to 80% AV = 2, VOUT = 6V RL = 150 AV = 2, RL = 150 AV = 2, RL = 150 VOUT = 0V, VDIFF = 1V 0C TA 70C -40C TA 85C VSHDN = -4.5V
q q q q q q q q q q q q
58 -5 48
75 3 54 1 1 3 3
V dB % % V V V V/s MHz MHz
4.8 3.6 2.75 400
4.875 4.3 3.4 600 30 75 125 25 35 0.2 0.15 175
SR FPBW BW tr, tf tS
Slew Rate Full-Power Bandwidth Small-Signal -3dB Bandwidth Rise Time, Fall Time Settling Time to 3% Settling Time to 1% Differential Gain Differential Phase
ns ns ns % Deg mA mA mA
ISC
Short-Circuit Current
50 45 35
70
Supply Current Shutdown IS VL VH Supply Current Shutdown Pin Input Low Voltage Shutdown Pin Input High Voltage
650 14
1400 16.5 18.5 -4.5
A mA mA V V
q q
4.7
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LT6552
5V ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER Shutdown Pin Current tON tOFF Turn-On Time Turn-Off Time
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V. Figure 2 shows the DC test circuit, VREF = VCM = 0V, VDIFF = 0V, VSHDN = V +, unless otherwise noted. RL = RF + R6 = 1k. (Note 6)
CONDITIONS VSHDN = -4.5V VSHDN = 4.7 VSHDN from - 4.5V to 4.7V VSHDN from 4.7V to -4.5V
q q
MIN
TYP 85 3 200 400
MAX 250 10
UNITS A A ns ns
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The inputs are protected from ESD with diodes to the supplies. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum. Note 4: The LT6552C/LT6552I are guaranteed functional over the temperature range of -40C to 85C. Note 5: The LT6552C is guaranteed to meet specified performance from 0C to 70C and is designed, characterized and expected to meet specified performance from -40C to 85C, but is not tested or QA sampled at these temperatures. The LT6552I is guaranteed to meet specified performance from - 40C to 85C.
RG 100 0.1%
Note 6: When RL = 1k is specified, the load resistor is RF + RG, but when RL = 150 or RL = 75 is specified, then an additional resistor of that value is added to the output. Note 7: VOS measured at the output (Pin 6) is the contribution from both input pairs and is input referred. Note 8: Minimum supply is guaranteed by the PSRR test. Note 9: Full power bandwidth is calculated from the slew rate. FPBW = SR/2Vp Note 10: VS = 3.3V limits are guaranteed by correlation to VS = 5V and 5V tests.
RG 100 0.1%
REF
FB V+ OUT SHDN VSHDN
- +
VREF
VDIFF
-IN +IN V-
1F
REF RF 900 0.1%
FB V+ OUT SHDN VSHDN
- + + -
VDIFF VCM V-
-IN +IN V- 1F
1F
RF 900 0.1%
+ -
+ -
VCM
+ -
+ -
V+
RL
6552 F01
+ -
+ -
+ -
V+
RL
6552 F02
Figure 1. 3.3V, 5V DC Test Circuit
Figure 2. 5V DC Test Circuit
APPLICATIO S I FOR ATIO
The LT6552 is a video difference amplifier with two pairs of high impedance inputs. The primary purpose of the LT6552 is to convert high frequency differential signals into a single-ended output, while rejecting any common mode noise. In the simplest configuration, one pair of inputs are connected to the incoming differential signal, while the other pair of inputs are used to set the amplifier gain and DC level. The device will operate on either single or dual supplies and has an input common mode range which includes the negative supply. The common mode rejection ratio is greater than 60dB at 10MHz.
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Figure 3 shows the single supply connection. The amplifier gain is set by a feedback network from the output to Pin 8 (FB). A DC signal applied to pin 1 (REF) establishes the output quiescent voltage and the differential signal is applied to Pins 2 and 3. Figure 4 shows several other connections using dual supplies. In each case, the amplifier gain is set by a feedback network from the output to Pin 8 (FB).
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LT6552
APPLICATIO S I FOR ATIO
Amplifier Characteristics
Figure 5 shows a simplified schematic of the LT6552. There are two input stages, the first one consists of transistors Q1 to Q8 for the (+) and (-) inputs while the second input stage consists of transistors Q9 to Q16 for the reference and feedback inputs. This topology provides high slew rates at low supply voltages. The input common mode range extends from ground to typically 1.75V from VCC, and is limited by 2 VBE's plus a saturation voltage of current sources I1-I4. Each input stage drives the degeneration resistors of PNP and NPN current mirrors, Q17 to Q20, that convert the differential signals into a singleended output. The complementary drive generator supplies current to the output transistors that swing from railto-rail.
SHDN 3 2 5 V+
VIN 3 2 SHDN 5 V+
VINDIFF VIN
1 REF 8 FB
7 + - LT6552 4 RF
6
VO
1 REF 8 FB
7 + - LT6552 4 V- RF
VO = (VINDIFF + VIN) RG
RF + R G RG
6552 F01
RG
Figure 3
I1
I2
I3
Q2
Q3
Q5 R1
Q7
Q10
Q1
Q4
Q6
Q8
Q9
V+ RIN1 DESD1 DESD2 3 +IN V- DESD3 DESD4
V+ RIN2 RIN3
V+ DESD5 DESD6 DESD7 DESD8
V-
2 -IN
1 REF
V-
Figure 5. Simplified Schematic
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The current generated through R1 or R2, divided by the capacitor CM, determines the slew rate. Note that this current, and hence the slew rate are proportional to the magnitude of the input step. The input step equals the output step divided by the closed loop gain. The highest slew rates are therefore obtained in the lowest gain configurations. ESD The LT6552 has reverse-biased ESD protection diodes on all inputs and outputs, as shown in Figure 5. If these pins are forced beyond either supply, unlimited current will flow through these diodes. If the current is transient in nature and limited to 100mA or less, no damage to the device will occur.
SHDN 3 2 5 SHDN V+ VINDIFF VO VIN RG 3 2 5 V+ 7 + - LT6552 4 V- RF 7 + - LT6552 4 V- RF 6 VO VIN 1 REF 8 FB 6 1 REF 8 FB 6 VO VO = +
W
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( R R+ R ( V
F G G
IN
RG
VO = -
( R R+ R ( V
F G G
IN
VO =
( R R+ R ( V
F G G
INDIFF -
R ( R (V
F G
IN
6552 F01
Figure 4
7 V+ I4 I5 R3 R4 Q21 Q17 Q11 Q13 R2 Q15 Q18 CM V+ DESD9 Q12 Q14 Q16 COMPLEMENTARY DRIVE GENERATOR Q19 Q20 Q22 I6 V+ RIN4 BIAS 8 FB R5 R6 4 V- V+ DESD11 5 SHDN DESD12 V-
6552 TA02
6 OUT DESD10 V-
V-
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LT6552
PACKAGE DESCRIPTIO
0.675 0.05
3.5 0.05 1.65 0.05 2.15 0.05 (2 SIDES) PACKAGE OUTLINE 0.28 0.05 0.50 BSC 2.38 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN 1 TOP MARK
.045 .005 .050 BSC .010 - .020 x 45 (0.254 - 0.508) .008 - .010 (0.203 - 0.254) .245 MIN .160 .005 .016 - .050 (0.406 - 1.270) NOTE: 1. DIMENSIONS IN .030 .005 TYP RECOMMENDED SOLDER PAD LAYOUT .014 - .019 (0.355 - 0.483) TYP .050 (1.270) BSC .053 - .069 (1.346 - 1.752) 0- 8 TYP 8 .004 - .010 (0.101 - 0.254) .228 - .244 (5.791 - 6.197)
INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
RELATED PARTS
PART NUMBER LT1193 LT1675 LT1809/LT1810 LT6550/LT6551 DESCRIPTION Av = 2 Video Difference Amp RGB Multiplexer with Current Feedback Amplifiers Single/Dual 180MHz, Rail-to-Rail Input and Output Amplifiers 3.3V Triple and Quad Video Amplifiers COMMENTS 80MHz BW, 500V/s, Shutdown -3dB Bandwidth = 250MHz, 100MHz Pixel Switching 350V/s Slew Rate, Shutdown, Low Distortion -90dBc at 5MHz Internal Gain of 2, 110MHz -3dB Bandwidth, Input Common Modes to Ground
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
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FAX: (408) 434-0507 q www.linear.com
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DD Package 8-Lead Plastic DFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1698)
R = 0.115 TYP 5 0.38 0.10 8 3.00 0.10 (4 SIDES) 1.65 0.10 (2 SIDES)
(DD8) DFN 0203
0.200 REF
0.75 0.05
4 0.28 0.05 2.38 0.10 (2 SIDES)
1 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 4. EXPOSED PAD SHALL BE SOLDER PLATED
S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 - .197 (4.801 - 5.004) NOTE 3 7 6 5
.150 - .157 (3.810 - 3.988) NOTE 3
1
SO8 0303
2
3
4
6552i LT/TP 0703 1K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 2003

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