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19-1559; Rev 0; 10/99
Low-Power, 12-Bit Voltage-Output DAC with Serial Interface
__________________General Description
The MAX5302 combines a low-power, voltage-output, 12-bit digital-to-analog converter (DAC) and a precision output amplifier in an 8-pin MAX package. It operates from a single +5V supply, drawing less than 280A of supply current. The output amplifier's inverting input is available to the user, allowing specific gain configurations, remote sensing, and high output current capability. This makes the MAX5302 ideal for a wide range of applications, including industrial process control. Other features include a software shutdown and power-on reset. The serial interface is SPITM/QSPITM/MICROWIRETM compatible. The DAC has a double-buffered input, organized as an input register followed by a DAC register. A 16-bit serial word loads data into the input register. The DAC register can be updated independently or simultaneously with the input register. All logic inputs are TTL/CMOSlogic compatible and buffered with Schmitt triggers to allow direct interfacing to optocouplers. o +5V Single-Supply Operation o Low Supply Current: 0.28mA Normal Operation 2A Shutdown Mode o Available in 8-Pin MAX o Power-On Reset Clears DAC Output to Zero o SPI/QSPI/MICROWIRE Compatible o Schmitt-Trigger Digital Inputs for Direct Optocoupler Interface
Features
o 12-Bit DAC with Configurable Output Amplifier
MAX5302
Ordering Information
PART MAX5302CUA MAX5302EUA TEMP. RANGE 0C to +70C -40C to +85C PIN-PACKAGE 8 MAX 8 MAX
Applications
Industrial Process Control Automatic Test Equipment Digital Offset and Gain Adjustment Motion Control Remote Industrial Control Microprocessor-Controlled Systems
Functional Diagram
GND VDD REF FB OUT DAC OUT 1 CS 2 INPUT REGISTER CS DIN SCLK DIN 3 SCLK 4 16-BIT SHIFT REGISTER
Pin Configuration
TOP VIEW
DAC REGISTER CONTROL
8
VDD GND REF FB
MAX5302
7 6 5
MAX5302 MAX
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
Low-Power, 12-Bit Voltage-Output DAC with Serial Interface MAX5302
ABSOLUTE MAXIMUM RATINGS
VDD to GND ..............................................................-0.3V to +6V REF, OUT, FB to GND ................................-0.3V to (VDD + 0.3V) Digital Inputs to GND ...............................................-0.3V to +6V Continuous Current into Any Pin.......................................20mA Continuous Power Dissipation (TA = +70C) 8-Pin MAX (derate 4.10mW/C above +70C) .........330mW Operating Temperature Ranges MAX5302CUA ...................................................0C to +70C MAX5302EUA ................................................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 8, VDD = +5V 10%, VREF = +2.5V, RL = 5k, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C. Output buffer connected in unity-gain configuration.) PARAMETER Resolution Differential Nonlinearity Integral Nonlinearity (Note 1) Offset Error Offset-Error Tempco Gain Error (Note 1) Gain-Error Tempco Power-Supply Rejection Ratio REFERENCE INPUT Reference Input Range Reference Input Resistance Reference -3dB Bandwidth Reference Feedthrough Signal-to-Noise Plus Distortion Ratio DIGITAL INPUTS Input Voltage High Input Voltage Low Input Leakage Current Input Capacitance VIH VIL IIN CIN VIN = 0 or VDD 0.001 8 2.4 0.8 0.5 V V A pF SINAD VREF RREF Code dependent, minimum at code 1554 hex VREF = 0.67Vp-p Input code = all 0s, VREF = 3.6Vp-p at 1kHz VREF = 1Vp-p at 25kHz, code = full scale 0 14 20 650 -84 77 VDD - 1.4 V k kHz dB dB PSRR 4.5V VDD 5.5V SYMBOL N DNL INL VOS TCVOS GE 0.3 6 -0.3 1 800 3 Guaranteed monotonic CONDITIONS MIN 12 1.0 4 8 TYP MAX UNITS Bits LSB LSB mV ppm/C LSB ppm/C V/V
STATIC PERFORMANCE--ANALOG SECTION
MULTIPLYING-MODE PERFORMANCE
2
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Low-Power, 12-Bit Voltage-Output DAC with Serial Interface
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 8, VDD = +5V 10%, VREF = +2.5V, RL = 5k, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C. Output buffer connected in unity-gain configuration.) PARAMETER DYNAMIC PERFORMANCE DIGITAL INPUTS Voltage Output Slew Rate Output Settling Time Output Voltage Swing Current into FB Start-Up Time Digital Feedthrough POWER SUPPLIES Supply Voltage Supply Current Supply Current in Shutdown Reference Current in Shutdown TIMING CHARACTERISTICS (Figure 6) SCLK Clock Period SCLK Pulse Width High SCLK Pulse Width Low CS Fall to SCLK Rise Setup Time SCLK Rise to CS Rise Hold Time DIN Setup Time DIN Hold Time SCLK Rise to CS Fall Delay CS Rise to SCLK Rise Hold Time CS Pulse Width High tCP tCH tCL tCSS tCSH tDS tDH tCS0 tCS1 tCSW 100 40 40 40 0 40 0 40 40 100 ns ns ns ns ns ns ns ns ns ns VDD IDD (Note 3) (Note 3) 4.5 0.28 4 0.001 5.5 0.4 20 0.5 V mA A A CS = VDD, DIN = 100kHz SR To 1/2LSB, VSTEP = 2.5V Rail-to-rail (Note 2) 0.6 14 0 to VDD 0.001 20 5 0.1 V/s s V A s nVs SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX5302
Note 1: Guaranteed from code 11 to code 4095 in unity-gain configuration. Note 2: Accuracy is better than 1LSB for VOUT = 8mV to (VDD - 100mV), guaranteed by a power-supply rejection test at the end points. Note 3: RL = , digital inputs at GND or VDD.
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3
Low-Power, 12-Bit Voltage-Output DAC with Serial Interface MAX5302
__________________________________________Typical Operating Characteristics
(VDD = +5V, RL = 5k, CL = 100pF, TA = +25C, unless otherwise noted.)
INTEGRAL NONLINEARITY vs. REFERENCE VOLTAGE
MAX5302 toc01
REFERENCE VOLTAGE INPUT FREQUENCY RESPONSE
MAX5302 toc02
SUPPLY CURRENT vs. TEMPERATURE
380 360 SUPPLY CURRENT (A) 340 320 300 280 260 240 220 RL =
MAX5302 toc03
0.3 0.2 0.1 0 INL (LSB) -0.1 -0.2 -0.3 -0.4 -0.5 0.4 1.2 2.0 2.8 3.6 REFERENCE VOLTAGE (V)
0
400
-4 RELATIVE OUTPUT (dB)
-8
-12
-16
-20 4.4 0 500k 1M 1.5M 2M 2.5M 3M FREQUENCY (Hz)
200 -60
-20
20
60
100
140
TEMPERATURE (C)
POWER-DOWN SUPPLY CURRENT vs. TEMPERATURE
MAX5302 toc04
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5302 toc05
POWER-DOWN SUPPLY CURRENT (A)
9 8
450 400 SUPPLY CURRENT (A) 350 300 250 200 150 100 50 0
-55 -60 THD + NOISE (dB) -65 -70 -75 -80 -85 -90
VREF = 2.5VDC + 1Vp-p SINE CODE = FULL SCALE
7 6 5 4 3 2 1 0 -60 -20 20 60 100 140
4.0
4.4
4.8
5.2
5.6
6.0
1
10 FREQUENCY (kHz)
100
TEMPERATURE (C)
SUPPLY VOLTAGE (V)
OUTPUT FFT PLOT
MAX5302 toc07
FULL-SCALE OUTPUT vs. LOAD
MAX5302 toc08
REFERENCE FEEDTHROUGH AT 1kHz
REFERENCE INPUT SIGNAL -20 SIGNAL AMPLITUDE (dB)
MAX5302-09a/09b
0
FULL-SCALE OUTPUT (V)
-20 SIGNAL AMPLITUDE (dB)
VREF = 3.6Vp-p CODE = FULL SCALE fIN = 1kHz
2.49980 2.49976 2.49972 2.49968 2.49964 2.49960 2.49956 0.1k
0
-40
-40
-60
-60 OUTPUT FEEDTHROUGH -80
-80
-100 0.5 1.6 2.7 3.8 4.9 6.0 FREQUENCY (kHz)
-100 1k 10k LOAD () 100k 1M 0.5 1.6 2.7 3.8 4.9 6.0 FREQUENCY (kHz)
4
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MAX5302 toc06
10
500
TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
-50
Low-Power, 12-Bit Voltage-Output DAC with Serial Interface MAX5302
Typical Operating Characteristics (continued)
(VDD = +5V, RL = 5k, CL = 100pF, TA = +25C, unless otherwise noted.)
MAJOR-CARRY TRANSITION
MAX5302 toc10
DIGITAL FEEDTHROUGH (fSCLK = 100kHz)
MAX5302 toc11
CS 5V/div
SCLK 2V/div
OUT AC-COUPLED 100mV/div
OUT AC-COUPLED 10mV/div CODE = 2048 10s/div CS = 5V 2s/div
DYNAMIC RESPONSE
MAX5302 toc12
OUT 1V/div
GND
10s/div GAIN = 2, SWITCHING FROM CODE 0 TO 4020
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5
Low-Power, 12-Bit Voltage-Output DAC with Serial Interface MAX5302
_____________________Pin Description
PIN 1 2 3 4 5 6 7 8 NAME OUT CS DIN SCLK FB REF GND VDD FUNCTION
R R R FB
OUT
DAC Output Voltage Chip-Select Input. Active low. Serial-Data Input Serial-Clock Input DAC Output Amplifier Feedback Reference Voltage Input Ground Positive Power Supply
REF AGND SHOWN FOR ALL 1s ON DAC 2R 2R 2R 2R 2R MSB
Figure 1. Simplified DAC Circuit Diagram
Detailed Description
The MAX5302 contains a voltage-output digital-to-analog converter (DAC) that is easily addressed using a simple 3-wire serial interface. The IC includes a 16-bit shift register, and has a double-buffered input composed of an input register and a DAC register (see Functional Diagram). In addition to the voltage output, the amplifier's negative input is available to the user. The DAC is an inverted R-2R ladder network that converts a digital input (12 data bits plus 1 sub-bit) into an equivalent analog output voltage in proportion to the applied reference voltage. Figure 1 shows a simplified circuit diagram of the DAC.
In shutdown mode, the MAX5302's REF input enters a high-impedance state with a typical input leakage current of 0.001A. The reference input capacitance is also code dependent and typically ranges from 15pF (with an input code of all 0s) to 50pF (at full scale). The MAX873 +2.5V reference is recommended for the MAX5302.
Output Amplifier
The MAX5302's DAC output is internally buffered by a precision amplifier with a typical slew rate of 0.6V/s. Access to the output amplifier's inverting input provides the user greater flexibility in output gain setting/signal conditioning (see the Applications Information section). With a full-scale transition at the MAX5302 output, the typical settling time to 1/2LSB is 14s when loaded with 5k in parallel with 100pF (loads less than 2k degrade performance). The amplifier's output dynamic responses and settling performances are shown in the Typical Operating Characteristics.
Reference Inputs
The reference input accepts positive DC and AC signals. The voltage at the reference input sets the full-scale output voltage for the DAC. The reference input voltage range is 0 to (VDD - 1.4V). The output voltage (VOUT) is represented by a digitally programmable voltage source, as expressed in the following equation: VOUT = (VREF * NB / 4096) Gain where NB is the numeric value of the DAC's binary input code (0 to 4095), VREF is the reference voltage, and Gain is the externally set voltage gain. The impedance at the reference input is code dependent, ranging from a low value of 14k when the DAC has an input code of 1554 hex, to a high value exceeding several gigaohms (leakage currents) with an input code of 0000 hex. Because the input impedance at the reference pin is code dependent, load regulation of the reference source is important.
6
Shutdown Mode
The MAX5302 features a software-programmable shutdown that reduces supply current to a typical value of 4A. Writing 111X XXXX XXXX XXXX as the input control word puts the device in shutdown mode (Table 1). In shutdown mode, the amplifier's output and the reference input enter a high-impedance state. The serial interface remains active. Data in the input registers is retained in shutdown, allowing the MAX5302 to recall the output state prior to entering shutdown. Exit shutdown mode by either recalling the previous configuration or
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Low-Power, 12-Bit Voltage-Output DAC with Serial Interface
by updating the DAC with new data. When powering up the device or bringing it out of shutdown, allow 20s for the output to stabilize.
SCLK SK
MAX5302
Serial-Interface Configurations
MICROWIRE PORT
MAX5302
DIN
SO
CS
I/O
The MAX5302's 3-wire serial interface is compatible with both MICROWIRE (Figure 2) and SPI/QSPI (Figure 3). The serial-input word consists of 3 control bits followed by 12+1 data bits (MSB first), as shown in Figure 4. The 3-bit control code determines the MAX5302's response outlined in Table 1. The MAX5302's digital inputs are double buffered. Depending on the command issued through the serial interface, the input register can be loaded without affecting the DAC register, the DAC register can be loaded directly, or the DAC register can be updated from the input register (Table 1).
Figure 2. Connections for MICROWIRE
+5V
Serial-Interface Description
The MAX5302 requires 16 bits of serial data. Table 1 lists the serial-interface programming commands. For certain commands, the 12+1 data bits are "don't cares." Data is sent MSB first and can be sent in two 8-bit packets or one 16-bit word (CS must remain low until 16 bits are transferred). The serial data is composed of 3 control
SS
DIN
MOSI SPI/QSPI PORT
MAX5302
MSB ..................................................................................LSB 16 Bits of Serial Data Control Bits C2 C1 3 Control Bits Figure 4. Serial-Data Format C0 Data Bits MSB ................................LSB Sub-Bit D11 .....................................D0, S0 12+1 Data Bits
SCLK
SCK
CS
I/O
CPOL = 0, CPHA = 0
Figure 3. Connections for SPI/QSPI
Table 1. Serial-Interface Programming Commands
16-BIT SERIAL WORD C2 X X X 1 0 C1 0 0 1 1 1 C0 0 1 0 1 1 D11...............D0 MSB LSB 12 bits of data 12 bits of data XXXXXXXXXXXX XXXXXXXXXXXX XXXXXXXXXXXX S0 FUNCTION S0 0 0 X X X Load input register; DAC register immediately updated (also exit shutdown). Load input register; DAC register unchanged. Update DAC register from input register (also exit shutdown; recall previous state). Shutdown No operation (NOP)
X = Don't care _______________________________________________________________________________________ 7
Low-Power, 12-Bit Voltage-Output DAC with Serial Interface MAX5302
CS COMMAND EXECUTED 1 DIN C2 C1 C0 D11 D10 D9 D8 8 D7 D6 9 D5 D4 D3 D2 D1 D0 16 S0
SCLK
Figure 5. Serial-Interface Timing Diagram
CS tCSO SCLK tDS DIN tDH tCSS tCL tCH tCP tCSH tCS1
tCSW
Figure 6. Detailed Serial-Interface Timing Diagram
DIN SCLK CS1 CS2 CS3
TO OTHER SERIAL DEVICES
CS
CS
CS
MAX5302
SCLK DIN
MAX5302
SCLK DIN
MAX5302
SCLK DIN
Figure 7. Multiple MAX5302s Sharing Common DIN and SCLK Lines
8
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Low-Power, 12-Bit Voltage-Output DAC with Serial Interface
bits (C2, C1, C0), followed by the 12+1 data bits D11...D0, S0 (Figure 4). Set the sub-bit (S0) to zero. The 3-bit control code determines the register to be updated and the configuration when exiting shutdown. Figures 5 and 6 show the serial-interface timing requirements. The chip-select (CS) pin must be low to enable the DAC's serial interface. When CS is high, the interface control circuitry is disabled. CS must go low at least tCSS before the rising serial-clock (SCLK) edge to properly clock in the first bit. When CS is low, data is clocked into the internal shift register through the serialdata input pin (DIN) on SCLK's rising edge. The maximum guaranteed clock frequency is 10MHz. Data is latched into the MAX5302 input/DAC register on CS's rising edge. Figure 7 shows a method of connecting several MAX5302s. In this configuration, the clock and the data bus are common to all devices, and separate chip-select lines are used for each IC. Figure 9 illustrates a Rail-to-Rail(R) output. This circuit shows the MAX5302 with the output amplifier configured with a closed-loop gain of +2 to provide a 0V to 5V fullscale range when a 2.5V reference is used.
MAX5302
Bipolar Output
The MAX5302 output can be configured for bipolar operation using Figure 10's circuit according to the following equation: VOUT = VREF [(2NB / 4096) - 1] where NB is the numeric value of the DAC's binary input code. Table 3 shows digital codes (offset binary) and the corresponding output voltage for Figure 10's circuit.
Using an AC Reference
In applications where the reference has AC-signal components, the MAX5302 has multiplying capability within the reference input range specifications. Figure 11 shows a technique for applying a sine-wave signal to the reference input where the AC signal is offset before being applied to REF. The reference voltage must never be more negative than GND. The MAX5302's total harmonic distortion plus noise (THD+N) is typically less than -77dB (full-scale code), given a 1Vp-p signal swing and input frequencies up to 25kHz. The typical -3dB frequency is 650kHz, as shown in the Typical Operating Characteristics graphs.
Applications Information
Unipolar Output
For a unipolar output, the output voltage and the reference input have the same polarity. Figure 8 shows the MAX5302 unipolar output circuit, which is also the typical operating circuit. Table 2 lists the unipolar output codes.
Table 2. Unipolar Code Table
DAC CONTENTS MSB LSB
+5V REF VDD FB
ANALOG OUTPUT
4095 +VREF 4096 2049 +VREF 4096 + VREF 2048 +VREF = 4096 2 2047 +VREF 4096 1 +VREF 4096
1111 1111 1111 (0)
MAX5302
DAC OUT GND
1000 0000 0001 (0)
1000 0000 0000 (0)
0111 1111 1111 (0)
0000 0000 0001 (0) 0000 0000 0000 (0) Figure 8. Unipolar Output Circuit Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd. Note: ( ) are for sub-bit.
0V
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9
Low-Power, 12-Bit Voltage-Output DAC with Serial Interface MAX5302
R1 REF
R2
+5V REF VDD
+5V
VDD
FB
10k 10k
V+
FB
MAX5302
DAC OUT GND
DAC
VOUT
OUT
V-
MAX5302
GND
R1 = R2 = 10k 0.1%
Figure 9. Unipolar Rail-to-Rail Output Circuit
Figure 10. Bipolar Output Circuit
Digitally Programmable Current Source
The circuit of Figure 12 places an NPN transistor (2N3904 or similar) within the op amp feedback loop to implement a digitally programmable, unidirectional current source. The output current is calculated with the following equation: IOUT = (VREF / R) (NB / 4096) where NB is the numeric value of the DAC's binary input code, and R is the sense resistor shown in Figure 12.
Table 3. Bipolar Code Table
DAC CONTENTS MSB LSB 1 1 1 1 1 1 1 1 11 1 1 ( 0 ) ANALOG OUTPUT
2047 +VREF 2048 1 +VREF 2048
1 0 0 0 0 0 0 0 00 0 1 ( 0 ) 1 0 0 0 0 0 0 0 00 0 0 ( 0 ) 0 1 1 1 1 1 1 1 11 1 1 ( 0 )
Power-Supply Considerations
On power-up, the input and DAC registers are cleared (set to zero code). For rated MAX5302 performance, VREF must be at least 1.4V below VDD. Bypass VDD with a 4.7F capacitor in parallel with a 0.1F capacitor to GND. Use short lead lengths and place the bypass capacitors as close to the supply pins as possible.
0V
1 -VREF 2048 2047 -VREF 2048 2048 -VREF = - VREF 2048
0 0 0 0 0 0 0 0 00 0 1 ( 0 )
0 0 0 0 0 0 0 0 00 0 0 ( 0 ) Note: ( ) are for sub-bit.
Grounding and Layout Considerations
Digital or AC transient signals on GND can create noise at the analog output. Connect GND to the highest-quality ground available. Good PC board ground layout minimizes crosstalk between the DAC output, reference input, and digital input. Reduce crosstalk by keeping analog lines away from digital lines. Wire-wrapped boards are not recommended.
10
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Low-Power, 12-Bit Voltage-Output DAC with Serial Interface MAX5302
+5V AC REFERENCE INPUT 26k
+5V
MAX495
+5V
VDD
REF VL IOUT OUT 2N3904
MAX5302
500mVp-p 10k REF VDD
DAC
DAC
FB
OUT
GND
R
MAX5302
GND
Figure 11. AC Reference Input Circuit
Figure 12. Digitally Programmable Current Source
Chip Information
TRANSISTOR COUNT: 3053 SUBSTRATE CONNECTED TO AGND
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11
Low-Power, 12-Bit Voltage-Output DAC with Serial Interface MAX5302
Package Information
8LUMAXD.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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