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Quad SPDT 15 V/+12 V Switches ADG1334
FEATURES
33 V supply range 130 on resistance Fully specified at 15 V/+12 V 3 V logic compatible inputs Rail-to-rail operation Break-before-make switching action 20-lead SSOP
FUNCTIONAL BLOCK DIAGRAM
S1A D1 S1B IN1 S4A D2 S4B IN4
ADG1334
IN2 S2B D2 S2A IN3 S3B D3
05744-001
APPLICATIONS
Audio and video routing Battery-powered systems Signal routing
S3A
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 1.
GENERAL DESCRIPTION
The ADG1334 is a monolithic CMOS device comprising four independently selectable SPDT switches designed on a CMOS process. When the switches are on, each switch conducts equally well in both directions and has an input signal range that extends to the power supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is the low charge injection for minimum transients when switching the digital inputs. Fast switching speed coupled with high signal bandwidth makes the part suitable for video signal switching. CMOS construction ensures ultra ow power dissipation, making the part ideally suited for portable and battery-powered instruments.
PRODUCT HIGHLIGHTS
1. 3 V logic compatible digital input VIH = 2.0 V, VIL = 0.8 V. 2. No VL logic power supply required. 3. Low power consumption. 4. 20-lead SSOP.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2006 Analog Devices, Inc. All rights reserved.
ADG1334 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Dual Supply ................................................................................... 3 Single Supply ................................................................................. 4 Absolute Maximum Ratings ............................................................5 ESD Caution...................................................................................5 Pin Configuration and Function Descriptions..............................6 Terminology .......................................................................................7 Typical Performance Characteristics ..............................................8 Test Circuits..................................................................................... 10 Outline Dimensions ....................................................................... 12 Ordering Guide .......................................................................... 12
REVISION HISTORY
1/06--Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADG1334 SPECIFICATIONS
DUAL SUPPLY 1
VDD = +15 V 10%, VSS = -15 V 10%, GND = 0 V, unless otherwise noted. Table 1.
B Version -40C to +105C VSS to VDD 230
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Source Off Leakage IS (Off ) Drain Off Leakage ID (Off ) Channel On Leakage ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 TON TOFF TBBM Charge Injection Off Isolation Channel-to-Channel Crosstalk -3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD IDD ISS ISS
+25C
Unit V typ max typ max typ max nA typ nA typ nA typ
Test Conditions/Comments
130 200 5 10 25 65 10 10 10
VS = 10 V, IS = -10 mA; see Figure 11 VDD = +13.5 V, VSS = -13.5 V VS = 10 V, IS = -10 mA VS = -5 V, 0 V, +5 V; IS = -10 mA VDD = +16.5 V, VSS = -16.5 V VD = 10 V; VS = 10 V; see Figure 12 VD = 10 V; VS = 10 V; see Figure 12 VS = VD = 10 V; see Figure 13
2.0 0.8 0.005 0.1 5 110 130 65 85 25 2 80 85 700 5 5 10 0.002 1 260 400 0.002 1 0.002 1
V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ pF typ A typ A max A typ A max A typ A max A typ A max
VIN = VINL or VINH
150 95 10
RL = 300 , CL = 35 pF VS = 10 V; see Figure 14 RL = 300 , CL = 35 pF VS = 10 V; see Figure 14 RL = 300 , CL = 35 pF VS1 = VS2 = +10 V; see Figure 15 VS = 0 V, RS = 0 , CL = 1 nF; see Figure 16 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 17 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 19 RL = 50 , CL = 5 pF; see Figure 18 f = 1 MHz; VS = 0 V f = 1 MHz; VS = 0 V f = 1 MHz; VS = 0 V VDD = +16.5 V, VSS = -16.5 V Digital inputs = 0 V or VDD Digital inputs = 5 V Digital inputs = 0 V or VDD Digital inputs = 5 V
1 2
Temperature range is B Version: -40C to +105C. Guaranteed by design, not subject to production test.
Rev. 0 | Page 3 of 12
ADG1334
SINGLE SUPPLY 1
VDD = 12 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2.
B Version -40C to +105C +25C 0 to VDD 520
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage IS (Off ) Drain Off Leakage ID (Off ) Channel On Leakage ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 TON TOFF TBBM Charge Injection Off Isolation Channel-to-Channel Crosstalk -3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD IDD
Unit V typ max typ max typ nA typ nA typ nA typ
Test Conditions/Comments
325 500 10 20 65 10 10 10
VS = 0 V to10 V, IS = -10 mA; see Figure 11 VDD = 10.8 V, VSS = 0 V VS = 0 V to10 V, IS = -10 mA VS = 3 V, 6 V, 9 V, IS = -10 mA VDD = 13.2 V VS = 1 V/10 V, VD = 10 V/1 V; see Figure 12 VS = 1 V/10 V, VD = 10 V/1 V; see Figure 12 VS = VD = 1 V or 10 V, see Figure 13
2.0 0.8 0.005 0.1 3 135 170 95 115 50 2 80 85 500 5 5 10 0.002 1 260 420
V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ pF typ A typ A max A typ A max
VIN = VINL or VINH f = 1 MHz RL = 300 , CL = 35 pF VS = 8 V; see Figure 14 RL = 300 , CL = 35 pF VS = 8 V; see Figure 14 RL = 300 , CL = 35 pF VS1 = VS2 = 8 V; see Figure 15 VS = 6 V, RS = 0 , CL = 1 nF; see Figure 16 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 17 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 19 RL = 50 , CL = 5 pF; see Figure 18 f = 1 MHz; VS = 6 V f = 1 MHz; VS = 6 V f = 1 MHz; VS = 6 V VDD = 13.2 V Digital inputs = 0 V or VDD Digital inputs = 5 V
200 140 10
1 2
Temperature range is B Version: -40C to +105C. Guaranteed by design, not subject to production test.
Rev. 0 | Page 4 of 12
ADG1334 ABSOLUTE MAXIMUM RATINGS
TA = 25C, unless otherwise noted. Table 3.
Parameter VDD to VSS VDD to GND VSS to GND Analog, Digital Inputs 1 Rating 35 V -0.3 V to +25 V +0.3 V to -25 V VSS - 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first 24 mA 100 mA
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.
Continuous Current, S or D Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle max) Operating Temperature Range Industrial Temperature Range (B Version) Storage Temperature Range Junction Temperature SSOP Package JA, Thermal Impedance Reflow Soldering Peak Temperature, Pb-free
1
-40C to +105C -65C to +150C 150C 83.2C/W 260C
Overvoltages at A, EN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 5 of 12
ADG1334 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IN1 1 S1A 2 D1 3 S1B 4 VSS 5 GND 6 S2B 7 D2 8 S2A 9 IN2 10
20 IN4 19 S4A
ADG1334
TOP VIEW (Not to Scale)
18 D4 17 S4B 16 VDD 15 NC 14 S3B 13 D3 12 S3A 11 IN3
05744-002
NC = NO CONNECT
Figure 2. 20-Lead SSOP Pin Configuration
Table 4. 20-Lead SSOP Pin Function Descriptions
Pin No. 1, 10, 11, 20 2, 4, 7, 9, 12, 14, 17, 19 3, 8, 13, 18 5 6 15 16 Mnemonic IN1, IN2, IN3, IN4 S1A, S1B, S2B, S2A, S3A, S3B, S4B, S4A D1, D2, D3, D4 VSS GND NC VDD Description Logic Control Input. Source Terminal. Can be an input or output. Drain Terminal. Can be an input or output. Most Negative Power Supply Potential in Dual Supplies. In single-supply applications, it can be connected to ground. Ground (0 V) Reference. No Connect. Most Positive Power Supply Potential.
Table 5. ADG1334 Truth Table
Logic 0 1 Switch A Off On Switch B On Off
Rev. 0 | Page 6 of 12
ADG1334 TERMINOLOGY
RON Ohmic resistance between D and S. RON Difference between the RON of any two channels. IS (Off) Source leakage current when switch is off. ID (Off) Drain leakage current when switch is off. ID, IS (On) Channel leakage current when switch is on. VD (VS) Analog voltage on Terminal D, Terminal S. CS (OFF) Channel input capacitance for off condition. CD (Off) Channel output capacitance for off condition. CD, CS (On) On switch capacitance. CIN Digital input capacitance. tON The delay between applying the digital control input and the output switching on (see Figure 14). tOFF The delay between applying the digital control input and the output switching off (see Figure 14). tBBM Off time measured between the 80% point of both switches when switching from one address state to another. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. IDD Positive supply current. ISS Negative supply current. Off Isolation A measure of unwanted signal coupling through an off channel. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Bandwidth Frequency at which the output is attenuated by 3 dB. On Response Frequency response of the on switch.
Rev. 0 | Page 7 of 12
ADG1334 TYPICAL PERFORMANCE CHARACTERISTICS
200 180 160 TA = 25C 500 600 VDD = 12V VSS = 0V TA = +85C
ON RESISTANCE ()
ON RESISTANCE ()
140 120 100 80 60 40
VDD = +15V VSS = -15V
400
300
200 TA = -40C 100 TA = +25C
05744-010
20 0 -15 -12 -9 -6 -3 0 3 6 9 SOURCE OR DRAIN VOLTAGE (V) 12
05744-007
0 0 2 4 6 8 SOURCE OR DRAIN VOLTAGE (V) 10 12
15
Figure 3. On Resistance as a Function of VD (VS ) for Dual Supply
450 TA = 25C 400
Figure 6. On Resistance as a Function of VD (VS ) for Different Temperatures, Single Supply
6 TA = +25C 4 VDD = +15V VSS = -15V
350
CHARGE INJECTION (pC)
ON RESISTANCE ()
300 250 200 150 100 VDD = 12V VSS = 0V
2
VDD = +5V VSS = -5V
0
VDD = +12V VSS = 0V
-2
-4
05744-008
50 0 0 2 4 6 8 SOURCE OR DRAIN VOLTAGE (V) 10
12
-6 -15
-10
-5
0 VS (V)
5
10
15
Figure 4. On Resistance as a Function of VD (VS ) for Single Supply
250 VDD = +15V VSS = -15V 200
Figure 7. Charge Injection vs. Source Voltage
160 140 120 VDD = +15V VSS = -15V TON
ON RESISTANCE ()
TIME (ns)
150 TA = +85C 100 TA = -40C 50
05744-009
100 80 60 40
05744-005
TOFF
TA = +25C
20 0 -40
0 -15
-10
-5 0 5 SOURCE OR DRAIN VOLTAGE (V)
10
15
-20
0
20 40 TEMPERATURE (C)
60
80
Figure 5. On Resistance as a Function of VD (VS ) for Different Temperatures, Dual Supply
Figure 8. TON/TOFF Time vs. Temperature
Rev. 0 | Page 8 of 12
05744-011
ADG1334
0 -10 -20 OFF ISOLATION (dB) -30 -40 -50 -60 -70 -80 -80 -90
05744-006
-10 VDD = +15V VSS = -15V TA = +25C -20 -30 VDD = +15V VSS = -15V TA = +25C
CROSSTALK (dB)
-40 -50 -60 -70 SxA - SxB
S1x - S2x
-100 -110 10k 100k 1M 10M FREQUENCY (Hz) 100M
-90 -100 10k 100k 1M 10M FREQUENCY (Hz) 100M
1G
1G
Figure 9. Off Isolation vs. Frequency
Figure 10. Crosstalk vs. Frequency
Rev. 0 | Page 9 of 12
05744-004
ADG1334 TEST CIRCUITS
V ID (ON) S D IDS VS
05744-017
NC
S
D
A VD
05744-019
NC = NO CONNECT
Figure 11. On Resistance
IS (OFF) A VS S D ID (OFF) A VD
05744-018
Figure 13. On Leakage
Figure 12. Off Leakage
0.1F VDD VSS 0.1F
VIN
50%
50%
VDD VS SxB SxA INx VIN GND
VSS D RL 300 CL 35pF VOUT VIN 50% 90% 50% 90%
VOUT
tON
tOFF
Figure 14. Switching Timing
0.1F
VDD
VSS
0.1F VIN
VDD VS SxB SxA INx VIN GND
VSS D RL 300 CL 35pF VOUT
VOUT
80%
tBBM
tBBM
05744-021
Figure 15. Break-Before-Make Delay
Rev. 0 | Page 10 of 12
05744-020
ADG1334
0.1F VDD VSS 0.1F VIN (NORMALLY CLOSED SWITCH) ON NC VOUT CL 1nF GND VIN (NORMALLY OPEN SWITCH) VOUT VOUT OFF
VDD D
VSS SxB
VS
SxA INx VIN
Figure 16. Charge Injection
VDD 0.1F
VSS 0.1F NETWORK ANALYZER NC 50
VDD 0.1F
05744-023
QINJ = CL x VOUT
VSS 0.1F
VDD
VSS
NETWORK ANALYZER VOUT RL 50
VDD SxA
VSS
INx
SxA
D
SxB
50 VS VOUT
SxB INx VS GND
D
R 50
VIN GND
RL 50
OFF ISOLATION = 20 log
VS
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
VOUT VS
Figure 17. Off Isolation
VDD 0.1F VSS 0.1F NETWORK ANALYZER NC INx SxA SxB VS 50
Figure 19. Channel-to-Channel Crosstalk
VDD
VSS
D
VIN GND
05744-025
RL 50
VOUT
INSERTION LOSS = 20 log
VOUT WITH SWITCH VOUT WITHOUT SWITCH
Figure 18. Bandwidth
Rev. 0 | Page 11 of 12
05744-026
VOUT
05744-024
ADG1334 OUTLINE DIMENSIONS
7.50 7.20 6.90
20
11
1
10
5.60 5.30 8.20 5.00 7.80 7.40
PIN 1 1.85 1.75 1.65
2.00 MAX
0.25 0.09 8 4 0 0.95 0.75 0.55
0.05 MIN
0.65 BSC
0.38 0.22
COPLANARITY 0.10
SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-150-AE
Figure 20. 20-Lead Shrink Small Outline Package [SSOP] (RS-20) Dimensions shown in millimeters
ORDERING GUIDE
Model ADG1334BRSZ 1 ADG1334BRSZ-REEL1
1
Temperature Range -40C to +105C -40C to +105C
Description 20-Lead Shrink Small Outline Package (SSOP) 20-Lead Shrink Small Outline Package (SSOP)
Package Option RS-20 RS-20
Z = Pb-free part.
(c)2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05744-0-1/06(0)
T T
Rev. 0 | Page 12 of 12

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