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MULTILEVEL PIPELINE REGISTERS Integrated Device Technology, Inc. IDT29FCT520AT/BT/CT/DT IDT29FCT521AT/BT/CT/DT FEATURES: * * * * A, B, C and D speed grades Low input and output leakage 1A (max.) CMOS power levels True TTL input and output compatibility - VOH = 3.3V (typ.) - VOL = 0.3V (typ.) High drive outputs (-15mA IOH, 48mA IOL) Meets or exceeds JEDEC standard 18 specifications Product available in Radiation Tolerant and Radiation Enhanced versions Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) Available in DIP, SOIC, SSOP, QSOP, CERPACK and LCC packages DESCRIPTION: The IDT29FCT520AT/BT/CT/DT and IDT29FCT521AT/ BT/CT/DT each contain four 8-bit positive edge-triggered registers. These may be operated as a dual 2-level or as a single 4-level pipeline. A single 8-bit input is provided and any of the four registers is available at the 8-bit, 3-state output. These devices differ only in the way data is loaded into and between the registers in 2-level operation. The difference is illustrated in Figure 1. In the IDT29FCT520AT/BT/CT/DT when data is entered into the first level (I = 2 or I = 1), the existing data in the first level is moved to the second level. In the IDT29FCT521AT/BT/CT/DT, these instructions simply cause the data in the first level to be overwritten. Transfer of data to the second level is achieved using the 4-level shift instruction (I = 0). This transfer also causes the first level to change. In either part I=3 is for hold. * * * * * FUNCTIONAL BLOCK DIAGRAM D0 -D7 8 MUX I 0 ,I1 2 REGISTER CONTROL CLK 1 OCTAL REG. A1 OCTAL REG. B1 OCTAL REG. A2 OCTAL REG. B2 S0 ,S1 2 MUX OE 8 2619 drw 01 Y0 -Y7 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES (c)1994 Integrated Device Technology, Inc. APRIL 1994 DSC-4215/4 6.2 1 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS I0 I1 D0 D1 D2 D3 D4 D5 D6 D7 CLK GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 P24-1 D24-1 SO24-2 SO24-7 SO24-8* & E24-1 21 20 19 18 17 16 15 14 13 D7 CLK GND NC OE Y7 Y6 Vcc S0 S1 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 OE 2619 drw 02 INDEX D0 I1 I0 NC Vcc S0 S1 4 3 2 1 28 27 26 25 24 23 5 6 7 8 9 10 D1 D2 D3 NC D4 D5 D6 L28-1 22 21 20 11 19 12 13 14 15 16 17 18 Y0 Y1 Y2 NC Y3 Y4 Y5 2619 drw 03 *FCT520 only DIP/SOIC/SSOP/QSOP/CERPACK TOP VIEW LCC TOP VIEW DEFINITION OF FUNCTIONAL TERMS Pin Names Dn CLK I0, I1 S0, S1 Description Register input Port. Clock input. Enter data into registers on LOWto-HIGH transitions. Instruction inputs. See Figure 1 and struction Control Tables. in- REGISTER SELECTION S1 0 0 1 1 S0 0 1 0 1 Register B2 B1 A2 A1 2619 tbl 02 Multiplexer select. Inputs either register A1, A2, B1 or B2 data to be available at the output port. Output enable for 3-state output port. Register output port. 2619 tbl 01 OE Yn DUAL 2-LEVEL SINGLE 4-LEVEL A1 IDT29FCT520T A2 B1 A1 B1 A1 B1 B2 A2 B2 A2 B2 I=2 I=1 I=0 A1 IDT29FCT521T A2 B1 A1 B1 A1 B1 B2 A2 B2 A2 B2 I=2 I=1 I=0 NOTE: 1. I = 3 for hold. Figure 1. Data Loading in 2-Level Operation 2619 drw 04 6.2 2 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating Commercial VTERM(2) Terminal Voltage -0.5 to +7.0 with Respect to GND (3) Terminal Voltage VTERM -0.5 to with Respect to VCC +0.5 GND TA Operating 0 to +70 Temperature TBIAS Temperature -55 to +125 Under Bias TSTG Storage -55 to +125 Temperature PT Power Dissipation 0.5 IOUT DC Output Current -60 to +120 Military -0.5 to +7.0 Unit V CAPACITANCE (TA = +25C, f = 1.0MHz) Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. Unit 10 pF 12 pF 2619 lnk 04 -0.5 to VCC +0.5 -55 to +125 -65 to +135 -65 to +150 0.5 -60 to +120 V C C C W mA NOTE: 1. This parameter is measured at characterization but not tested. 2619 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only. DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10% Symbol VIH VIL IIH IIL IOZH IOZL II VIK IOS VOH Parameter Input HIGH Level Input LOW Level Input HIGH Current High Impedance Output Current Input HIGH Current(4) Clamp Diode Voltage Short Circuit Current Output HIGH Voltage VCC = Max., VI = VCC (Max.) VCC = Min., IN = -18mA VCC = Max. , VO = GND VCC = Min. VIN = VIH or VIL IOH = -6mA MIL. IOH = -8mA COM'L. IOH = -12mA MIL. IOH = -15mA COM'L. VOL VH ICC Output LOW Voltage Input Hysteresis Quiescent Power Supply Current VCC = Max. VIN = GND or VCC VCC = Min. VIN = VIH or VIL -- IOL = 32mA MIL. IOL = 48mA COM'L. -- -- 200 0.01 -- 1 mV mA -- 0.3 0.5 V 2.0 3.0 -- (3) (4) (4) Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max. VI = 2.7V VI = 0.5V VO = 2.7V VO = 0.5V Min. 2.0 -- -- -- -- -- -- -- -60 2.4 Typ.(2) -- -- -- -- -- -- -- -0.7 -120 3.3 Max. -- 0.8 1 1 1 1 1 -1.2 -225 -- Unit V V A A A A V mA V Input LOW Current(4) NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. The test limit for this parameter is 5A at TA = -55C. 2619 tbl 05 6.2 3 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS Symbol ICC ICCD Parameter Quiescent Power Supply Current, TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN = 3.4V(3) Min. -- VIN = VCC VIN = GND -- Typ.(2) 0.5 0.15 Max. 2.0 0.25 Unit mA mA/ MHz OE = GND VCC = Max., Outputs Open One Input Toggling 50% Duty Cycle IC Total Power Supply Current(6) VCC = Max., Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND One Bit Toggling at fi = 5MHz 50% Duty Cycle VCC = Max., Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND Eight Bits Toggling at fi = 2.5MHz 50% Duty Cycle VIN = VCC VIN = GND -- 1.5 3.5 mA VIN = 3.4V VIN = GND VIN = VCC VIN = GND -- 2.0 5.5 -- 3.8 7.3(5) VIN = 3.4V VIN = GND -- 6.0 16.3(5) NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT +IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL HIgh Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz. 2619 tbl 06 6.2 4 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE FCT520AT/521AT Com'l. Symbol tPHL tPLH tPHL tPLH tSU tH tSU tH tPHZ tPLZ tPZH tPZL tW Parameter Propagation Delay CLK to Yn Propagation Delay S0 or S1 to Yn Set-up Time, HIGH or LOW Dn to CLK Hold Time, HIGH or LOW Dn to CLK Set-up Time, HIGH or LOW I0 or I1 to CLK Hold Time, HIGH or LOW I0 or I1 to CLK Output Disable Time Output Enable Time Clock Pulse Width HIGH or LOW Condition(1) CL = 50pF RL = 500 Min.(2) 2.0 2.0 5.0 2.0 5.0 2.0 1.5 1.5 7.0 Max. 14.0 13.0 -- -- -- -- 12.0 15.0 -- Mil. Min.(2) 2.0 2.0 6.0 2.0 6.0 2.0 1.5 1.5 8.0 Max. 16.0 15.0 -- -- -- -- 13.0 16.0 -- FCT520BT/521BT Com'l. Min.(2) 2.0 2.0 2.5 2.0 4.0 2.0 1.5 1.5 5.5 Max. 7.5 7.5 -- -- -- -- 7.0 7.5 -- Mil. Min. (2) 2.0 2.0 2.8 2.0 4.5 2.0 1.5 1.5 6.0 Max. 8.0 8.0 -- -- -- -- 7.5 8.0 -- Unit ns ns ns ns ns ns ns ns ns 2619 tbl 07 FCT520CT/521CT Com'l. Symbol tPHL tPLH tPHL tPLH tSU tH tSU tH tPHZ tPLZ tPZH tPZL tW Parameter Propagation Delay CLK to Yn Propagation Delay S0 or S1 to Yn Set-up Time, HIGH or LOW Dn to CLK Hold Time, HIGH or LOW Dn to CLK Set-up Time, HIGH or LOW I0 or I1 to CLK Hold Time, HIGH or LOW I0 or I1 to CLK Output Disable Time Output Enable Time Clock Pulse Width HIGH or LOW(3) Condition(1) CL = 50pF RL = 500 Min.(2) 2.0 2.0 2.5 2.0 4.0 2.0 1.5 1.5 5.5 Max. 6.0 6.0 -- -- -- -- 6.0 6.0 -- Mil. Min.(2) 2.0 2.0 2.8 2.0 4.5 2.0 1.5 1.5 6.0 Max. 7.0 7.0 -- -- -- -- 6.0 7.0 -- FCT520DT/521DT Com'l. Min.(2) 2.0 2.0 1.5 1.0 2.0 1.0 1.5 1.5 3.0 Max. 5.2 4.8 -- -- -- -- 4.8 4.0 -- Mil. Min. (2) -- -- -- -- -- -- -- -- -- Max. -- -- -- -- -- -- -- -- -- Unit ns ns ns ns ns ns ns ns ns 2619 tbl 08 NOTES: 1. See test circuit and waveforms. 2. Minimum units are guaranteed but not tested on Propagation Delays. 6.2 5 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS VCC 500 VIN Pulse Generator RT D.U.T. 50pF CL 2619 drw 05 SWITCH POSITION Test 7.0V Switch Open Drain Disable Low Enable Low All Other Tests Closed Open VOUT 500 DEFINITIONS: 2619 lnk 09 CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU tH 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 2619 drw 06 LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE 1.5V tREM 1.5V 2619 drw 07 tSU tH PROPAGATION DELAY ENABLE AND DISABLE TIMES ENABLE DISABLE 3V CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED tPZH SWITCH OPEN 1.5V 0V 0V 2619 drw 09 SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V 2619 drw 08 1.5V tPLZ 3.5V 1.5V tPHZ 0.3V VOH 0V 3.5V 0.3V VOL NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns 6.2 6 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES ORDERING INFORMATION 29FCT X XX Temperature Family Range XX Device Type X Package X Process Blank B P D L SO PY E Q 520AT 521AT 520BT 521BT 520CT 521CT 520DT 521DT Blank 2 54 74 Commercial MIL-STD-883, Class B Plastic DIP CERDIP Leadless Chip Carrier Small Outline IC Shrink Small Outline Package CERPACK Quarter-size Small Outline Package Multilevel Pipeline Register Multilevel Pipeline Register High Drive Balanced Drive -55C to +125C 0C to +70C 2619 drw 10 6.2 7 |
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