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U4256BM
Frequency Synthesizer for Radio Tuning
Description
The U4256BM is a synthesizer IC for FM receiver and an AM up-convertion system in BICMOS technology. Together with the AM/FM IC U4255BM, it performs a complete AM/FM car radio front end, which is recommended also for RDS (Radio Data System) applications. It is controlled by 3-wire bus and contains also switches and Digital to Analog Converters (DACs) for software controlled alignment of the AM/FM tuner.
Features
D Reference oscillator up to 15 MHz (tuned) D Oscillator buffer output (for AM up/down conversion) D Two programmable 16-bit dividers D Fine-tuning steps possible D Fast response time due to integrated loop push-pull stage D 3-wire bus (enable, clock and data; 3 V and 5 V microcontrollers acceptable) D Four programmable switching outputs (open drain) D Three DACs for software controlled tuner alignment D Low power consumption D High S/N ratio D Integrated band gap * only one supply voltage necessary
Block Diagram
SWO1 SWO2 SWO3 SWO4 7 Tuning 13 OSCIN 12 OSCOUT 15 8 9 10
Oscillator
Switching outputs
DAC3 3-bit VRef DAC2
5
DAC3
MX2LO
OSC buffer
CLK DATA EN
17 16 18
4
DAC2
3W- bus interface
DAC1
3
DAC1
R- divider
DAC AM/FM Current sources
VRef 1
FMOSCIN
19
FM- preamp
N- divider
Phase detector Band-gap
PDO
2 11 GND VS 6
PD
20 GNDan V5
14
Figure 1. Block diagram
Ordering Information
Extended Type Number U4256BM-NFS U4256BM-NFSG3 Package SSO20 SSO20 Remarks Tube Taped and reeled
Rev. A5, 06-Oct-00
1 (14)
Preliminary Information
U4256BM
Pin Description
PDO 1 20 19 18 17 16 U4256BM VS 6 15 14 MX2LO V5 GNDan FMOSCIN EN CLK DATA
PD 2 DAC1 3
DAC2 4 DAC3 5
SWO1 7 SWO2 8 SWO3 9 SWO4 10
Figure 2. Pinning
13 OSCIN 12 OSCOUT 11 GND
Functional Description
For a tuned FM - broadcast receiver, the following parts are needed: - voltage-controlled oscillator (VCO) - antenna amplifier tuned circuit - RF amplifier tuned circuit Typical modern receivers with electronic tuning are tuned to the desired FM frequency by the frequency synthesizer IC U4256BM. The special design allows to build software-controlled tuner alignment systems. Two programmable DACs (Digital-to-Analog Converter) support the computer-controlled alignment. The output of the PLL is a tuning voltage which is connected to the VCO of the receiver IC. The output of the VCO is equal to the desired station frequency plus the IF (10.7 MHz). The RF and the oscillator signal (VCO) are both input to the mixer that translates the desired FM channel signal to the fixed IF signal. For FM, the double-conversion system of the receiver requires exactly 10.7 MHz for the first IF frequency, which determines the center frequency of the software-controlled integrated second IF filter.
2 (14)
Preliminary Information
AAAAAAAAAA A A AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA AA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AAAAAAA A
If this oscillator tuning feature is not used, the internal capacities have to be switched off and the oscillator has to be operated with high-quality external capacities to ensure that the operational frequency is exactly 10.250 MHz. When dimensioning the oscillator circuit, it is important that the additional capacities enable the oscillator to operate through its complete tracking range. The oscillating ability depends very strongly on the used crystal oscillator. Initializing the oscillator should be established without switching any additional capacities to guarantee that the oscillator starts to operate properly. Due to the lower quality of the integrated capacities compared to discrete capacities, the amount of the switched integrated capacities should always be minimized. (if necessary reduce tracking range or use another crystal oscillator) The U4256BM has a very fast response time of maximum 800 ms (at 2 mA, fref = 100 kHz, measured on MPX signal). It performs a high signal to noise ratio. Only one supply voltage is necessary, due to a integrated band gap. Rev. A5, 06-Oct-00
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Symbol PDO PD DAC1 DAC2 DAC3 VS SWO1 SWO2 SWO3 SWO4 GND OSCOUT OSCIN V5 MX2LO DATA CLK EN FMOSCIN GNDan
Function Phase detector output Pulsed current output Digital-to-analog converter 1 Digital-to-analog converter 2 Digital-to-analog converter 3 Supply voltage analog part Switching output 1 Switching output 2 Switching output 3 Switching output 4 Ground, digital part Reference oscillator output Reference oscillator input Capacitor band gap Oscillator buffer output Data input Clock Enable FM-oscillator input Ground, analog part
AAA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A AA A A AAA A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A AA A A AA A A A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAA AAA AA AAA AAA AAAAAAAAAAAAAAAAA A AAA AA AAA AAA AAAAAAAAAAAAAAAAA A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAA A A A A A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AAAA AAA AA AAA AAA AAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA A A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAAAAAAAAAA AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAAA AA AAA AAA AAAAAAA AA A A AAAA AAA AA AAA AAA AAAAAAAAAAAAAAAAA A A AAA A A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAAAAAAAAAA AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAAA AA AAA AAA AAAAAAA AA A A AAAA AAA AAAAAAAAAAAAAAAAAAAAAAAAA A A AAA A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAAA AA AAA AAA AAAAAAAAAAAAAAAAA AA A A AAA A
Test conditions (unless otherwise specified): VS = +8.5 V, Tamb = +25C
AAAA A AA A A A AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA A A AA A A A A AA A A AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA A A AA A A AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA A A AA A A AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA A A AA A A AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA A A AA A A AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA A A AA A A AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA AAAAAAAAAAAA AAAAAAAAAAAAAAAA A AA A A
Electrical Characteristics
All voltages are referred to GND (Pin 11)
AAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA A AA AAAA AAAAAAAAAAA AAAAAAAAAAAAAAAA AAAAAAAAAAAA AAAAAAAAAAAAAAAA AA
Thermal Resistance
All voltages are referred to GND (Pin 11)
Rev. A5, 06-Oct-00
Operating Range
Absolute Maximum Ratings
Parameters Supply voltage Analog supply voltage Supply current Analog supply current OSCIN Input voltage OSC buffer (MX2LO) Output AC voltage Output DC voltage FMOSCIN Input voltage
Supply voltage range Ambient temperature Input frequency FMOSCIN Programmable N, R divider Crystal reference oscillator
Junction ambient
Parameters Analog supply voltage Pin 6 Input voltage BUS Pins 16, 17 and 18 Output current switches Pins 7, 8, 9 and 10 (see figure 10) Drain voltage switches Pins 7, 8, 9 and 10 Ambient temperature range Storage temperature range Junction temperature Electrostatic handling
Parameters when soldered to PCB
Parameter
Pins 12 and 13
Pin 19
Pin 6
Preliminary Information
Pin 19 f = 70 to 120 MHz f = 120 to 160 MHz Pin 13 f = 0.1 to 15 MHz Pin 15 At Pin15: 47 pF and 1 kW Test Conditions / Pins Pin 6 Pin 20 Symbol VS Tamb fin SF fXTAL Symbol RthJA Symbol VS VI IO VOD Tamb Tstg Tj VESD vMX2LO VMX2LO FMOSC FMOSC Symbol OSC VS IS Min. 8 -40 70 2 0.1 Min. 100 40 150 80 1.6 4.5 8 15 -40 to +85 -40 to +125 125 t.b.d. Value 8 to 15 -0.3 to +12 -1 to +5 Value 140 Typ. 8.5 Typ. 120 1.9
U4256BM
8.5
10
Max. 14 +85 160 65535 15
Max.
200 2.1
20
12
Unit K/W
Unit V V mA
V C C C V
mVrms mVrms
mVrms
MHz
Unit V C MHz
mVpp V
Unit
mA
3 (14) V
AAA A AA A A A A AAA A AA A A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAAAAAAAAAAA AAAAAAA AAAAAAAAAA A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAA AAA AAA AA AAA AAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA A AA A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AA A A A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA A AAA AAA AAA AA AAA AAAAAAAAAAAAAAAAA AAA A AA A A A A AA A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A AAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAA AAA AAA AA AAA AAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA A AA A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A AAA AAA AA AAA AAAAAAAAAAAAAAAAA A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AA A A A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAA AAA AAA AA AAA AAAAAAAAAAAAAAAAA A A AA A A A
Test conditions (unless otherwise specified): VS = +8.5 V, Tamb = +25C
3-Wire Bus Description
Electrical Characteristics (continued)
U4256BM
4 (14)
EN
Parameters Test Conditions / Pins Symbol Pulsed current output PD Pin 2 Output current Bit 71, 70 = `00' PD = 2.5 V IPD Output current Bit 71, 70 = `001' Output current Bit 71, 70 = `10' Output current Bit 71, 70 = `11' Leakage current PD = 2.5 V IPDL PDO Pin 1 Saturation voltage HIGH I = 15 mA VPDOH LOW VPDOL SWO1, SWO2, SWO3, SWO4 (open drain) Pins 7, 8, 9 and 10 Output leakage current V7,8,9,10 = 8.5 V ISWOH HIGH Output voltage LOW I = 1 mA VSWOL DAC1, DAC2 Pins 3 and 4 Output current IDAC1, 2 Output voltage VDAC1, 2 Gain range (resolution 256 steps) Offset range (resolution 24 steps) DAC 3 Pin 5 Output current IDAC3 Output voltage (resolution 16 steps) VDAC3
DATA
CLK
e.g., Divider
24-bit command
16-bit command
CLK
DATA
EN
LSB
LSB
20
21
22
BYTE 1
BYTE 1
23
24
25
R-Divider
26
MSB LSB
MSB LSB
Preliminary Information
27 28 29
Figure 3. Pulse diagram
2 10
2 11
BYTE 2
BYTE 2
2 12
2 13
2 14
MSB
MSB LSB
2 15 P-20 P-21 P-22
DAC3
20 80 400 1600
Min.
0.25
0.3 0.6 -0.6
0.1
OSCB
Status 0
BYTE 3
25 100 500 2000
Typ.
100
0.2
IPD
Rev. A5, 06-Oct-00 1 VS - 0.5 2.3 0.7 VS - 0.5 0.4
0 Addr.
Max.
30 120 600 2400 20
400
100
1 6
MSB
0
Unit
mA V mA V mV A A A A nA nA V V V
AA AA AAA AAAAA AA AAA A AAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAA AA AAA AAAAA AA AAA AAAAAAAAAAAAAAAAAAAAAAA A AA AAA AAAAA AA AAA AAAAAAAAAAAAAAAAAAAAAAA AA AA AAA AAA AA AA AAA A AA A AA AAA AAAAAAAAAA AAAAAAAA A AAA A A AA AAAAAAAAAAAA AAAAAAAAA AAAAAAAAAAAAA AAAAAAAAA AAA A A AA A A AA A AAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAA AA AAA AA AA AAAAAA AA AAA AAAAAAAAAAAAAAAAAAAAAAA A AA AA AAAAAA AA AAA AAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAA AA A A AAAAAA AA AAA A AA A AAAAAAAAAAAAA AAAAAAAAAA A AAA A AA AAAAAAAAAAA AAAAAAAAAA AA A AA AAAAAAAAAAAA AAAAAAAAA AAAAAAAAAAAAA AAAAAAAAA AAA A A AAAAAAAAAAAAAAA AA AAA A AA AA AA AAAAAAAAAAAAAAAAAAAAAAA A AA AA AAAAAA AA AAA AAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAA AA AA AA AAAAAA AA AAA A AA A AAAAAAAAAAAAA AAAAAAAAAA AAAAAAAAAAAA AAAAAAAAAA AAA A AA AAAAAAAAAAAA AAAAAAAAA AA A AA AAAAAAAAAAAA AAAAAAAAA A AAA A A AAAAA AAAA AAAA AAAA AA AAAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA AAAA AAAA AAAA AA AAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA AAAA AAAA AAAA AA AAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA AAAA AAAA AAAA AA AAAAAA AA AA A AA A AAAA AAAAA AA AAAAAAAAAA AAAAAAAAAAA AAA AAAAAAAAAAAAAAAAA A A AAA A A AAA AAAAAAAAAA AAAAAAAAA AAAAAAAAA AAAAAAAAAAA AAAAAAAAA AAAAAAAAA AA A AAA A AAAAA AAAA AAAA AAAA AAA A AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA AAAA AAAA AAAA AAA AAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA AAAA AAAA AAAA AAA AAAAA AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA AAAA AAAA AAAA AAA AA AA AA AA A AA A A AAAA AAAAA AA AAAAAAAAAA AAAA AAAAAAA AAA AAAAAAAAAAAAAAAAA AAAA AAAAAAA A A A AAA A AAA AAAAAAAAAA AAAAAAAAA AAAAAAAAA AAAAAAAAAAA AAAAAAAAA AAAAAAAAA AA A AAA A
E D C B A
Rev. A5, 06-Oct-00
Data Transfer
ADDR
MSB
ADDR
MSB
ADDR
MSB
ADDRAAAAAAAAAA STATUS 1
MSB
MSB
ADDR
1
0
0
0
0
0
1
0
1
0
O-25
O-25
B35
B85
B71
8pF
B13
B49
0
IPD
STATUS 0
AM=1 FM=0 DAC
B34
B70
32pF
O-24
O-24
B84
B12
B48
Oscillator tuning function
BYTE 2
BYTE 2
BYTE 2
DAC2 OFFSET
DAC1 OFFSET
SWO4 1=off, 0=on
Byte 3
OSCB 0 = on, 1 = off
B33
O-23
O-23
Byte 3
16pF
B11
B47
B83
B69
SWO3 1=off, 0=on
O-22
O-22
B32
B10
B46
B82
8pF
P-22
B68
O-21
O-21
SWO2 1=off, 0=on
B45
B81
B31
4pF
B9
DAC3
P-21
B67
O-20
O-20
B80
B44
SWO1 1=off, 0=on
2pF
LSB
LSB
LSB
Preliminary Information
B8 B30 P-20 B66 LSB MSB LSB MSB MSB MSB MSB G-27 G-27 B79 B43 1pF B29 B65 B7 215 215 B28 B64 G-26 G-26 0.5pF 214 214 B42 B78 B6 B27 B63 213 213 G-25AA G-23AAG-21 G-24 G-22 G-25 B41 B5 B77 X B25 B62 212 212 BYTE 2 BYTE 2 DAC2 GAIN DAC1 GAIN G-24 B40 B4 B76 Not used BYTE 1 BYTE 1 BYTE 1 X B24 B61 211 211 G-23 B39 B3 B75 X B60 B23 210 210 G-22 B38 B74 B2 B22 B59 X 29 29 N - DIVIDER R - DIVIDER G-21 LSB MSB LSB MSB B37 B22 B58 B73 B1 28 28 X B21 B57 G-20 G-20 27 27 B72 B36 LSB LSB LSB B0 X B20 B56 26 26 B19 B55
U4256BM
25
25
B18
B54
24
24
BYTE 1
BYTE 1
B17
B53
23
23
B16
B52
22
22
B15
B51
21
21
5 (14)
LSB LSB B14 B50 20 20
AAA A AA A A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAAAAAAAAAAA AAAAAAA AAAAAAAAAA AAAAAAAAAAAAA AAAAAAA AAAAAAAAAAA A A AA A A A AAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A A AAA AAA AAA AA AAA AAAAAAA AAAAAAAAAA A AAAAAAAAAAAAAAA AAAAAAA AAAAAAAAAA A A AA A A A AA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
Timing Information
Bus Timing
U4256BM
6 (14) Parameters Test Conditions / Pins 3-wire bus, ENABLE, DATA, CLOCK Pins 16, 17, 18 Input voltage HIGH LOW Clock frequency Period of CLK HIGH LOW Rise time EN, DATA, CLK Fall time EN, DATA, CLK Set-up time Hold time EN Hold time DATA Enable Clock Data tR tS tR tS tR tH tL tHDA
Figure 4. Bus timing
Preliminary Information
Symbol VBUSH VBUSL tHEN tHDA tH tL tr tf ts Min. 100 250 0 250 250 2.0 tF tF Typ. tHEN Rev. A5, 06-Oct-00 Max. tF 400 100 1.0 1.0 V V MHz ns ns ns ns ns ns ns Unit
AA AA AA AA A A AAAAAAAAAAAAAAA A AA AA AA A AAAAAAAAAAAAAAA A AA AA AA A AAAAAAAAAAAAAAA A AA AA AA A AAAAAAAAAAAAAAA A AA AA AA A AAAAAAAAAAAAAAA A AA AA AA A AAAAAAAAAAAAAAA A AA AA AA A A AAAAAAAAAAAAAAA AAAAAAAAAAAAAAA AAAAAAAA AAAAAAA A AA AA AA A A AA AA AA A A AAAAAAAAAAAAAAA AAAAAAAA AAAAAAA A AA AA AA A A AAAAAAAAAAAAAAA AAAAAAAA AAAAAAA A AA A A AA AA AAAAAAAAA AAAAAAAA AAAAAAA A AA AA AA A AAAAAAAAAAAAAAA AAAAAAAAAAAAAA AA AA AA A
Rev. A5, 06-Oct-00 The DAC mode can be controlled by setting the Bit 34 as following: DAC Mode B34 FM 0 AM 1 The switching output SWO1 to SWO4 can be controlled as following (Bits 30 to 33): Switch Output B29 + X SWOx = ON 0 (switch to GND) SWOx = OFF 1 The tuning capacity for the crystal oscillator has a range of 0.5 pF to 71.5 pF. The values are coded binary. The tuning can be controlled by the Bits 78 to 85 as following:
B85=0 B85=1 B84 B83 B82 B81 B80 B79 B78 pF pF 0 8.0 1 1 1 1 1 1 1 0.5 8.5 1 1 1AAA 1 1AAA 1 0 1.0 9.0 1 1 1 1 1 0 1 1.5 19.5 1 1 1 1 1 0 0 ... ... ... ... ... ... ... ... ... 63.0 71.0 0 0 0 0 0 0 0 63.5 71.5 0 0 0 0 0 0 0 0 0 0 0 ... 0 ... 1 1 1 0 0 0 0 ... 1 ... 1 1 1 0 0 0 0 ... 1 ... 1 1 1 0 0 0 0 ... 1 ... 1 1 1 0 0 1 1 ... 1 ... 0 1 1
AAAAAAAA AAAAAAA A AAAAAAAA AAAAAAA A AAAA A A A A A A AAAAAAAAAAAAAAA AAAAAAAA AAAAAAA AAAAAAAAAAAAA AAAAA AAAAAAAAAAAAAAA AAAAAAAA AAAAAAA AA A A A A A AAAA A A A A A A AAAAAAAAAAAAAAA AAAAAAAA AAAAAAA AA A A A A AAAAAAAAAAAAAAA AAAAAAAAAAAAAAA AA A A A A AA A A A A AAAAAAAAAAAAAAA AA A A A A AAAAAAAAAAAAAAA AA A A A A AAAAA AAAAAAAAAAAAAAA AAAAAAAAAAAAA AAAAAAAAAAAAAAA AA A A A A AAAA A A A A A AAAAAAAAAAAAAAA AA A A A A AAAAAAAAAAAAAAA AA A A A A AAAAAAAAAAAAAAA AA A A A A A AAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAA AAAAAAAAA AAAAAAA AA A A A A AA A A A A A AA AAAAAAAAAAAAAAA AAAAAAAAA AAAAAAA AA A A A A A AA AAAAAAAAAAAAAAA AAAAAAAAA AAAAAAA AAAAAAAAAAAAA AAAAAAAAA AAAAAAA AAAAA A AA A AA AAAAAAAAA AAAAAAA A AA AAAAAAAAA AAAAAAA A AA AAAAAAAAA AAAAAAA A AA AAAAAAAAA AAAAAAA A AA AAAAAAAAA AAAAAAA A AA AAAAAAAAA AAAAAAA A AA AAAAAAAAA AAAAAAA AAAAAAAAA AAAAAAA A AA AAAAAA AAAAAAA AAAA A A A AA AAAAAAAAA AAAAAAA AAAAAA AAAAAAA AA AA A AAAAAAAAAAAAAAA A A A A A AA A AAAAAAAAAAAAAAA A A A A A AA A AAAAAAAAAAAAAAA AAAAAAAAAAAAAAA A A A A A AA A A A A A A AA A AAAAAAAAAAAAAAA A A A A A AA A AAAAAAAAAAAAAAA A A A A A AA A AAAAAAAAAAAAAAA AAAAAAAA A A A A A AA A A AAAAAAAAAAAAAAA AAAAAAAA AAAAAAAA A A A A A AA A A AAAAAAAAA AAAAAAAAAAAAAAA AAAAAAAA AAAAAAAA A A A A A AA A AAAAAAAAAAAAAAA A A A A A AA A AA AA AA AAA AA AAAAA AA AAA A A A A A AA A AAAAAAAAAAAAAAA AAAAAAAAAAAAAA AAAAAAAAAAAA A A A AA A AAAAAAAAAAAAAAA A A A A A AA A AAAAAAAAAAAAAAA A A A A A AA A AAAAAAAAAAAAAAA A A A A A AA A AAAAAAAAAAAAAAA A A A A A AA A AAAAAAAAAAAAAAA AAAAAAAAAAAAAA A A A A AA A AAAAAAA A A AAAAAAA AAAA AAAAA A A AAAAAAA A A AAAAAAA AAAA AAAAA AAAAA AAAAA A AAAAAAA AAAA AAAAA A A AAAAAAA AAAA AAAAA AAAAA AAAAA A AAAAAAA AAAA AAAAA A A
The charge-pump current can be choosen by setting the Bits 71 and 70 as following: IPD (A) B71 B70 25 0 0 100 0 1 500 1 0 2000 1 1 The DAC3 output voltage can be controlled Bits P-20 to P-22 (Bits 66 to 68) as following: DAC3 Offset Approx. B68 B67 0.5 V 0 0 1.1 V 0 0 1.8 V 0 1 2.4 V 0 1 3.1 V 1 0 3.7 V 1 0 4.4 V 1 1 5.0 V 1 1 The oscillator buffer output can be switched by the OSCB Bit as following (Bit 69): MX2LO AC Voltage B69 ON 0 OFF 1 B66 0 1 0 1 0 1 0 1 by the The offset of DAC1 has a range of 0.5 V to -0.6 V. This range is divided into 64 steps. So one step is approximately 1.1V/63 = 17.2 m. The offset can be controlled by the Bits 44 to 49 (O-20 to O-25) as following: The gains of DAC1 and DAC2 have a range of 0.7 x V(PDO) to 2.15 x V(PDO). V(PDO) is the PLL tuning voltage output. This range is divided into 256 steps. So one step is approximately (2.15-0.7)/256 = 5.664 m. The gain can be controlled by the Bits 36 to 43 (G-20 to G-27) as following:
Gain DAC1 Approx. Gain DAC2 Approx.
Bus Control
Preliminary Information
Offset DAC1 Approx. [V] Offset DAC2 Approx. [V] 0.5 0.4828 0.4656 0.4484 ... -0.0156 ... 0.5656 -0.5828 -0.6 0.7 0.70566 0.71133 0.71699 ... 1.00019 ... 2.1386 2.14434 2.15 B43 B42 B41 B40 B39 B38 B37 B36 B7 0 0 0 0 ... 0 ... 1 1 1 B13 B49 B6 0 0 0 0 ... 0 ... 1 1 1 B12 B48 B5 0 0 0 0 ... 1 ... 1 1 1 B4
U4256BM
B11
B47
0 0 0 0 ... 1 ... 1 1 1
B3
0 0 0 0 ... 0 ... 1 1 1
B10
B46
B2
0 0 0 0 ... 1 ... 1 1 1
B45
B9
B1
0 0 1 1 ... 0 ... 0 1 1
7 (14)
B44 B8 0 1 0 1 ... 0 ... 1 0 1 B0 0 1 0 1 ... 1 ... 1 0 1
U4256BM
The gain of DAC2 has a range of 0.7 x V(PDO) to 2.15 x V(PDO). V(PDO) is the PLL tuning voltage output. This range is divided into 256 steps. So one step is approximately (2.15-0.7)/256 = 5.664 m. The gain can be controlled by the bits 0 to 7 (G-20 to G-27) as following:
Gain DAC2 Approx. 0.7 0.70566 0.71133 0.71699 ... 1.00019 ... 2.1386 2.14434 2.15 m B7 B6 B5 B4 B3 B2 B1 B0
The offset of DAC2 has a range of 0.5 to -0.6. This range is divided into 64 steps. So one step is approximately 1.1V/63 = 17.2 m. The offset can be controlled by the Bits 8 to 13 (O-20 to O-25) as following:
Offset DAC2 Approx. 0.5 0.4828 0.4656 0.4484 ... -0.0156 ... 0.5656 -0.5828 -0.6 B13 0 0 0 0 ... 0 ... 1 1 1 B12 0 0 0 0 ... 1 ... 1 1 1 B11 0 0 0 0 ... 1 ... 1 1 1 B10 0 0 0 0 ... 1 ... 1 1 1 B9 0 0 1 1 ... 1 ... 0 1 1 B8 0 1 0 1 ... 0 ... 1 0 1
A AA AA AA A A AA AA AA A A AAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA AA AA AA A A AAAAAAAAAAAAAAAA AA AA AA A A AAAAAAAAAAAAAAAA AA AA AA A A AAA AA A A A A AAAAAAAAAAAAAAAA AA AA AA A A AAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA A AA A A A AA AA AA A A AAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA A AA A A A A AA AA AA A A AAAAAAAAAAAAAAAA AA AA AA A A AAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA A AA A A A A AA AA AA A A AAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA A AA A A A A AA AA AA A A AAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA A AA A A A A AA AA AA A A AAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA A AA A A A A AA AA AA A A AAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA A AA A A A A AA AA AA A A AAAAAAAAAAAA AAAA AA AA AA AA AAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA A AA A A A A AA A A A A AA AA AA A A AAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA A AA A A A AAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA A AA A A A A AA AA AA A A AAAAAAAAAAAAAAAA AA AA AA A A AAAAAAAAAAAA AAAAAAAAAAAAAAAAAAA A AA A A A AAAAAAAAAAAA AAAA A AA A A A AAAAAAAAAAAA AAAA A AA A A A AAAAAAAAAAAA AAAA AAAAAAAAAA AAAA AA A A A AAAAAAAAAAAA AAAA A AA A A A AAAAAAAAAAAA AAAA A AA A A A
0 0 0 0 ... 0 ... 1 1 1 0 0 0 0 ... 0 ... 1 1 1 0 0 0 0 ... 1 ... 1 1 1 0 0 0 0 ... 1 ... 1 1 1 0 0 0 0 ... 0 ... 1 1 1 0 0 0 0 ... 1 ... 1 1 1 0 0 1 1 ... 0 ... 0 1 1 0 1 0 1 ... 1 ... 1 0 1
Input / Output Interface Circuits
PDO
PDO is the loop amplifier output of the PLL. The bipolar output stage is a rail-to-rail amplifier.
PD
PD is the current charge pump output of the PLL. The current can be controlled by setting the Bits. The loop filter has to be designed corresponding to the choosen pump current and the internal reference frequency. A recommendation can be found in the application circuit.
V5
C PDO
PD
Figure 5.
8 (14)
Rev. A5, 06-Oct-00
Preliminary Information
U4256BM
FMOSCIN
FMOSCIN is the preamplifier input for the FM oscillator signal.
VS
FMOSCIN
Figure 6.
MX2LO
MX2LO is the buffered output of the crystal oscillator. This signal can be used as a reference frequency for U4255BM. V5 V5
EN, DATA, CLK
All functions can be controlled via a 3-wire bus consisting of ENABLE, DATA and CLOCK. The bus is designed for microcontrollers which operate with 3 V supply voltage. Details of the data transfer protocol are shown in the table `Data Transfer'.
VS
OSCIN MX2LO
EN DATA CLK
Figure 9. Figure 7.
DAC 1, 2 and 3
DAC 1 to 3 are the outputs for automatic tuner alignment. VS
SWO1, 2, 3 and 4
All switching outputs are `open drain' and can be set and reset by software control. Details are described in the data transfer protocol.
SWO1 SWO2 SWO3 SWO4 I
DAC1
Figure 8.
Figure 10.
Rev. A5, 06-Oct-00
9 (14)
Preliminary Information
U4256BM
OSCIN, OSCOUT
A crystal resonator (up to 15 MHz) is connected between OSCIN and OSCOUT in order to generate the reference frequency. By using the U4256BM in connection with U4255BM the crystal frequency must be 10.25 MHz. The complete application circuit is shown in figure 15. If a reference is available, it can be applied at OSCIN. The minimum voltage should be 100mVrms. In this case, pin OSCOUT has to be open.
VS
OSCIN
VS
OSCOUT
Figure 11.
Application Information
Function of DAC1, 2 in FM Mode
For automatic tuner alignment, the DAC1 and 2 of the U4256BM can be controlled by setting gain of VPDO and offset values. The following figure shows the principle of the operation. The gain is in the range of 0.7 to 2.15. The offset range is +0.5 V to -0.6 V. For alignment, DAC1 and 2 are connected to the varicaps of the preselection filters. For alignment, offset and gain is set for having the best tuner tracking.
Bit 34 PDO (FM) Gain +/- DAC1,2
100
Function of DAC1, 2 in AM Mode
If Bit 94 = 1, the DAC1, 2 can be used as standard DAC converters. The resolution of 8 bit is controlled via the gain bits in a range of approximately 0.5 V to 7 V, depending on the offset value.
FMOSCIN Sensitivity
Vi (mVrms on 50 W) 150
Vref (AM) Offset
50
0 0 20 40 60 80 100 120 Frequency (MHz) 140 160
Figure 12.
Figure 13.
10 (14)
Rev. A5, 06-Oct-00
Preliminary Information
U4256BM
Oscillator Tuning Function Schematic
Cx1 Cx2
INV 32p 16p 0.5p 0.5p 16p 32p
B78 B84 B85 Figure 14.
Application Circuit
EN CLK DATA C 12 GND 100 nF
R5 5.1 k C8 47 pF 20 C1 10 pF fOSC FM VCO 1 Vtune C6 330 pF R4 10 k C7 C 15 10 nF C 14 10 nF 10 nF C4 100 F R3 10 nF 100 100 nF 2 3 DAC's 4 C 16 5 6 C5 7 R2 600 19 18 17 BUS LOGIC 16 15 14
C9 *)
*) *) depends on crystal 10.25 MHz 13 12 OSC 11
Switches 8 9 10
DAC1
DAC2
DAC3
VS 8 ... 12 V
SWO1
SWO2
SWO3
SWO4
Figure 15. Application circuit
Rev. A5, 06-Oct-00
11 (14)
Preliminary Information
R 106 MP1 UG10V C 308 MP2 DPLPF 100nF C 202 MP9 C 208 220nF R 303 2.2k W C 309 C 307 6 10nF 7 C 204 C 207 220nF C 310 R 111 200kW 1.5nF R 152 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 10 W C 40 220 nF 1 3 C 312 10nF KF302 450kHz 470nF C 113 C 112 10 m F R8 1kW R 104 470 W R 105 10 W 1 R 10 C 114 C 303 220nF 47pF F131 3 1nF C 110 4.7n F D 131 10nF BB804 R 121 68k W R 131 5.6kW C 134 20 19 18 17 16 15 14 C 155 100nF R 112 C 104 C 106 10nF 10pF L 102 2.2 m H F101 6 T101 BFR93A 100nF 1 D 101 BB804 C 102 D 103 S391D 10nF C 103 R 122 68kW FMV 3 R 151 8.2kW C 152 330pF C 151 10nF C 157 10nF 100 m F MP6 MPX D 301 S391D C 301 10pF C 115 D 302 S391D 100nF C 116 100nF MP7 680 W L 301 5 mH ADJ MP8 FELD 4 C 311 7 R 113 10kW T301 BC858C 47kW 10.25 MHz 13 12 11 Q151 7 C 156 10nF C 153 22pF C 154 22pF F102 2 BB804 C 107 18pF 1 D 102 68kW 3 R 102 6.8pF FM0 1 22pF C 133 6.8pF MP12 EN 10 m F 22n F C 108 C 109 C 304 C 131 C 132 C 44 R 11 2.2kW 220 nF 390W 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 MP4 IF2 MP5 STOP MP10 DATA MP11 CLOCK T302 BC858C 100 nF 10 m F 10nF C 205 C 206 2 4 220nF F302 AM/ZF2 100nF KR202 10.7 MHz 10nF 6 2 C 209 3 10nF L7 68 m H C 306 15pF 270pF 68 m H C 313 L8 AM/ZF1 F201 1 100nF KR201 10.7MHz 10kW C 201 R 202 4 1nF R 201 270 W C 203 C 313 HUB MP3 10 W
U4256BM
Application Board Schematic
12 (14)
7
L9
2.2m H
R 12
2.7kW
U4255BM
T301 BC848C
MPF102 J109
R 16
47 W
470k W
C 53
C 54
Figure 16. Application board schematic
220 nF
1nF
Preliminary Information
1nF
C 117
10nF
U4256BM
1 2 3 4 5 6 7 8 9 10
Rev. A5, 06-Oct-00
3.9pF R 103
U4256BM
Package Information
Package SSO20
Dimensions in mm
6.75 6.50 5.7 5.3 4.5 4.3
1.30 0.25 0.65 5.85 20 11 0.15 0.05 0.15 6.6 6.3
technical drawings according to DIN specifications 13007
1
10
Rev. A5, 06-Oct-00
13 (14)
Preliminary Information
U4256BM
Ozone Depleting Substances Policy Statement
It is the policy of Atmel Germany GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Atmel Germany GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Atmel Germany GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
1.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Atmel Wireless & Microcontrollers products for any unintended or unauthorized application, the buyer shall indemnify Atmel Wireless & Microcontrollers against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Data sheets can also be retrieved from the Internet: http://www.atmel-wm.com
Atmel Germany GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423
14 (14)
Rev. A5, 06-Oct-00
Preliminary Information

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