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| Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER FEATURES * 4 differential 3.3V LVPECL outputs * Selectable CLK or crystal inputs * CLK can accept the following input levels: LVCMOS, LVTTL * Maximum output frequency up to 266MHz * Output skew: 35ps (maximum) * Part-to-part skew: 150ps (maximum) * Propagation delay: 2.4ns (maximum) * 3.3V operating supply * 0C to 70C ambient operating temperature * Industrial Temperature information available upon request GENERAL DESCRIPTION The ICS8535-11 is a low skew, high performance 1-to-4 3.3V Crystal Oscillator/LVCMOS-to-3.3V HiPerClockSTM LVPECL fanout buffer and a member of the HiPerClockSTM family of High Performance Clock Solutions from ICS. The ICS8535-11 has selectable single ended clock or crystal inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and translate them to 3.3V LVPECL levels. The output enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. ,&6 Guaranteed output and part-to-part skew characteristics make the ICS8535-11 ideal for those applications demanding well defined performance and repeatability. BLOCK DIAGRAM CLK_EN D Q LE CLK XTAL1 XTAL2 CLK_SEL 0 1 Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 PIN ASSIGNMENT V EE CLK_EN CLK_SEL CLK nc XTAL1 XTAL2 nc nc VCC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 Q0 nQ0 VCC Q1 nQ1 Q2 nQ2 VCC Q3 nQ3 ICS8535-11 20-Lead TSSOP 6.5mm x 4.4mm x 0.92mm Package Body G Package Top View 8535AG-11 www.icst.com/products/hiperclocks.html 1 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER Type Power Input Input Input Unused Input Input Power Output Output Output Output Pulldown Pullup Pullup Pulldown Pulldown Description Negative supply pin. Connect to ground. Synchronizing clock enable. When HIGH, clock outputs follows clock input. When LOW, Q outputs are forced low, nQ outputs are forced high. LVCMOS / LVTTL interface levels. Clock select input. When HIGH, selects CLK input. When LOW, selects XTAL inputs. LVCMOS / LVTTL interface levels. Non-inver ting LVCMOS / LVTTL clock input. No connect. Cr ystal oscillator input. Cr ystal oscillator input. Positive supply pins. Connect to 3.3V. Differential clock outputs. LVPECL interface levels. Differential clock outputs. LVPECL interface levels. Differential clock outputs. LVPECL interface levels. Differential clock outputs. LVPECL interface levels. TABLE 1. PIN DESCRIPTIONS Number 1 2 3 4 5, 8 , 9 6 7 10, 13, 18 11, 12 14, 15 16, 17 19, 20 Name VEE CLK_EN CLK_SEL CLK nc XTAL1 XTAL2 VCC nQ3, Q3 nQ2, Q2 nQ1, Q1 nQ0, Q0 NOTE: Pullup and Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol CIN RPULLUP RPULLDOWN Parameter Input Capacitance CLK CLK_EN, CLK_SEL 51 51 Test Conditions Minimum Typical Maximum 4 4 Units pF pF K K Input Pullup Resistor Input Pulldown Resistor 8535AG-11 www.icst.com/products/hiperclocks.html 2 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER Inputs Outputs Selected Source CLK XTAL1, XTAL2 CLK Q0 thru Q3 Disabled; LOW Disabled; LOW Enabled nQ0 thru nQ3 Disabled; HIGH Disabled; HIGH Enabled Enabled TABLE 3A. CONTROL INPUT FUNCTION TABLE CLK_EN 0 0 1 CLK_SEL 0 1 0 1 1 XTAL1, XTAL2 Enabled After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock or cr ystal oscillator edge as shown in Figure 1. In the active mode, the state of the outputs are a function of the CLK input as described in Table 3B. Disabled Enabled CLK CLK_EN nQ0 - nQ3 Q0 - Q3 FIGURE 1 - CLK_EN TIMING DIAGRAM TABLE 3B. CLOCK INPUT FUNCTION TABLE Inputs CLK 0 1 Q0 thru Q3 LOW HIGH Outputs nQ0 thru nQ3 HIGH LOW 8535AG-11 www.icst.com/products/hiperclocks.html 3 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER 4.6V -0.5V to VCC + 0.5V -0.5V to VCC + 0.5V 73.2C/W (0lfpm) -65C to 150C ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCCx Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VCC = 3.3V5%, TA = 0C TO 70C Symbol VCC IEE Parameter Power Supply Voltage Power Supply Current Test Conditions Minimum 3.135 Typical 3.3 Maximum 3.465 50 Units V mA TABLE 4B. LVCMOS / LVTTL DC CHARACTERISTICS, VCC = 3.3V5%, TA = 0C TO 70C Symbol VIH Parameter Input High Voltage CLK CLK_EN, CLK_SEL CLK CLK_EN, CLK_SEL CLK, CLK_SEL CLK_EN CLK, CLK_SEL CLK_EN Test Conditions Minimum 2 2 -0.3 -0.3 VIN = VCC = 3.465V VIN = VCC = 3.465V VIN = 0V, VCC = 3.465V VIN = 0V, VCC = 3.465V -5 -150 Typical Maximum 3.765 3.765 0.8 0.8 150 5 Units V V V V A A A A VIL Input Low Voltage IIH Input High Current IIL Input Low Current TABLE 4C. LVPECL DC CHARACTERISTICS, VCC = 3.3V5%, TA = 0C TO 70C Symbol VOH VOL VSWING Parameter Output High Voltage; NOTE 1 Output Low Voltage; NOTE 1 Peak-to-Peak Output Voltage Swing Test Conditions Minimum VCC - 1.4 VCC - 2.0 0.6 Typical Maximum VCC - 1.0 VCC - 1.7 0.85 Units V V V NOTE 1: Outputs terminated with 50 to VCC - 2V. 8535AG-11 www.icst.com/products/hiperclocks.html 4 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER Test Conditions Minimum Typical Maximum Fundamental -50 -100 0.1 50 3 0 Per year @ 25C -5 14 80 7 7 70 5 25 50 100 ppm ppm mW pF nH C ppm MHz Units TABLE 5. CRYSTAL CHARACTERISTICS Parameter Mode of Oscillation Frequency Tolerance Frequency Stability Drive Level Equivalent Series Resistance (ESR) Shunt Capacitance Series Pin Inductance Operating Temperature Range Aging Frequency Range TABLE 6. AC CHARACTERISTICS, VCC=3.3V5%, TA = 0C TO 70C Symbol fMAX tPD Parameter Maximum Output Frequency Propagation Delay; NOTE 1 Output Skew; NOTE 2, 5 Par t-to-Par t skew; NOTE 3, 5 Output Rise Time Output Fall Time Output Duty Cycle; NOTE 4 20% to 80% @ 50MHz 20% to 80% @ 50MHz 300 300 48 50 266MHz 1.0 25 Test Conditions Minimum Typical Maximum 266 2.4 35 150 700 700 52 Units MHz ns ps ps ps ps % ppm t sk(o) t sk(pp) tR tF odc oscTOL Cr ystal Oscillator Tollerance 1000 All parameters measured at 266MHz unless noted otherwise. The cycle-to-cycle jitter on the input will equal the jitter on the output. The par t does not add jitter. NOTE 1: Measured from the 50% point of the input to the differential output crossing point. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential cross points. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points. NOTE 4: Measured using CLK input. For XTAL input, refer to Application Note. NOTE 5: This parameter is defined in accordance with JEDEC Standard 65. 8535AG-11 www.icst.com/products/hiperclocks.html 5 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER PARAMETER MEASUREMENT INFORMATION VCC SCOPE Qx LVPECL VCC = 2V nQx VEE = -1.3V 0.135V FIGURE 2 - CHARACTERIZATION TEST CIRCUIT Qx nQx Qy nQy tsk(o) FIGURE 3 - OUTPUT SKEW 8535AG-11 www.icst.com/products/hiperclocks.html 6 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER 80% 80% V 20% 20% t t AND SWING Clock Inputs and Outputs R F FIGURE 4 - INPUT OUTPUT RISING/FALL TIME CLK Q0 - Q3 nQ0 - nQ3 t PD FIGURE 5 - PROPAGATION DELAY CLK, Qx nCLK, nQx Pulse Width t t odc = t PW PERIOD PERIOD FIGURE 6 - odc & tPERIOD 8535AG-11 www.icst.com/products/hiperclocks.html 7 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER APPLICATION INFORMATION CRYSTAL OSCILLATOR CIRCUIT FREQUENCY FINE TUNING A crystal can be characterized for either series or parallel mode operation. The ICS8535-11 and ICS8533-11 fanout buffers have built-in crystal oscillator circuits that can accept either a series or parallel crystal without additional components. The frequency accuracy provided by this configuration is sufficient for most computer applications. For applications requiring highly accurate clock frequencies, the output frequency can be fine tuned by inserting a small series capacitor C1 at the XTAL1 input (Pin 6 for ICS8535-11) as shown in Figure 7. This fine tuning approach can be applied in either parallel or series crystal. The C1 value depends on the crystal type, frequency and the board layout. The parallel crystal fine tuning results in smaller ppm and better performance. It is difficult to provide the precise value of C1. This section provides recommended series capacitor C1 values to start with. This example uses 18pF parallel crystals. Figure 7 shows the suggested series capacitor value for a parallel crystal. For a 16.666 MHz crystal, the recommended C1 value is about 33pF. Figure 8 shows frequency accuracy versus series capacitance for 19.44MHz, 16.666MHz and 15MHz crystals. As seen from this figure, a 24pF, 33pF and 43pF series capacitor is used to achieve the lowest ppm error for 19.44MHz, 16.666MHz and 15MHz respectively. Figure 9 shows the experiment results of crystal oscillator frequency drift due to temperature variation. U1 XTAL2 X1 C1 XTAL1 FIGURE 7 - CRYSTAL INTERFACE WITH SERIES CAPACITOR C1. 8535AG-11 www.icst.com/products/hiperclocks.html 8 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER 60 14.318 50 15.000 40 16.666 30 19.440 20.000 20 24.000 10 0 14 15 16 17 18 19 20 21 22 23 24 25 Series Capacitor, C1 (pF) Crystal Frequency (MHz) FIGURE 8 - SUGGESTED SERIES CAPACITOR C1 FOR PARALLEL CRYSTAL 100 Frequency Accuracy (ppm) 80 60 40 20 0 -20 0 -40 -60 -80 -100 10 20 30 40 50 60 19.44MHz 16.666MHz 15.00MHz Series Capacitor, C1 (pF) FIGURE 9 - FREQUENCY ACCURACY FOR PARALLEL CRYSTAL USING SERIES CAPACITOR C1 8535AG-11 www.icst.com/products/hiperclocks.html 9 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER POWER CONSIDERATIONS This section provides information on power dissipation and junction temperature for the ICS8535-11. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS8535-11 is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results. NOTE: Please refer to Section 3 for details on calculating power dissipated in the load. * * Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 50mA = 173.25mW Power (outputs)MAX = 30.2mW/Loaded Output pair If all outputs are loaded, the total power is 4 * 30.2mW = 120.8mW Total Power_MAX (3.465V, with all outputs switching) = 173.25mW + 120.8mW = 294.05mW 2. Junction Temperature. Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The maximum recommended junction temperature for HiPerClockSTM devices is 125C. The equation for Tj is as follows: Tj = JA * Pd_total + TA Tj = Junction Temperature JA = junction-to-ambient thermal resistance Pd_total = Total device power dissipation (example calculation is in section 1 above) TA = Ambient Temperature In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance JA must be used . Assuming a moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6C/W per Table 7 below. Therefore, Tj for an ambient temperature of 70C with all outputs switching is: 70C + 0.294W * 66.6C/W = 89.58C. This is well below the limit of 125C This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and the type of board (single layer or multi-layer). Table 7. Thermal Resistance qJA for 20-pin TSSOP, Forced Convection qJA by Velocity (Linear Feet per Minute) 0 Single-Layer PCB, JEDEC Standard Test Boards 114.5C/W Multi-Layer PCB, JEDEC Standard Test Boards 73.2C/W 200 98.0C/W 66.6C/W 500 88.0C/W 63.5C/W NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. 8535AG-11 www.icst.com/products/hiperclocks.html 10 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. 3. Calculations and Equations. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER The purpose of this section is to derive the power dissipated into the load. LVPECL output driver circuit and termination are shown in Figure 10. VCC Q1 VOUT RL 50 VCC - 2V FIGURE 10 - LVPECL DRIVER CIRCUIT AND TERMINATION To calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of V - 2V. CC Pd_H is power dissipation when the output drives high. Pd_L is the power dissipation when the output drives low. Pd_H = [(V OH_MAX - (V CC_MAX - 2V))/R ] * (V L L CC_MAX -V OH_MAX ) Pd_L = [(VOL_MAX - (VCC_MAX - 2V))/R ] * (VCC_MAX - VOL_MAX) * For logic high, VOUT = V Using V * CC_MAX OH_MAX =V CC_MAX - 1.0V OH_MAX = 3.465, this results in V =V = 2.465V For logic low, VOUT = V Using V CC_MAX OL_MAX CC_MAX - 1.7V OL_MAX = 3.465, this results in V = 1.765V Pd_H = [(2.465V - (3.465V - 2V))/50] * (3.465V - 2.465V) = 20mW Pd_L = [(1.765V - (3.465V - 2V))/50] * (3.465V - 1.765V) = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW 8535AG-11 www.icst.com/products/hiperclocks.html 11 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER RELIABILITY INFORMATION TABLE 8. JAVS. AIR FLOW TABLE qJA by Velocity (Linear Feet per Minute) 0 Single-Layer PCB, JEDEC Standard Test Boards 114.5C/W Multi-Layer PCB, JEDEC Standard Test Boards 73.2C/W 200 98.0C/W 66.6C/W 500 88.0C/W 63.5C/W NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. TRANSISTOR COUNT The transistor count for ICS8535-11 is: 428 8535AG-11 www.icst.com/products/hiperclocks.html 12 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER PACKAGE OUTLINE - G SUFFIX TABLE 9. PACKAGE DIMENSIONS SYMBOL MIN N A A1 A2 b c D E E1 e L aaa 0.45 0 -4.30 0.65 BASIC 0.75 8 0.10 -0.05 0.80 0.19 0.09 6.40 6.40 BASIC 4.50 20 1.20 0.15 1.05 0.30 0.20 6.60 Millimeters MAX Reference Document: JEDEC Publication 95, MO-153 8535AG-11 www.icst.com/products/hiperclocks.html 13 REV. B JULY 27, 2001 Integrated Circuit Systems, Inc. ICS8535-11 LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER Marking Package 20 lead TSSOP 20 lead TSSOP on Tape and Reel Count 72 per tube 2500 Temperature 0C to 70C 0C to 70C TABLE 10. ORDERING INFORMATION Part/Order Number ICS8535AG-11 ICS8535AG-11T ICS8535AG-11 ICS8535AG-11 While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 8535AG-11 www.icst.com/products/hiperclocks.html 14 REV. B JULY 27, 2001 |
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