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Semiconductor
April 1999
CT UCT ODU E PR E PROD ) ET A OL UT OBS UBSTIT HI-0508( E S 508A, G SIBL POS G408, D D
IH6108
8-Channel CMOS Analog Multiplexer
Features
* Ultra Low Leakage - ID(OFF) 100pA (Typ) * rDS(ON) < 400 Over Full Signal and Temperature Range * Power Supply Quiescent Current Less Than 100A * 14V Analog Signal Range * No SCR Latchup * Break-Before-Make Switching * Binary Address Control (3 Address Inputs Control 8 Channels) * TTL and CMOS Compatible Strobe Control * Pin Compatible with DG508A, HI-508 and ADG508A * Internal Diode in Series with V+ for Fault Protection
Description
The IH6108 is a CMOS 1-of-8 multiplexer. The part is a plugin replacement for the DG508A. Three-line decoding is used so that the 8 channels can be controlled by 3 Address inputs; additionally a fourth input is provided for use as a system enable. When the ENABLE input is high (5V), a channel is selected by the three Address inputs, and when low (0V) all channels are off. The 3 Address inputs are TTL and CMOS logic compatible, with a "1" corresponding to any voltage greater than 2.4V.
Part Number Information
PART NUMBER IH6108MJE IH6108MJE/883B IH6108CJE IH6108CPE TEMP. RANGE (oC) -55 to 125 -55 to 125 0 to 70 0 to 70 PACKAGE 16 Ld CERDIP 16 Ld CERDIP 16 Ld CERDIP 16 Ld PDIP PKG. NO. F16.3 F16.3 F16.3 E16.3
Pinout
IH6108 (CERDIP, PDIP) TOP VIEW
A0 1 EN 2 V- 3 S1 4 S2 5 S3 6 S4 7 D8 16 A1 15 A2 14 GND 13 V+ 12 S5 11 S6 10 S7 9 S8
Functional Diagram
S1 S2 S3 S4 S5 S6 S7 S8 A0 A1 A2 EN 3 LINE BINARY ADDRESS INPUT (1 0 1) AND EN AT 5V ABOVE EXAMPLE SHOWS CHANNEL 6 TURNED ON. VOUT
D ADDRESS DECODER 1 OF 8 ENABLE INPUT
TRUTH TABLE A2 x 0 0 0 0 1 1 1 1 A1 x 0 0 1 1 0 0 1 1 A0 x 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 ON SWITCH None 1 2 3 4 5 6 7 8
NOTE: A0 , A1, A2 Logic "1" = VAH 2.4V, VENH 4.5V Logic "0" = VAL 0.8V.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
(c) Harris Corporation 1997
File Number
3156.2
12-128
IH6108
Absolute Maximum Ratings
VIN (A, EN) to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . -15V to 15V VS or VD to V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V, -36V VS to VD to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V, 36V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-18V Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA Current (Analog Source or Drain) . . . . . . . . . . . . . . . . . . . . . . 20mA
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) JC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . 100 N/A CERDIP Package . . . . . . . . . . . . . . . . 75 20 Maximum Junction Temperature (Hermetic Package) . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC M Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
V+ = 15V, V- = -15V, VEN = +5V, Ground = 0V, Unless Otherwise Specified, (Note 4) NO TESTS PER TEMP M SUFFIX (oC) TYP 25oC C SUFFIX (oC)
PARAMETER SWITCH rDS(ON)
MEASURED TERMINAL
TEST CONDITIONS
-55
25
125
0
25
70
UNITS
S to D
8
180
VD = +10V, IS = -1.0mA Sequence Each Switch On VAL = 0.8V, VAH = 2.4V VD = -10V, IS = -1.0mA Sequence Each Switch On VAL = 0.8V, VAH = 2.4V rDS(ON) = rDS ( ON )MAX -rDS ( ON )MIN ---------------------------------------------------------------------------------- , r
DS ( ON )AV G
300
300
400
350
350
450
8
150
300
300
400
350
350
450
rDS(ON)
20
-
-
-
-
-
-
%
VS = 10V IS(OFF) S 8 8 ID(OFF) D 1 1 ID(ON) D 8 0.002 0.002 0.03 0.03 0.1 VS = 10V, VD = -10V VS = -10V, VD = 10V, VEN = 0.8V VD = 10V, VS = -10V, VEN = 0.8V VD = -10V, VS = 10V, VEN = 0.8V VS(ALL) = VD = 10V, Sequence Each Switch On VAL = 0.8V, VAH = 2.4V VS(ALL) = VD = -10V, Sequence Each Switch On VAL = 0.8V, VAH = 2.4V VA = 0V VA = 14V VEN = 5V, All VA = 0V (Address Pins) VEN = 0V, All VA = 0V (Address Pins) 0.5 0.5 2 2 2 50 50 100 100 100 1 1 5 5 5 50 50 100 100 100 nA nA nA nA nA
8
0.1
-
2
100
-
5
100
nA
INPUT IAN(ON) or IA(on) IAN(OFF) IA(off) IA A0 , A1 , or A2 Inputs A0 , A1 , A2 3 3 3 1 0.01 0.01 0.01 0.01 -10 10 -10 -10 -30 30 -30 -30 -10 10 -10 -10 -30 30 -30 -30 A A A A
EN
12-129
IH6108
Electrical Specifications
V+ = 15V, V- = -15V, VEN = +5V, Ground = 0V, Unless Otherwise Specified, (Note 4) (Continued) NO TESTS PER TEMP M SUFFIX (oC) TYP 25oC C SUFFIX (oC)
PARAMETER DYNAMIC tTRANSITION tOPEN tON(EN) tOFF(EN) "OFF" Isolation
MEASURED TERMINAL
TEST CONDITIONS
-55
25
125
0
25
70
UNITS s s s s dB
D D D D D
0.3 0.2 0.6 0.4 60
See Figure 1 See Figure 2 See Figure 3 See Figure 3 VEN = 0V, RL = 200, CL = 3pF, VS = 3VRMS , f = 500kHz VS = 0V, VEN = 0V, f = 140kHz to 1MHz VD = 0V,VEN = 0V, f = 140kHz to 1MHz VS = 0V, VD = 0V, VEN = 0V, f = 140kHz to 1MHz
-
1 1.5 1 -
-
-
-
-
CS(OFF) CD(OFF) CDS(OFF)
S D D to S
5 25 1
-
-
-
-
-
-
pF pF pF
SUPPLY Positive Supply Current Negative Supply Current Positive Standby Current Negative Standby Current NOTE: 2. See "Enable Input Strobing Levels", in Application Section. V+ VV+ V1 1 1 1 40 2 1 1 VEN = 5V, All VA = 0V or 5V VEN = 5V, All VA = 0V or 5V VEN = 0V, All VA = 0V or 5V VEN = 0V, All VA = 0V or 5V 200 100 100 100 1000 1000 1000 1000 A A A A
Switching Information
+15V V+ VA tr < 100ns tf < 100ns 10V VOUT VS1 = +10V VS8 = -10V ttrans(1-8) -9V 10V VOUT V-15V D RP CP PROBE IMPEDANCE RP 1M CP 30pF PROBE VOUT VS1 = -10V VS8 = +10V -10V S1 ON S8 ON +9V ttrans(1-8) +10V -10V S1 ON S8 ON 3V 0.8V +10V 50% ttrans(8-1) +9V
S1 S2 S3 S IH6108 4 S5 A0 S6 A1 S7 A2 S8 VA 50 EN GND +5V
-9V ttrans(8-1)
FIGURE 1. tTRANSITION SWITCHING TEST CIRCUIT AND WAVEFORMS
12-130
IH6108 Switching Information
A2 A1 A0 VA +5V EN S1 S2 THRU S7 IH6108 S8 VGND -15V D 200
(Continued)
+15V -2V VA tr < 100ns tf < 100ns VOUT VOUT 35pF tOPEN 3V
0.8V VS1 = -2V S1 ON 50% tOPEN S8 ON 50%
0.8V
FIGURE 2. tOPEN (BREAK-BEFORE-MAKE) SWITCHING TEST CIRCUIT AND WAVEFORMS
+15V S1 S2 THRU A0 IH6108 S8 A2 A1 EN VEN GND -15V OUT VOUT 1k 35pF 90% tEN(ON) VS1 = -2V
VS1
VEN tr < 100ns tf < 100ns 0.8V VOUT 0V
5V 50%
tEN(OFF) 10%
FIGURE 3. tON AND tOFF SWITCHING TEST CIRCUIT AND WAVEFORMS
IH6108 Application Information
ENABLE Input Strobing Levels The ENABLE input on the IH6108 requires a minimum of +4.5V to trigger to the "1" state and a maximum of +0.8V to trigger to the "0" state. If the ENABLE input is being driven from TTL logic, a pull-up resistor of 1k to 3k is required from the gate output to +5V supply. (See Figure 4.) When the EN input is driven from CMOS logic, no pullup is necessary, see Figure 5. The supply voltage of the CD4009 affects the switching speed of the IH6108; the same is true for TTL supply voltage levels. The following chart shows the effect, on ttrans for a supply varying from +4.5V to +5.5V.
CMOS OR TTL SUPPLY VOLTAGE TYPICAL TTRANS AT 25oC
Using the IH6108 with Supplies Other Than 15V The IH6108 can be used with power supplies ranging from 6V to 16V. The switch rDS(ON) will increase as the supply voltages decrease, however, the multiplexer error term (the product of leakage times rDS(ON)) will remain approximately constant since leakage decreases as the supply voltages are reduced. Caution must be taken to ensure that the enable (EN) voltage is at least 0.7V below V+ at all times. If this is not done, the Address input strobing levels will not function properly. This may be achieved quite simply by connecting EN (pin 2) to V+ (pin 13) via a silicon diode as shown in Figure 6. When using this type of configuration, a further requirement must be met: the strobe levels of A0 and A1 must be within 2.5V of the EN voltage in order to define a binary "1" state. For the case shown in Figure 6 the EN voltage is 11.3V which means that logic high at A0 and A1 is +8.8V (logic low continues to be 0.8V). In this configuration the IH6108 cannot be driven by TTL (+5V) or CMOS (+5V) logic. It can be driven by TTL open collector logic or CMOS logic with +12V supplies. If the logic and the IH6108 have common supplies, the EN pin should again be connected to the supply through a silicon diode. In this case, tying EN to the logic supply directly will not work since it violates the 0.7V differential voltage required between V+ and EN, (See Figure 7). A 1F capacitor can be placed across the diode to minimize switching glitches.
+4.5V +4.75V +5.00V +5.25V +5.50V
400ns 300ns 250ns 200ns 175ns
The throughput rate can therefore be maximized by using a +5V to +5.5V supply for the ENABLE Strobe Logic. The examples shown in Figures 4 and 5 deal with ENABLE strobing when expansion to more than eight channels is required. In these cases the EN terminal acts as a fourth address input. If eight channels or less are being multiplexed, the EN terminal can be directly connected to +5V logic supply to enable the IH6108 at all times.
12-131
IH6108 Switching Information
+5V 1k A0 1 EN 2 16 A1 15 A2 14 IH6108 13 +15V 12 S5 11 S6 10 S7 9 S8
1 2 3 4 5 6 7 DM7404N TTL LOGIC
14 13 12 11 10 9 8
-15V 3 +3V 0V S1 4 S2 5 S3 6 S4 7 D VOUT 8
FIGURE 4. ENABLE INPUT STROBING FROM TTL LOGIC
+5V
1 2 3 4 5 6 7 8 CD4009
16 15 14 13 12 11 10 9 A0 1 EN 2 16 A1 15 A2 14 GND IH6108 13 +15V 12 S5 11 S6 10 S7 9 S8
-15V 3 S1 4 S2 5 S3 6 S4 7 D8
FIGURE 5. ENABLE INPUT DRIVEN FROM CMOS LOGIC
1N914
A0 1 EN 2
16 A1 15 A2 14 IH6108 13 +12V
-12V 3 S1 4 INPUTS S2 5 S3 6 S4 7 (VOUT) D 8
12 S5 11 S6 10 S7 9 S8 INPUTS
FIGURE 6. IH6108 CONNECTION DIAGRAM FOR LESS THAN 15V SUPPLY OPERATION
12-132
IH6108 Switching Information
(Continued)
1N914 OR ANY SILICON DIODE
A0 1 2 3 4 5 6 7 8 CD4009A 16 15 14 13 12 11 10 9 EN
1 2
16 15 14 IH6108 13 12 11 10 9
A1 A2
-12V 3 4 5 6 7 8
+12V
FIGURE 7. IH6108 CONNECTION DIAGRAM WITH ENABLE INPUT STROBING FOR LESS THAN 15V SUPPLY OPERATION
Peak-to-Peak Signal Handling Capability
The IH6108 can handle input signals up to 14V (actually -15V to +14.3V because of the input protection diode) when using the 15V supplies. The electrical specifications of the IH6108 are guaranteed for 10V signals, but the specifications have very minor changes for 14V signals. The notable changes are slightly lower rDS(ON) and slightly higher leakages.
TRUTH TABLE A3 0
+15V EN IH6108 A0 A1 A2 A3 TTL OR CMOS INVERTER EN S16 S9 S8 +15V S1 -15V VOUT -15V
A2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
A1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
A0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
ON SWITCH S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16
0 0 0 0 0 0 0 1
IH6108
1 1 1 1 1 1 1
NOTE: TTL inverter must have pullup resistor to +5V to drive EN input. FIGURE 8. 1 OF 16 CHANNEL MULTIPLEXER USING TWO IH6108s. OVERVOLTAGE PROTECTION IS MAINTAINED BETWEEN ALL CHANNELS, AS IS BREAK-BEFORE-MAKE SWITCHING.
12-133
IH6108
+5V TTL/CMOS INVERTER A0 TTL/CMOS NOR GATE A3 A4 1 8 ANALOG INPUTS A0 A1 A2 EN IH6108 1 OUT OF 8 MUX A1 A2 EN IH6108 1 OUT OF 8 MUX S1 IN1 IN2 S2 VL GND
-15V +15V VV+
IH5053 S1 D1
D2 S2
9 16 ANALOG INPUTS A0 A1 A2 EN IH6108 1 OUT OF 8 MUX S3 17 24 ANALOG INPUTS A0 A1 A2 EN IH6108 1 OUT OF 8 MUX IN3 IN4 S4 S4 GND LV 25 32 ANALOG INPUTS +5V V+ VD4 IH5053 S3 D3
VOUT
+15V -15V
TRUTH TABLE A4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 A2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ON SWITCH S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 A4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
TRUTH TABLE A2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ON SWITCH S17 S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32
NOTE: TTL inverter must have pullup resistor to +5V to drive EN input. FIGURE 9. 1 OF 32 CHANNEL MULTIPLEXER USING FOUR IH6108s, AND TWO IH5053s AS A SUBMULTIPLEXER
12-134
IH6108 Schematic Diagram
1) A0' OR A0' 2) A1' OR A1' 3) A2' OR A2' S1 S2 S3 S4 S5 S6 S7 1 2 3 P VADDRESS DECODER VS8 VN D
AX
ADDRESS INPUT EN GND
LEVEL SHIFTER V-
AX' AX'
EN
INPUT BUFFER AND LEVEL SHIFTER GND VV++
V+ VGND
FIGURE 10. IH6108 SCHEMATIC DIAGRAM
V++
P EN
P
P
P
N P N
N
N
N EN'
GND
V-
FIGURE 11. ENABLE INPUT AND LEVEL SHIFTER
12-135
IH6108
V++
P AX N
P
AX' P
EN V++ P
GND N N N VAX'
FIGURE 12. ADDRESS INPUT AND LEVEL SHIFTER
12-136

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