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| Ordering number : EN5000A CMOS LSI LC73881M DTMF Receiver LSI Applications * Remote controllers for telephone answering machines and other telephone products Package Dimensions unit: mm 3086A-MFP10S [LC73881M] Features * Detects 16 DTMF signals. * Includes on-chip all filters required in a DTMF receiver -- Dial-tone filter -- High-frequency group bandpass filter -- Low-frequency group bandpass filter * Serial data output * Supports microprocessor-controlled guard times. * Wide operating power-supply voltage range: 2.7 to 5.5 V * Supports a low power mode that allows current dissipation to be reduced. Specifications Absolute Maximum Ratings at Ta = 25C Parameter Maximum supply voltage Input voltage Input current Output voltage Allowable power dissipation Operating temperature Storage temperature Symbol VDD max VIN IIN VOUT Pd max Topr Tstg Ta 70C Conditions SANYO: MFP10S Ratings -0.3 to + 6.0 -0.3 to VDD + 0.3 -10 to +10 -0.3 to VDD + 0.3 120 -35 to +70 -50 to +125 Unit V V mA V mW C C Allowable Operating Ranges at Ta = -35 to +70C, VSS = 0 V Parameter Operating supply voltage Input high-level voltage Symbol VDD VIH VIL Pin 7 Pin 2 Pin 7 Pin 2 Conditions min 2.7 0.7 VDD 0.85 VDD 0.3 VDD 0.15 VDD typ max 5.5 Unit V V V V V Input low-level voltage DC Electrical Characteristics at Ta = 25C, VDD = 3 V, VSS = 0 V Parameter Operating supply current Standby supply current Output high-level current Output low-level current Input impedance Pull-down resistor current Symbol IDD (op) IDD (st) IOH IOL Zin ISI PD pin = 3 V Pins 6, 8 and 9, VOUT = 2.6 V Pins 6, 8 and 9, VOUT = 0.4 V Pin 1 PD = 3 V 0.6 10 1.2 3.0 Conditions min typ 1.6 max 2.8 20 -0.3 Unit mA A mA mA k A SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 63098HA (OT)/72595HA (OT) No. 5000-1/6 LC73881M AC Electrical Characteristics at Ta = 25C, VDD = 3 V, VSS = 0 V, fOSC = 4.194304 MHz Parameter Input signal valid level Positive twist accept Frequency detection accept Frequency rejection accept Third tone tolerance Dial tone tolerance Noise tolerance Tone present detection time Tone absent detection time Tone duration accept Tone duration reject Inter-digit pause invalid time Inter-digit pause valid time Data shift speed Data output delay time Setup time delay Data hold time Oscillator frequency Load capacitance Symbol -- -- -- -- -- -- -- tDP tDA tREC tREC tDO tID -- tPAD tDL tDH fOSC CXO The OSCI and OSCO pins See the ACK/SD timing chart See the ACK/SD timing chart See the ACK/SD timing chart 4 30 4.190109 4.194304 4.198498 30 100 *1, 2, 3, 5, 6, 9 *2, 3, 6, 9, 11 *2, 3, 5, 9 *2, 3, 5 *2, 3, 4, 5, 9, 10 *2, 3, 4, 5, 8, 9, 10 *2, 3, 4, 5, 7, 9, 10 See the timing chart. See the timing chart. See the timing chart. See the timing chart. See the timing chart. See the timing chart. 40 1 45 20 3 0.5 1.5% 2 3.5 -16 +22 -8 20 20 20 Conditions min -45 10 typ max -20 Unit dBm dB Hz % dB dB dB ms ms ms ms ms ms MHz ns s ns MHz pF Note: 1. The dBm values are defined such that 0 dBm is the 1 mW power level for a 600 load. 2. All 16 DTMF signals frequency 3. With a 40 ms DTMF signal period and a 40 ms pause period 4. Nominal DTMF signal frequencies 5. Low-group and high-group signal levels are the same. 6. DTMF signal frequency deviations within 1.5% 2 Hz 7. Gaussian noise with a 0 to 3 kHz bandwidth 8. 350 and 440 Hz dial tone frequencies 9. Error rate of less than 1 error in 10,000 events 10.Referenced to the lowest component of the DTMF signal. High-frequency group tone level 11.Twist = Low-frequency group tone level Pin Assignment No. 5000-2/6 LC73881M Pin Functions Pin No. 1 2 3 4 5 6 7 Symbol INPUT PD OSCO OSCI VSS SD ACK O I I/O I I O I Function The input must be capacitor coupled. This signal is biased to VDD/2 internally. The LC73881M goes to low power mode when this pin is set high. Connect a 4.194304 MHz crystal oscillator or ceramic resonator to these pins to from an oscillator circuit. When using a ceramic resonator, a capacitor of approximately 30 pF must be connected to each pin. Power supply pin. Normally 0 V. The decoded DTMF signal is output, this pin in a 4-bit LSB first format. The ACK pin is used to shift out data from the SD pin. Four pulses are required to shift out the DTMF character, which consists of four bits. The rising edge of the first pulse latches the data (before shifting) into the shift register. A high level indicates the presence of a DTMF signal. Although the rise of this signal is later than that of the EST pin, it is less sensitive to burst waveforms and other noise. A high level indicates the presence of a DTMF signal. Applications should monitor this pin and, after waiting an appropriate period, apply four pulses to the ACK pin to access the data. Power supply pin. Normally 2.7 to 5.5 V. 8 9 10 STD EST VDD O O Block Diagram Test Circuit, Sample Application Circuit No. 5000-3/6 LC73881M Timing Chart Normal State Timing Chart When the DTMF signal (#n) is split due to, for example, the burst signal When noise (#n+a) similar to a DTMF signal is input No. 5000-4/6 LC73881M When the data output is disrupted due to input clock displacement. Data is output from the SD pin after 4 pulses are input to the ACK pin. However, note that if 5 or more pulses are input between one rising edge on the EST pin and the next rising edge on the EST pin, the fifth and later pulses will be ignored. ACK/SD Timing Chart Reset Timing at Power On > 1 s Filter Characteristics No. 5000-5/6 LC73881M Output Code Table FL 697 697 697 770 770 770 852 852 852 941 941 941 697 770 852 941 FH 1209 1336 1477 1209 1336 1477 1209 1336 1477 1336 1209 1477 1633 1633 1633 1633 # A B C D Key 1 2 3 4 5 6 7 8 9 0 b3 L L L L L L L H H H H H H H H L b2 L L L H H H H L L L L H H H H L b1 L H H L L H H L L H H L L H H L b0 H L H L H L H L H L H L H L H L DTMF Dialing Matrix s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of June, 1998. Specifications and information herein are subject to change without notice. PS No. 5000-6/6 |
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