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HN27C256AG Series 32768-word x 8-bit UV Erasable and Programmable ROM Maintenance only Description This Hitachi HN27C256AG is a 256-kbit ultraviolet erasable and electrically programmable ROM, featuring high speed and low power dissipation. Fabricated on advanced fine process and high speed circuitry technique, the HN27C256AG makes high speed access time possible for 16 bit microprocessors such as the 8086 and 68000. And low power dissipation in active and standby modes matches our CMOS 256-kbit EPROM. In programming operation, the HN27C256AG realizes faster programming times than our conventional 256-kbit EPROM by Hitachi's Fast High-Reliability Programming Algorithm. Pin arrangement, pin configuration and programming voltage are compatible with our 256-kbit EPROM series, therefore existing programmers can be used with the HN27C256AG. Features * High speed Access time: 100/120/150 ns (max) * Low power dissipation Active mode: 25 mW (typ) (f = 1 MHz) Standby mode: 5 W (typ) * High reliability and fast programming Programming voltage: +12.5 V DC Fast High-Reliability Programming Algorithm available * Device identifier mode Manufacturer code and device code Ordering Information Type No. HN27C256AG-10 HN27C256AG-12 HN27C256AG-15 Access Time 100 ns 120 ns 150 ns Package 600-mil 28-pin cerdip (DG-28) Note: This device is not available for new application. HN27C256AG Series Pin Arrangement VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A14 A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 (Top View) Pin Description Pin Name A0 - A14 I/O0 - I/O7 CE OE VCC VPP VSS Function Address Input/output Chip enable Output enable Power supply Programming power supply Ground 2 HN27C256AG Series Block Diagram X-Decoder A4 - A9 A12 - A14 512 x 512 Memory Matrix Address Input Data Control I/O0 Y-Gating Y-Decoder I/O7 CE OE VCC VPP VSS H H A0 - A3 A10, A11 : High Threshold Inverter 3 HN27C256AG Series Mode Selection Mode Read Output disable Standby Program Program verify Optional verify Program inhibit Identifier CE (20) VIL VIL VIH VIL VIH VIL VIH VIL OE (22) VIL VIH X VIH VIL VIL VIH VIL A9 (24) X X X X X X X VH *2 VPP (1) VCC VCC VCC VPP VPP VPP VPP VCC VCC (28) VCC VCC VCC VCC VCC VCC VCC VCC I/O (11 - 13, 15 - 19) Dout High-Z High-Z Din Dout Dout High-Z Code Notes: 1. x : Don't care. 2. VH : 12.0 V 0.5 V. Absolute Maximum Ratings Parameter All input and output voltage A9 input voltage VPP voltage VCC voltage *1 *1 *1 *1 Symbol Vin, Vout VID VPP VCC Topr Tstg Tbias Value -0.6 to +7.0 -0.6 to +13.5 -0.6 to +13.5 -0.6 to +7.0 0 to +70 -65 to +125 -10 to +80 *2 *2 Unit V V V V C C C Operating temperature range Storage temperature range Storage temperature range under bias Notes: 1. Relative to VSS . 2. Vin, Vout, V ID min = -1.0 V for pulse width 50 ns. Capacitance (Ta = 25C, f = 1 MHz) Parameter Input capacitance Output capacitance Symbol Cin Cout Min -- -- Typ 4 8 Max 8 12 Unit pF pF Test Conditions Vin = 0 V Vout = 0 V 4 HN27C256AG Series Read Operation DC Characteristics (Ta = 0 to +70C, VCC = 5 V 10%, VPP = VCC) Parameter Input leakage current Output leakage current VPP current Standby V CC current Symbol I LI I LO I PP1 I SB1 I SB2 Operating VCC current I CC1 I CC2 I CC3 Input low voltage *3 *3 Min -- -- -- -- -- -- -- -- -0.3 2.2 -- 2.4 VCC - 0.7 *1 Typ -- -- 1 -- 1 -- -- 5 -- -- -- -- -- Max 2 2 20 1 20 30 30 15 0.8 VCC + 1.0 0.45 -- -- *2 Unit A A A mA A mA mA mA V V V V V Test Conditions Vin = 0 V to VCC Vout = 0 V to VCC VPP = 5.5 V CE = VIH CE = VCC 0.3 V CE = VIL, Iout = 0 mA f = 10 MHz, Iout = 0 mA f = 1 MHz, Iout = 0 mA VIL VIH VOL VOH1 VOH2 Input high voltage Output low voltage Output high voltage I OL = 2.1 mA I OH = -1.0 mA I OH = -100 A Notes: 1. VIL min = -1.0 V for pulse width 50 ns. 2. VIH max = VCC + 1.5 V for pulse width 20 ns. If V IH is over the specified maximum value, read operation cannot be guaranteed. 3. Only defined for DC function test. V IL max = 0.45 V, VIH min = 2.4 V for AC function test. 5 HN27C256AG Series AC Characteristics (Ta = 0 to +70C, VCC = 5 V 10%, VPP = VCC) Test Conditions * * * * Input pulse levels: 0.45 V to 2.4 V Input rise and fall time: 10 ns Output load: 1TTL gate + 100 pF Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V Outputs; 0.8 V and 2.0 V HN27C256AG -10 Parameter Symbol Min -- -- -- 0 5 Max 100 100 60 35 -- -12 Min -- -- -- 0 5 Max 120 120 60 40 -- -15 Min -- -- -- 0 5 Max 150 150 70 50 -- Unit ns ns ns ns ns Test Conditions CE = OE = VIL OE = VIL CE = VIL CE = VIL CE = OE = VIL Address to output delay t ACC CE to output delay OE to output delay OE high to output float t CE t OE t DF Address to output hold t OH Note: t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. Read Timing Waveform Address CE Standby Mode Active Mode tCE Standby Mode OE tOE tACC Data Out tDF tOH Data Out Valid 6 HN27C256AG Series Fast High-Reliability Programming This device can be applied the Fast High-Reliability Programming Algorithm shown in following flowchart. This algorithm offers both faster programming time and high reliability data retension. A theoretical programming time (except brank checking and verifying time) is one-tenth of conventional high performance programming algorithm's. Regarding the model and software version of the programmers available this algorithm, please contact programmer maker. START SET PROG./VERIFY MODE VPP = 12.5 0.5 V, VCC = 6.0 0.25 V Address = 0 n=0 n+1 n Program tPW = 0.2 ms 5% NOGO Address + 1 Address VERIFY GO Program tOPW = 0.2n ms n = 25 YES NO NO LAST Address? YES SET READ MODE VCC = 5.0 V 0.5 V, VPP = VCC READ All Address GO END NOGO FAIL 7 HN27C256AG Series DC Characteristics (Ta = 25C 5C, VCC = 6 V 0.25 V, VPP = 12.5 V 0.5 V) Parameter Input leakage current VPP supply current Operating VCC current Input low level Input high level Output low voltage during verify Output high voltage during verify Symbol I LI I PP I CC VIL VIH VOL VOH Min -- -- -- -0.1 2.2 -- 2.4 *5 Typ -- -- -- -- -- -- -- Max 2 30 30 0.8 VCC + 0.5 0.45 -- *6 Unit A mA mA V V V V Test Conditions Vin = 0 V to VCC CE = VIL I OL = 2.1 mA I OH = -400 A Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13.5 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12. 5V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V or 12.5 V to VIL when CE = Low. 5. VIL min = -0.6 V for pulse width 20 ns. 6. If V IH is over the specified maximum value, programming operation cannot be guaranteed. 8 HN27C256AG Series AC Characteristics (Ta = 25C 5C, VCC = 6 V 0.25 V, VPP = 12.5 V 0.5 V) Test Conditions * Input pulse levels: 0.45 V to 2.4 V * Input rise and fall time: 20 ns * Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V Outputs; 0.8 V and 2.0 V Parameter Address setup time OE setup time Data setup time Address hold time Data hold time VPP setup time VCC setup time CE over programming pulse width Data valid from OE OE to output float delay Symbol t AS t OES t DS t AH t DH t VPS t VCS *1 Min 2 2 2 0 2 2 2 0.19 0.19 0 -- Typ -- -- -- -- -- -- -- 0.20 -- -- -- Max -- -- -- -- -- -- -- 0.21 5.25 150 130 Unit s s s s s s s ms ms ns ns Test Conditions CE initial programming pulse width t PW t OPW t OE t DF *2 Notes: 1. Refer to the Fast High-Reliability Programming Flowchart for tOPW. 2. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 9 HN27C256AG Series Fast High-Reliability Programming Timing Waveform Program Address tAS Data Data In Stable tDS VPP VPP VCC VCC+1 VCC VCC tVCS tVPS tDH tAH Data Out Valid tDF Program Verify CE tPW OE tOES tOE 10 HN27C256AG Series High Performance Programming This device can be applied the high performance programming algorithm shown in following flowchart. This algorithm is as same as our 256-kbit EPROM series so existing programmers can be used with this device. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data. START SET PROG./VERIFY MODE VPP = 12.5 0.5 V, VCC = 6.0 0.25 V Address = 0 n=0 n+1 n Program tPW = 1.0 ms 5% NOGO Address + 1 Address VERIFY GO Program tOPW = 3n ms n = 25 YES NO NO LAST Address? YES SET READ MODE VCC = 5.0 V 0.5 V, VPP = VCC READ All Address GO END NOGO FAIL 11 HN27C256AG Series DC Characteristics (Ta = 25C 5C, VCC = 6 V 0.25 V, VPP = 12.5 V 0.5 V) Parameter Input leakage current VPP supply current Operating VCC current Input low level Input high level Output low voltage during verify Output high voltage during verify Symbol I LI I PP I CC VIL VIH VOL VOH Min -- -- -- -0.1 2.2 -- 2.4 *5 Typ -- -- -- -- -- -- -- Max 2 30 30 0.8 VCC + 0.5 0.45 -- *6 Unit A mA mA V V V V Test Conditions Vin = 0 V to VCC CE = VIL I OL = 2.1 mA I OH = -400 A Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13.5 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12. 5V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V or 12.5 V to VIL when CE = Low. 5. VIL min = -0.6 V for pulse width 20 ns. 6. If V IH is over the specified maximum value, programming operation cannot be guaranteed. 12 HN27C256AG Series AC Characteristics (Ta = 25C 5C, VCC = 6 V 0.25 V, VPP = 12.5 V 0.5 V) Test Conditions * Input pulse levels: 0.45 V to 2.4 V * Input rise and fall time: 20 ns * Reference levels for measuring timing: Inputs; 0.8 V and 2.0 V Outputs; 0.8 V and 2.0 V Parameter Address setup time OE setup time Data setup time Address hold time Data hold time VPP setup time VCC setup time CE over programming pulse width Data valid from OE OE to output float delay Symbol t AS t OES t DS t AH t DH t VPS t VCS *1 Min 2 2 2 0 2 2 2 0.95 2.85 0 -- Typ -- -- -- -- -- -- -- 1.0 -- -- -- Max -- -- -- -- -- -- -- 1.05 78.75 150 130 Unit s s s s s s s ms ms ns ns Test Conditions CE initial programming pulse width t PW t OPW t OE t DF *2 Notes: 1. Refer to the high performance programming flowchart for t OPW. 2. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 13 HN27C256AG Series High Performance Programming Timing Waveform Program Program Verify Address tAS Data tDS VPP VPP VCC tVPS Data In Stable tDH tAH Data Out Valid tDF VCC + 1 VCC VCC tVCS CE tPW OE tOES tOE Erase Erasure of HN27C256AG is performed by exposure to ultraviolet light of 2537 A and all the output data are changed to "1" after this erasure procedure. The minimum integrated dose (i.e. UV intensity x exposure time) for erasure is 15 W * sec/cm2. Mode Description Device Identifier Mode Programming condition of EPROM is various according to EPROM manufacturers and device types. It may cause miss operation. To countermeasure it, some EPROMs provide maker identifier code. Users can write EPROM by reading out write condition coded before shipped. Some commercial programmers can set write condition by recognizing this code. This function enables effective program. Regarding commercial programmers that can recognize this device's identifier code, please contact programmer maker. 14 HN27C256AG Series HN27C256AG Series Identifier Code A0 (10) VIL VIH I/O7 (19) 0 0 I/O6 (18) 0 0 I/O5 (17) 0 1 I/O4 (16) 0 1 I/O3 (15) 0 0 I/O2 (13) 1 0 I/O1 (12) 1 0 I/O0 (11) 1 1 Identifier Manufacturer code Device code Hex Data 07 31 Notes: 1. A9 = 12.0 V 0.5 V. 2. A1 - A8, A10 - A14, CE, OE = VIL. 15 HN27C256AG Series Package Dimensions HN27C256AG Series (DG-28) 36.83 38.10 Max 28 15 14.66 15.51 Max Unit: mm 8 .89 1 1.32 2.54 Max 14 15.24 2.54 Min 5.89 Max 0.38 Min 2.54 0.25 0.48 0.10 0.25 - 0.05 0 - 15 + 0.11 16 |
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