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| STS1NK60Z N-CHANNEL 600V - 13 - 0.25A - SO-8 Zener-Protected SuperMESHTM Power MOSFET TYPE STS1NK60Z VDSS 600 V RDS(on) < 15 ID 0.25 A Pw 2W TYPICAL RDS(on) = 13 EXTREMELY HIGH dv/dt CAPABILITY ESD IMPROVED CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED SO-8 DESCRIPTION The SuperMESHTM series is obtained through an extreme optimization of ST's well established stripbased PowerMESHTM layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmeshTM products. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS AC ADAPTORS AND BATTERY CHARGERS SWITH MODE POWER SUPPLIES (SMPS) ORDERING INFORMATION SALES TYPE STS1NK60Z MARKING S1NK60Z PACKAGE SO-8 PACKAGING TAPE & REEL June 2003 1/8 STS1NK60Z ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM ( ) PTOT VESD(G-S) dv/dt (1) Tj Tstg Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Gate source ESD(HBM-C=100pF, R=1.5K) Peak Diode Recovery voltage slope Operating Junction Temperature Storage Temperature Value 600 600 30 0.25 0.16 1 2 0.016 800 4.5 -55 to 150 -55 to 150 Unit V V V A A A W W/C V V/ns C C ( ) Pulse width limited by safe operating area (1) ISD 0.3A, di/dt 200A/s, VDD V(BR)DSS, Tj TJMAX. THERMAL DATA Rthj-amb Thermal Resistance Junction-ambient Max 62.5 C/W GATE-SOURCE ZENER DIODE Symbol BVGSO Parameter Gate-Source Breakdown Voltage Test Conditions Igs= 1mA (Open Drain) Min. 30 Typ. Max. Unit V PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components. 2/8 STS1NK60Z ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED) ON/OFF Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 20V VDS = VGS, ID = 50 A VGS = 10V, ID = 0.4 A 3 3.75 13 Min. 600 1 50 10 4.5 15 Typ. Max. Unit V A A A V DYNAMIC Symbol gfs (1) Ciss Coss Crss Coss eq. (3) Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = V, ID = 0.4 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 0.5 94 17.6 2.8 11 Max. Unit S pF pF pF pF VGS = 0V, VDS = 0V to 480V SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Test Conditions VDD = 300V, ID = 0.4 A RG = 4.7 VGS = 10 V (Resistive Load see, Figure 3) VDD = 480V, ID = 0.8 A, VGS = 10V Min. Typ. 5.5 5 4.9 1 2.7 6.9 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol td(off) tf tr(Voff) tf tc Parameter Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 300V, ID = 0.4A RG = 4.7 VGS = 10 V (Resistive Load see, Figure 3) VDD =480V, ID = 0.8A, RG = 4.7, VGS = 10V (Inductive Load see, Figure 5) Min. Typ. 13 28 28 12.5 48 Max. Unit ns ns ns ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 0.25A, VGS = 0 ISD = 0.8 A, di/dt = 100A/s VDD = 20V, Tj = 150C (see test circuit, Figure 5) 140 224 3.2 Test Conditions Min. Typ. Max. 0.25 1 1.6 Unit A A V ns nC A Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 3/8 STS1NK60Z Safe Operating Area Thermal Impedance Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/8 STS1NK60Z Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature 5/8 STS1NK60Z Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STS1NK60Z SO-8 MECHANICAL DATA DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm TYP. MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 0016023 7/8 STS1NK60Z Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com 8/8 |
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