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TV SOUND MPX FOR TWO CARRIER SYSTEM
S1A0688C01
INTRODUCTION
32-SDIP-400 The S1A0688C01 is a monolithic integrated circuit designed for demodulating two carrier TV-MPX broadcast.
FEATURES
* * * * * * * * * * * * 1st & 2nd Sound IF Double-PLL FM Detection AGC for CCA part Matrix for Multi-Sound Broadcasts Pilot Detector External Control Interface ID Indicators (Stereo, Bilingual) Available for Korea standard Non-clipping Output up to 400% modulation with AGC Available in DC control, Normal microcontroler control or IIC bus control systems ID output: Direct LED drive or IIC serial data output Non-adjust
ORDERING INFORMATION
Device S1A0688C01-A0B0 Package 32-SDIP-400 Operating Temperature -10 to + 70 C
1
S1A0688C01
TV SOUND MPX FOR TWO CARRIER SYSTEM
BLOCK DIAGRAM
1
19
7
6
8
9
10
12
11
13
14
GND
VSS
4.72MHz 1st PLL 4.72MHz 2nd PLL
AGC AMP
2
IF A CCA MATRIX
18
3 4
IF
4.5MHz 2nd PLL
A 1/39
CCA
15
5
4.5MHz 1st PLL 4.3MHz VCO S1
1/2
31
S1 30KHz HPF 100KHz LPF
1/100 1/370 1/200
29
X20 55.1KHz SC BPF AM DET
30 17
DN CUT
26
OFFSET CANCELLER MN DET X3 150Hz SC BPF
COMP DIGITAL FREQUENCY DETECTOR
23 24
276Hz SC BPF 390Hz SC BPF
X8
27
CONTROL TYPE AUTO DETECT U-COM INTERFACE (DC/3-LINE U-COM/IIC-BUS)
ZAPPING BLOCK
CCA PLL
VOLTAGE REFERENCE
VCC
VDD
28
22
21
20
32
16
25
2
TV SOUND MPX FOR TWO CARRIER SYSTEM
S1A0688C01
PIN CONFIGURATION
RC 32
TMS 31
RCM 30
ECI 29
SCC 28
FDI 27
ADO 26
VDD 25
BIB 24
STB 23
EN 22
SCL 21
SDA 20
VSS 19
RO 18
OFC 17
S1A0688C01
1 GND
2 IF2
3 BP2
4 BP1
5 IF1
6 LPC2
7 LPC1
8 AC1
9 AC2
10 S1O
11 S1I
12 S2O
13 S2I
14 AGC
15 LO
16 VCC
PIN DESCRIPTION
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Analog GND SIF 2 Input SIF 2 Bypass SIF 1 Bypass SIF 1 Input SIF 2 LPF Capacitor SIF 1 LPF Capacitor SIF 1 Amplifier Capacitor SIF 2 Amplifier Capacitor SIF 1 DET Output SIF 1 CCA Input SIF 2 DET Output SIF 2 CCA Input AGC Detect Capacitor L output Analog VCC Description Pin No. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Description ID Filter Offset Canceling Cap. R Output Digital VSS Data Input / Output (SDA) Clock Input (SCL) Enable Input (EN) ID Indicator (Stereo) ID Indicator (Bilingual) Digital VDD AM DET Output Frequency DET Input Slave Custom Code External Clock In Reference Clock Monitor Test Mode Switch Voltage Reference Capacitor
3
S1A0688C01
TV SOUND MPX FOR TWO CARRIER SYSTEM
ABSOLUTE MAXIMUM RATINGS
Parameter Maximum Supply voltage Power Dissipation Operating temperature Storage temperature
Symbol VCCmax PD TOPR TSTG
Condition Ta = 25 C VI = 0
Min. - - - 10 - 40
Typ. - - - -
Max. 6 1000 70 125
Unit V mW C C
RECOMMENDED OPERATING CONDITIONS
Parameter Operating Voltage VOPR
Symbol
Condition -
Min. 4.7
Typ. 5
Max. 5.5
Unit V
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TV SOUND MPX FOR TWO CARRIER SYSTEM
S1A0688C01
ELECTRICAL CHARACTERISTICS
DC Electrical Characteristics (Ta = 25C, VCC = VDD = 5V, fm = 1kHz, VI = 80dB, f = 25kHz, unless otherwise specified) Parameter Symbol ICC IDD SIF Input Limiting Voltage AM Rejection Ratio Input Impedance PILOT * Pilot Input Sensitivity ID ON time ID OFF time Output level Matrix Matrix THD Vlim AMRR Zin Vps Ton Toff Vo THDm1 THDm2 Noise Output (RF off) Output Impedance Separation Ratio Voff Zout SEPtyp SEPadj Cross Talk Matrix S/N Ratio CT S/N S/N(st) MUTE Attenuation Ratio Amute Condition Vi = 0 Vi = 0 - AM 30% Mod - - MONO ST, BI ST, BI MONO - - f = 100kHz Carrier OFF - non-adjust IIC Bus adjust f = 25kHz f = 25kHz f = 25kHz (ST) f = 25kHz Min. 35 - - 40 - - - - 320 - - - - 25 40 50 55 50 - Typ. 60 - - 55 1 - 1.0 - 420 0.2 0.5 - - - 45 55 60 55 -66 Max. 85 2.0 50 - - 50 1.5 0.3 520 1.0 5.0 400 50 - - - - - -55 Unit mA mA dB dB Kohm dB SEC SEC mVrms % % mVrms ohm dB dB dB dB dB dB
* : Pilot signal FM deviation is 2.5kHz after 50% AM modulation.
5
S1A0688C01
TV SOUND MPX FOR TWO CARRIER SYSTEM
PIN DESCRIPTION
Pin No. 1 2, 5 Symbol GND SIF2, SIF1 Pin Name Analog ground SIF input pin Description - SIF signal input through a SIF filter Internal Equivalence Circuit -
IF1 (IF2)
3, 4
BP2, BP1
IF bypass pin
IF Bypass pin is grounded with a capacitor
BP1 (BP2)
6, 7
LPC2, LPC1 PLL LPF pin
The external capacitor extracts DC level from the 1st PLL output of FM DET.
LPC1 (LPC2)
8, 9
AC1, AC2
DET AMP NF pin
Negative feedback pin of FM DET amplifier Grounded with a capacitor
AC1 (AC2)
6
TV SOUND MPX FOR TWO CARRIER SYSTEM
S1A0688C01
PIN DESCRIPTION (Continued)
Pin No. 10, 12 Symbol S1O, S2O Pin Name FM DET output Description FM DET output pin connected with a deemphasis circuit Internal Equivalence Circuit
S1O (S2O)
11, 13
S1I, S2I
FM detected signal input pin
Input pin of current control amplifier (CCA). FM detected output signal is added to this pin.
S1I (S2I)
BIAS
14
AGC
AGC DET pin
AGC detect pin is grounded through a capacitor. If the signal level is over the predetermined value, this terminal voltage will be raised. AGC function can be deactivated by connect this terminal to GND.
AGC
7
S1A0688C01
TV SOUND MPX FOR TWO CARRIER SYSTEM
PIN DESCRIPTION (Continued)
Pin No. 15, 18 Symbol LO, RO Pin Name Matrix output pin Description Audio output signal is provided from this pin. Internal Equivalence Circuit
LO (RO)
16 17
VCC OFC
Analog power ID BPF offset cancel pin
- The external capacitor is used to eliminate offset of ID filter
-
OFC
19 20
VSS SDA
Digital ground Serial data input and output
- It is the data communication line of IIC bus used to exchange the MICOM data and IC internal data.
-
SDA
21
SCL
Clock signal
CLOCK line of IIC bus.
SCL
8
TV SOUND MPX FOR TWO CARRIER SYSTEM
S1A0688C01
PIN DESCRIPTION (Continued)
Pin No. 22 Symbol EN Pin Name Enable select pin Description It is always "H" in DC control system, always "L" in IIC bus system, and used as strobe port in normal MICOM system. When ID is detected as STEREO, this pin will remain "L" (OPEN DRAIN). Internal Equivalence Circuit
EN
23
STB
Stereo indicator pin
STB
24
BIB
Bilingual indicator pin
When ID is detected as Bilingual, this pin will remain "L" (OPEN DRAIN).
BIB
25 26
VDD ADO
Power supply (Digital) AM DET output pin
- AM detected signal will output from this terminal.
-
ADO
27
FDI
Frequency DET input pin
AM detected signal goes into this terminal coupled with a capacitor to remove DC offset.
FDI
9
S1A0688C01
TV SOUND MPX FOR TWO CARRIER SYSTEM
PIN DESCRIPTION (Continued)
Pin No. 28 Symbol SCC Pin Name Slave custom code Description When Open: Slave Address = 84H (Write), 85 (Read) When connect to VSS: Slave Address = 86H (Write), 87 (Read) Normal is open. It can be used as high speed test for IC maker.
ECI
Internal Equivalence Circuit
SCC
29
ECI
External clock input pin
30
RCM
Reference clock monitor
Internal Reference Clock Monitor IC maker test option
RCM
31
TMS
Test mode Switch
Normal State: Open Test State: VSS IC maker test option
TMS
32
RC
Voltage Reference Capacitor pin
Connect to capacitor to stabilize the reference voltage
RC
10
TV SOUND MPX FOR TWO CARRIER SYSTEM
S1A0688C01
OPERATION DESCRIPTION
SYSTEM S1A0688C01 consists of IF AMP, FM DET, AGC, MATRIX, U-COM Control INTERFACE and ID DET blocks. All blocks are operable and available without adjust for Korea standard broadcast system. IF AMP BLOCK This block amplifies the provided IF signal to a detectable level of FM DET. Total gain is over 60dB and bandwidth is about 3 - 10MHz. FM DET S1A0688C01 adopts non-adjust double-PLL type FM detection circuits. First PLL has a role of chasing FM carrier frequency with wide holding range (for example, hold range is 2MHz) and second PLL does actual FM detection with narrow holding range (about 300kHz), The free running frequency of 2nd PLL is same as the lock frequency of 1 st. PLL, and free running frequency of 1 st. PLL is determined by internal Resistor and Capacitor. The free running frequency can be varied by the variation of resistor and capacitor. AGC The AGC block comprises AGC detector part and CCA part (Current control Amplifier). The MATRIX output signal level is set to 400mVrms when applied 100% modulated FM signal and supply voltage is 5V. As the gain of CCA is about 6 dB and the gain of matrix is 6dB, so the output signal level of CCA is 200 mVrms and the matrix output is 400 mVrms. If over- modulated (over 200%) FM signal is added to S1A0688C01 input port, the output will be clipped by supply voltage dynamic limitation range (The linear amplify range is limited lower than 800 mVrms). To prevent this problem, In S1A0688C01 we use AGC circuit to reduce the gain of CCA part when the over- modulated FM signal has been applied, AGC circuit is deactivated until the modulation is over 200%. If AGC is activated, the THD and separation characteristics of output signal would be deteriorated because the gain of CCA is varied according to modulation ratio.
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S1A0688C01
TV SOUND MPX FOR TWO CARRIER SYSTEM
MATRIX MATRIX part separates provided FM detected signal into MONO, STEREO, BILINGUAL, and SUB according to broadcast status and end users setting, it mainly consists of analog switches and operational amplifiers. The input and output signal format of MATRIX is shown as follows. Input Broadcast Mode Stereo Bilingual Mono S1 L+R Main Main S2 L-R Sub None * Remark - - * can be main
User Select Stereo Broadcast Mode Stereo Bilingual Mono LOUT 2L Main Main ROUT 2R Main Main Bilingual LOUT L+R Main Main
Output Sub LOUT L+R Sub Main ROUT L+R Sub Main Mono LOUT L+R Main Main ROUT L+R Main Main
ROUT L+R Sub Main
12
TV SOUND MPX FOR TWO CARRIER SYSTEM
S1A0688C01
ID DET ID signal is FM modulated to second carrier (SIF2) with a 2.5kHz FM modulation after AM modulated to 55kHz PILOT sub-carrier with a 50% AM modulation. ID DET part consists of 3 blocks: that is filter block for extracting pilot carrier, AM detector block for AM detection of ID signal and digital block for detecting the frequency of provided ID signal logically. In the filter block, audio signal is removed by HPF and pilot signal is extracted by the automatically adjusted switch - capacitor BPF (band pass filter) with a center frequency of 55kHz. ID signal is extracted from the pilot carrier in the AM detector block, then Digital block detects the frequency of ID signal, The ID signal can be detected in the range shown as follow: ID Stereo (150 Hz) Bilingual (276 Hz) Low Off 125 Hz 237 Hz Low On 140 Hz 255 Hz High On 160 Hz 300 Hz High Off 176 Hz 312 Hz
This block's circuit is configured to reduce the blinking of the ID, and consequently has the following characteristics: typ 1 sec and Max 1.5 sec delay when converting from Mono to Stereo, or to Bilingual. 0.3 sec delay when converting from Stereo or Bilingual to Mono. Therefore, when changing the channels on your TV set, a minimum of 1.5 sec is needed for ID Detect Time.
Broadcast
Mono T1
Stereo or Bilingual Stereo or Bilingual
S1A0688C01 Mono
Set MICOM
Mono
T2
Stereo or Bilingual
T1: S1A0688C01's ID Detect Time typ 1 sec, Max 1.5 sec T2: When changing channels, set MICOM's ID Detect Delay Time to a minimum of 1.5 sec. Figure 1. Timing Diagram for Changing Channels from Mono to stereo or Bilingual The ID Detect Block of the S1A0688C01 can momentarily malfunction if the signal is weak. Hence, we recommend that you delay for at least 1 sec at Set MICOM before detecting the ID, if the ID changes at a fixed channel.
Broadcast
Mono T1
Stereo or Bilingual Stereo or Bilingual T3
S1A0688C01 Mono T3
Set MICOM
Mono
Stereo or Bilingual
Malfunction Skip T1: S1A0688C01's ID Detect Time typ 1 sec, Max 1.5 sec T3: When the channel is fixed, set MICOM's ID Detect Delay Time to a minimum of 1 sec. Figure 2. Timing Diagram when Channel is Fixed
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S1A0688C01
TV SOUND MPX FOR TWO CARRIER SYSTEM
MICOM S1A0688C01 is available in DC control, normal microcontroller control, and IIC BUS microcontroller control system, and it can distinguish the control type automatically by monitoring PIN 22 (EN) status. The relation of control source type and PIN 22 status is shown as follows. IIC Bus EN (Pin 22) always "L" Normal MICOM MICOM strobe DC Control always "H"
Protocol of IIC BUS microcontroller control (PIN 22: L) The S1A0688C01 can be controlled via the 2-line IIC BUS by the microcontroller. The two lines (SDA-serial data. SCL-serial clock) exchange information between the devices connected to the IIC bus. SDA is bidirectional line which is connected to a positive supply voltage via a pull up resistor. When the bus is free both lined are HIGH. The data on the SDA line must be stable during the High-powered of the clock. The HIGH or LOW data can only change when the clock signal line is LOW. A HIGH -to -LOW transition of the SDA line while SCL is HIGH is defined as a start condition. A LOW- to -HIGH transition of the SDA line while SCL is HIGH is defined as a stop condition. The bus receiver will be reset by the reception of a start condition and is considered to be busy after the start condition. After a stop condition the bus is considered as free again.
SDA
1
2
3
25
26
27
SCL
1st Byte
1 - 7th bit 8th bit 9th, 18th, 27th bit 10th - 17th bit 197th - 26th bit
Chip select code (1000010B) R/W Acknowledge SUB address (function) Data (D1 - D8)
2nd Byte 3rd Byte
Data transmitted to the S1A0688C01 starts with the module address as follows:
MSB 1 0 0 0 0 1 0 R/W
LSB ACK MSB First.
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TV SOUND MPX FOR TWO CARRIER SYSTEM
S1A0688C01
Protocol of normal microcontroller control (PIN 22: STROBE)
SDA
1
2
3
22
23
24
SCL STROBE (EN)
1 - 7th bit 8th bit 2nd Type 3rd Type 9th - 16th bit 17th - 24th bit
1st Byte
Chip select code (1000010B) Not use (don't care) Function assignment Data (D1 - D8)
The module address of S1A0688C01 in normal microcontroller control mode is as follows: .
MSB 1 0 0 0 0 1 0 LSB D MSB First.
The maximum STROBE pulse width in normal microcontroller control mode should be under 6.0 msec. If the STROBE pulse width excess the limit, S1A0688C01 will be changed to DC control mode. Control Item in Each Control Mode In each control mode, control items is limited as follows: Control IIC Bus Normal MICOM DC Control Mode Change O O x Mute O O x Preset O O x Pre-adjust set O x x Data Receive Transmission Acknowledge O x x O x x
NOTES: 1. PRE-SET: When power is ON, MICOM initials the status of S1A0688C01 to preset status. (All IC has same preset status data) 2. PRE-ADJUST SET: When power is ON, MICOM initials the status of S1A0688C01 to pre-measured and stored status. (Different each IC) 3. DATA TRANSMISSION: Transmit stored data to MICOM when MICOM requests. 4. RECEIVE ACKNOWLEDGE: Return acknowledge signal to MICOM after DATA receipt.
15
S1A0688C01
TV SOUND MPX FOR TWO CARRIER SYSTEM
MICOM control map In IIC BUS mode, SLAVE Address = WRITE: 84H, READ: 85H In normal MICOM mode, chip select code = 1000010B SUB ADDRESS (2nd BYTE) (MSB<->LSB) DATA (3rd BYTE) MSB D1 0 000XXXXX (Mode Control) 1 0 1 001XXXXX (Mute Control) 010XXXXX (Test Mode Control) 0 1 0 1 0 011XXXXX (Free Run Frequency Control) 100XXXXX 101XXXXX 1 0 1 D1
S1U
LSB D2 0 0 1 1 X X X X 0 0 1 1 D2
S1D
FUNCTION
REMARK
D3 X X X X X X X X X X X X D3
S2U
D4 X X X X X X X X X X X X D4
S2D
D5 X X X X X X X X X X X X D5 X X X X X X
D6 X X X X X X X X X X X X X X X X X X X
D7 X X X X X X X X X X X X X X X X X X X
D8 X X X X X X X X X X X X X X X X X X X Mono Stereo Bilingual Sub Mute Off Mute Normal mode Test mode Default Frequency down Default zap Frequency down zap Separation adjust (3) Pin DC cont. Operating Slave zap Master zap External clock Not use IC maker test Set maker Ic maker test End user control
0 110XXXXX (Test Mode) 1 0 1 111XXXXX X
0 0 1 1 X
X X X X X
X X X X X
NOTES: 1. MSB first 2. When power is ON, all latch data are "0", S1A0688B is set to MONO OFF, MUTE OFF, SEPARATION ADJUST DEFAULT (00001XXX). 3. Separation Adjust Data D1 0 D2 0 D3 0 D4 0 D5 0 (MIN) <--D1 1 D2 0 D3 0 D4 0 D5 0 (TYP) ----> D1 1 D2 1 D3 1 D4 1 D5 1 (MAX)
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TV SOUND MPX FOR TWO CARRIER SYSTEM
S1A0688C01
Control Function Description * * * MODE CONTROL: Control the MATRIX structure according to broadcast status and end user's setting. S1A0688C01 has 4 modes (MONO, STEREO, BILINGUAL and SUB) MUTE CONTROL: When MUTE CONTROL is on, the audio output of S1A0688C01 is off. SEP. ADJUST: The separation characteristic of S1A0688C01 in STEREO mode can be controlled by IIC BUS. This option controls S2 FM demodulated output signal level so as to make the separation characteristic in best status. TEST MODE: IC makers test item.
*
DC Control Map (PIN22: H) DC (Logic) Input SCL 0 1 0 1 SDA 0 0 1 1 Function Mono Stereo Bilingual Sub
READ Mode in IIC BUS MICOM Control Mode S1A0688C01 can transmit the data which is registered inside IC to the MICOM in IIC BUS control system. If the 8th bit of module address is `H', it means MICOM requests the data stored in the IC and S1A0688C01 enter data transmission mode. During the read mode, S1A0688C01 ignores the data the data of 2nd type (SUB address) and transmits the internal data within the period of 3rd byte. The SDA line of MICOM should be maintain H to accept transmitted data from IC. The format of read data is as follows.no Bit of 3rd Byte Transmit Data 1 BI 0 1 0 2 ST 0 0 1 Others 3 BI 1 0 1 4 Read Mode ST 1 1 0 Mono Bilingual Stereo Transmission error Option for IC maker (ZC: IC test option) ZC ZC 0 1 5 6 7 8
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S1A0688C01
TV SOUND MPX FOR TWO CARRIER SYSTEM
Others In IIC BUS control system, if the SLAVE address is correct, the acknowledge signal will be generated by S1A0688C01 no matter the sub address is right or wrong, When sub address is wrong IC will do nothing.
NOTES: 1. The characteristic of SIF Filter should be suitable to MPX sound system. We suggest to use MURATA Co. products: SFSH4.5MCB and SFSH4.72MCB. 2. If you need to use two chip in one set (e.g. TVCR), You should separate the chips by select pin 28 voltage. When it is high or open, Write =84H, Read = 85H. When pin 28 is connected to ground, Write =86H, Read = 87H. 3. Program control method: 1. Under window 95 environment, extract kb22688b.zip 2. Install: setup.exe 3. Run kb22688b.exe 4. PC parallel port pin description:
PIN SIGNAL
1 SDA
2 SCL
3 EN
19 GND
18
TEST CIRCUIT
VDD EN SCL SDA
M BI
TCLK
M ST
M R-OUT
M
47k 47k 47k 47k S1 0.1F 0.1F 1F 47k RCM 10F
S
4.7F 10F
S2
0.1F
TV SOUND MPX FOR TWO CARRIER SYSTEM
32 25
31
30
29
28
27
26
24
23
22
21
20
19
18
17
S1A0688C01
3 8 4 5 6 7 9 10 11 12 13 14 15 16
1
2
4.7F 1F 10F 10F 0.039F 0.039F
4.7F
4.7F 1M 10F 100F
0.047F 0.047F 0.047F 0.047F 1F
S
SIF2
S
M L- OUT
VCC
SIF1
S1A0688C01
19
S1A0688C01
APPLICATION CIRCUIT
100F
470
470
47k
47k
1F
0.1F N.C N.C
N.C
N.C
32 25
31
30
29
28
27
26
24
23
22
21
20
47k
1M
10F
20
VDD ST EN SCL SDA R-OUT 1F 4.7F 10F
19
18
17
S1A0688C01
4 8 5 6 7 9 10 11 12 13 14 15 16
1
2
3
3pF 1F 1F 10F 10F 4.7F 4.7F
4.7F 100F 0.039F 0.039F L- OUT VCC
0.047F 0.047F 4.5MHz
TV SOUND MPX FOR TWO CARRIER SYSTEM
4.72MHz

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