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| PRELIMINARY DS4802 Low Voltage, Micro Power, High Performance, Rail-To-Rail Dual Op-Amp www.dalsemi.com FEATURES Very low operating power: 12A typical per amplifier High output sink/source capability Supply Voltage Range 1.8 to 5.5V Rail-to-Rail Output Swing Input offset voltage: 0.95mV max. PACKAGES/PINOUTS AOUT 1 8 VDD AIN- 2 A B +- 7 BOUT AIN+ 3 -+ 6 BIN- GND 4 5 BIN+ ORDERING INFORMATION Part Number DS4802 DS4802S DS4802U DS4802X Description 8-pin DIP 8-pin SOIC 8-pin -SOP 8-bump Flip-Chip AOUT 2 AINAIN+ 5 1 300-mil DIP 150-mil SOIC 118-mil -SOP VDD 6 4 BOUT A -+ B +- For mechanical dimensions see website. 7 8 BINBIN+ 3 GND 8-bump Flip-Chip DESCRIPTION The DS4802 BiCMOS dual operational amplifier combines low input offset voltage, very low power consumption, rail-to-rail output swing, and excellent DC precision. With a maximum input offset voltage of 0.95mV, a maximum IDD of 25A/amplifier, and 10pA typical input bias current, the DS4802 is ideal for measurement, medical, and industrial applications. The DS4802 is also ideal for portable applications with 1.8V to 5.5V single supply voltage operation and low power consumption. 1 of 19 022200 DS4802 ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD (see Note 1) Differential Input Voltage (see Note 2) Input Voltage Range, VI (see Note 1) Input Current, IDD Output Current, IO Total current into VDD Total current out of GND Duration of short-circuit current (See Note 3) Operating Temperature Storage Temperature Soldering Temperature 5.5V VDD -0.3V to VDD 4mA 50mA 50mA 50mA unlimited 0oC to 70oC -55oC to +125oC 260oC for 10 seconds Notes: 1. Relative to GND. 2. Non-inverting input relative to inverting input. Excessive current flows when input is brought below GND - 0.3V. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. RECOMMENDED OPERATING CONDITIONS PARAMETER Supply Voltage Input Voltage Range Common-Mode Input Voltage Free-Air Operating Temperature SYMBOL VDD VI VIC TA MIN 1.8 GND GND 0 TYP MAX 5.5 VDD - 1.0 VDD - 1.0 70 UNITS V V V o NOTES 1 1 C Notes: 1. Voltage referenced to GND. 2 of 19 DS4802 ELECTRICAL CHARACTERISTICS PARAMETER Input Offset Voltage (VIC = 0.5V, RS = 50, VOUT = VDD/2) Temperature Coefficient of Input Offset Voltage (VIC = 0.5V, RS = 50, VOUT = VDD/2) Input Offset Current (RS = 50) Input Bias Current (RS = 50) Common-mode Input Voltage Range (|VIO| 5 mV, RS = 50) High Level Output Voltage (IOH = -50 A) (IOH = -500 A) Low Level Output Voltage (IOL = 50 A) (IOL = 500 A) Large Signal Differential Voltage Amplification (VIC = 0.5V, 0.4V VO 1.4V) RL = 100k (VIC = 0.5V, 0.4V VO 1.4V) RL = 10k Input Resistance Common Mode Input Capacitance Common Mode Rejection Ratio (0V VIC 0.8V, RS = 50, VO = VDD/2) Supply Voltage Rejection Ratio (1.8V VDD 3.6V, VIC = VDD/2, no load) Amplifier Supply Current (per channel) (VO = VDD/2, no load) Slew Rate at Unity Gain (RL = 100k, CL = 100pF tied to VDD/2) SYMBOL VIO VIO IIO IIB VICR VOH 1.5 VOL 0 to 1 MIN (TA: 0C - 70C. VDD = 1.8V) TYP 0.1 2 5 10 -0.3 to 1.2 1.785 1.65 10 100 500 500 MAX 0.95 UNITS mV V/C pA pA V NOTES V mV 200 AVD RIN ci(c) CMRR 65 55 75 65 >1012 24.0 dB pF dB 60 75 kSVR 70 85 dB IDD 12 25 A SR 10 15 V/ms 3 of 19 DS4802 PARAMETER Equivalent Input Noise Voltage (f = 10 Hz) (f = 1 kHz) Unity Gain Bandwidth Product (RL = 100k, CL = 100pF tied to VDD/2) Phase Margin at Unity Gain (RL = 100k, CL = 100pF tied to VDD/2) Gain Margin (RL = 100k, CL = 100pF tied to VDD/2) SYMBOL VN MIN TYP 120 60 31 MAX UNITS nV/Hz NOTES UGBW kHz M 60 Degree 17 dB ELECTRICAL CHARACTERISTICS cont. PARAMETER Input Offset Voltage (VIC = 1.5V, RS = 50, VOUT = VDD/2) Temperature Coefficient of Input Offset Voltage (VIC = 1.5V, RS = 50, VOUT = VDD/2) Input Offset Current (RS = 50) Input Bias Current (RS = 50) Common-mode Input Voltage Range (|VIO| 5 mV, RS = 50) High Level Output Voltage (IOH = -200 A) (IOH = -2 mA) Low Level Output Voltage (VIC = 1.5V, IOL = 200 A) (VIC = 1.5V, IOL = 2 mA) Large Signal Differential Voltage Amplification (VIC = 1.5V, 0.5V VO 2.5V) RL = 100k (VIC = 1.5V, 0.5V VO 2.5V) RL = 10k Input Resistance Common Mode Input Capacitance SYMBOL VIO VIO IIO IIB VICR VOH 2.4 VOL 0 to 2 MIN (TA: 0C - 70C. VDD = 3.0V) TYP 0.1 2 5 10 -0.3 to 2.2 2.97 2.7 24 240 500 500 MAX 0.95 UNITS mV NOTES V/C pA pA V V mV 500 AVD RIN cI(c) 4 of 19 70 60 80 70 >1012 24.0 dB pF DS4802 PARAMETER Common Mode Rejection Ratio (0V VIC 2V, RS = 50, VO = VDD/2) Supply Voltage Rejection Ratio (1.8V VDD 3.6V, VIC = VDD/2, no load) Amplifier Supply Current (per channel) (VO = VDD/2, no load) Slew Rate at Unity Gain (RL = 100k, CL = 100pF tied to VDD/2) Equivalent Input Noise Voltage (f = 10 Hz) (f = 1 kHz) Unity Gain Bandwidth Product (RL = 100k, CL = 100pF tied to VDD/2) Phase Margin at Unity Gain (RL = 100k, CL = 100pF tied to VDD/2) Gain Margin (RL = 100k, CL = 100pF tied to VDD/2) SYMBOL CMRR MIN 65 TYP 80 MAX UNITS dB NOTES kSVR 70 85 dB IDD 12 25 A SR 10 15 V/ms VN 120 60 35 nV/Hz UGBW kHz M 60 Degree 17 dB 5 of 19 DS4802 DISTRIBUTION OF DS4802 INPUT OFFSET VOLTAGE 35 Percentage of Amplifiers - % 30 25 20 15 10 5 0 -1000 V DD = 1.8 V RL = 10K TA = 25oC -800 -600 -400 -200 0 200 400 600 800 1000 VIO - Input Offset Voltage - uV Figure 1.0 DISTRIBUTION OF DS4802 INPUT OFFSET VOLTAGE 35 Percentage of Amplifiers - % 30 25 20 15 10 5 0 -1000 VDD = 3.0 V RL = 10K TA = 25oC -800 -600 -400 -200 0 200 400 VIO - Input Offset Voltage - uV 600 800 1000 Figure 2.0 6 of 19 DS4802 INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 2 VIO - Input Offset Voltage - mV V DD = 1.8 V TA = 25oC 1 0 -1 -0.5 0 0.5 1 1.5 2 VIC - Common-Mode Input Voltage - V Figure 3.0 INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 2 VIO - Input Offset Voltage - mV V DD = 3.0 V TA = 25oC 1 0 -1 -0.5 0 0.5 1 1.5 2 2.5 VIC - Common-Mode Input Voltage - V Figure 4.0 7 of 19 DS4802 DISTRIBUTION OF DS4802 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 25% 20% 15% 10% 5% 0% -20 -15 -10 -5 0 5 10 15 20 VIO - Temperature Coefficient - uV/oC VDD = 1.8 V RL = 10K TA = 25 C o Figure 5.0 DISTRIBUTION OF DS4802 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 18% 16% 14% 12% 10% 8% 6% 4% 2% 0% -20 -15 -10 -5 0 5 10 15 20 VIO - Temperature Coefficient - uV/oC VDD = 3.0 V RL = 10K TA = 25 C o Figure 6.0 8 of 19 DS4802 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 2 VOH - High-Level Output Voltage - V 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 1.60 1.80 125 C o VDD = 1.8 V -40 C 0C 85 C o o o 25 C o IOH - High-Level Output Current - mA Figure 7.0 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 3.5 VOH - High-Level Output Voltage - V 3 2.5 2 1.5 85 C 1 0.5 0 0.00 125 C o o VDD = 3.0 V -40 C 0C o o 25 C o 1.00 2.00 3.00 4.00 5.00 6.00 7.00 8.00 IOH - High-Level Output Current - mA Figure 8.0 9 of 19 DS4802 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 1.8 VDD = 1.8 V VOL - Low-Level Output Voltage - V 1.6 1.4 1.2 1.0 0.8 0.6 0.4 125 C 85 C 25 C o o o 0C o o -40 C 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 IOL - Low-Level Output Current - mA Figure 9.0 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 3.0 VOL - Low-Level Output Voltage - V VDD = 3.0 V 125 C 25 C 85 C o o o 2.5 2.0 1.5 0C 1.0 -40 C 0.5 0.0 0 2 4 6 8 10 12 IOL - Low-Level Output Current - mA o o Figure 10.0 10 of 19 DS4802 SHORT-CIRCUIT OUTPUT CURRENT vs FREE-AIR TEMPERATURE 3 IOS - Short-Circuit Output Current - mA 2 IOSL 1 VDD = 1.8 V 0 -1 IOSH -2 -50 -25 0 25 50 o 75 100 125 TA - Free-Air Temperature - C Figure 11.0 SHORT-CIRCUIT OUTPUT CURRENT vs FREE-AIR TEMPERATURE 12 IOS - Short-Circuit Output Current - mA 8 IOSL 4 VDD = 3.0 V 0 -4 IOSH -8 -50 -25 0 25 50 o 75 100 125 TA - Free-Air Temperature - C Figure 12.0 11 of 19 DS4802 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY 40 Phase AVD - Gain Margin - dB 20 AVD 0 0 V DD = 1.8 V RL = 100K CL = 100pF TA = 25oC 90 45 -20 -45 -40 1K 10K f - Frequency - Hz 100K 1M -90 Figure 13.0 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY 40 Phase AVD - Gain Margin - dB 20 AVD 0 0 VDD = 3.0 V RL = 100K CL = 100pF TA = 25oC 90 45 -20 -45 -40 1K 10K f - Frequency - Hz -90 100K 1M Figure 14.0 12 of 19 Phase Margin - degrees Phase Margin - degrees DS4802 COMMON-MODE REJECTION RATIO vs FREQUENCY 100 V DD = 3.0 V 80 CMRR - Common-Mode Rejection Ratio - dB 60 VDD = 1.8 V 40 20 0 10 100 1K f - Frequency - Hz 10K 100K Figure 15.0 SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY 100 80 kSVR - Supply-Voltage Rejection Ratio - dB kSVR + 60 40 kSVR 20 0 -20 100 1K f - Frequency - Hz 10K 100K Figure 16.0 13 of 19 DS4802 VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE 0.600 0.580 VO - Output Voltage - V 0.560 0.540 0.520 0.500 0.480 0.460 0.440 0.420 0.400 0 200 400 600 800 1000 t - Time - us VDD = 1.8 V AV = +1 RL = 100K CL = 100pF TA = 25oC Figure 17.0 VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE 1.100 VDD = 3.0 V AV = +1 VO - Output Voltage - V 1.050 RL = 100K CL = 100pF TA = 25oC 1.000 0.950 0.900 0 200 400 600 800 1000 t - Time - us Figure 18.0 14 of 19 DS4802 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 1.000 0.900 VO - Output Voltage - V 0.800 0.700 0.600 0.500 0.400 0.300 0.200 0.100 0.000 0 200 400 600 800 1000 t - Time - us VDD = 1.8 V AV = +1 RL = 100K CL = 100pF TA = 25oC Figure 19.0 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 2.000 V DD = 3.0 V 1.750 VO - Output Voltage - V 1.500 1.250 1.000 0.750 0.500 0.250 0 A V = +1 RL = 100K CL = 100pF TA = 25oC 200 400 600 800 1000 t - Time - us Figure 20.0 15 of 19 DS4802 INVERTING SMALL-SIGNAL PULSE RESPONSE 0.600 0.580 VO - Output Voltage - V 0.560 0.540 0.520 0.500 0.480 0.460 0.440 0.420 0.400 0 200 400 600 800 1000 t - Time - us VDD = 1.8 V AV = -1 RL = 100K CL = 100pF TA = 25oC Figure 21.0 INVERTING SMALL-SIGNAL PULSE RESPONSE 1.100 VDD = 3.0 V AV = -1 VO - Output Voltage - V 1.050 RL = 100K CL = 100pF TA = 25oC 1.000 0.950 0.900 0 200 400 600 800 1000 t - Time - us Figure 22.0 16 of 19 DS4802 INVERTING LARGE-SIGNAL PULSE RESPONSE 1.000 0.900 VO - Output Voltage - V 0.800 0.700 0.600 0.500 0.400 0.300 0.200 0.100 0.000 0 200 400 600 800 1000 t - Time - us V DD = 1.8 V A V = -1 RL = 100K CL = 100pF TA = 25oC Figure 23.0 INVERTING LARGE-SIGNAL PULSE RESPONSE 2.000 1.750 VO - Output Voltage - V 1.500 1.250 1.000 0.750 0.500 0.250 0 200 400 600 800 1000 t - Time - us VDD = 3.0 V AV = -1 RL = 100K CL = 100pF TA = 25oC Figure 24.0 17 of 19 DS4802 SUPPLY CURRENT vs SUPPLY VOLTAGE 40 V IC = 30% V DD 125 C o 85 C o IDD - Supply Current - uA 30 20 o 10 -40 C o 0C 25 C o 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VDD - Suplly Voltage - V Figure 25.0 UNITY-GAIN BANDWIDTH vs LOAD CAPACITANCE 40 Unity-Gain Bandwidth - MHz 35 30 25 20 15 10 5 0 10 100 1K CL - Load Capacitance - pF 10K VDD = 3.0 V RL = 100K TA = 25oC Figure 26.0 18 of 19 DS4802 PHASE MARGIN vs LOAD CAPACITANCE 70 Phase Margin - degrees 60 VDD = 3.0 V Rnull = 10K RL = 100K TA = 25oC Rnull = 4.7K 50 40 30 20 10 0 10 +VDD/2 AC + -VDD/2 RNULL RLOAD CLOAD Rnull = 2.2K Rnull = 0 100 CL - Load Capacitance - pF 1K Figure 27.0 GAIN MARGIN vs LOAD CAPACITANCE 25 V DD = 3.0 V RL = 100K Rnull = 10K Rnull = 4.7K 20 Gain Margin - dB TA = 25oC 15 Rnull = 2.2K +VDD/2 AC 10 Rnull = 0 RNULL RLOAD CLOAD + 5 -VDD/2 0 10 100 CL - Load Capacitance - pF 1K Figure 28.0 19 of 19 |
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