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(R)
STP5NC50 STP5NC50FP
N - CHANNEL 500V - 1.3 - 5.5A TO-220/TO-220FP PowerMESHTM MOSFET
PRELIMINARY DATA TYPE ST P5NC50 ST P5NC50FP
s s s s s
V DSS 500 V 500 V
R DS(on) <1.5 <1.5
ID 5.5 A 5.5 A
TYPICAL RDS(on) = 1.3 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED
1
3 2
1 2
3
DESCRIPTION The PowerMESHTM is the evolution of the first generation of MESH OVERLAYTM. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns switching speed, gate charge and ruggedness. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVER
TO-220
T0-220FP
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol V DS V DGR V GS ID ID I DM (*) P tot dv/dt(1) V ISO Ts tg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k) G ate-source Voltage Drain Current (continuous) at Tc = 25 oC Drain Current (continuous) at Tc = 100 o C Drain Current (pulsed) T otal Dissipation at Tc = 25 C Derating Factor Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Storage T emperature Max. Operating Junction Temperature
o
Value ST P5NC50 STP5NC50F P 500 500 30 5.5 3.5 22 100 0.8 3 -65 to 150 150
( 1) ISD 5.5 A, di/dt 200 A/s, VDD V(BR)DSS, Tj TJMAX
Un it V V V 5.5(*) 3.5(*) 22 35 0.28 3 2000 A A A W W /o C V/ns V
o o
C C
(*) Pulse width limited by safe operating area (*) Limited only by maximum temperature allowed
September 1999
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STP5NC50/FP
THERMAL DATA
T0-220 R thj -case Thermal Resistance Junction-case Max 1.25 62.5 0.5 300 T 0-220FP 3.57
o o o
C/W C/W C/W o C
Rthj-amb MaxThermal Resistance Junction-ambient Max R thc-sink Thermal Resistance Case-sink Typ Tl Maximum Lead Temperature F or Soldering Purpose
AVALANCHE CHARACTERISTICS
Symbo l IAR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 50 V) Max Value 5.5 150 Unit A mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF
Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 A V GS = 0 Min. 500 1 50 100 Typ. Max. Unit V A A nA
V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = 30 V
T c = 125 oC
ON ()
Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance On State Drain Current V GS = 10V Test Con ditions ID = 250 A ID = 2.5 A 5.5 Min. 2 Typ. 3 1.3 Max. 4 1.5 Unit V A
V DS > ID(o n) x R DS(on )ma x V GS = 10 V
DYNAMIC
Symbo l g f s () C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz I D = 2.5 A V GS = 0 Min. Typ. 3.6 700 100 9 Max. Unit S pF pF pF
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STP5NC50/FP
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Time Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 250 V I D = 2.6 A R G = 4.7 V GS = 10 V (see test circuit, figure 3) V DD = 400 V I D = 5.5 A VGS = 10 V Min. Typ. 11.5 9 18 6 8 25 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V DD = 400 V I D = 5.5 A R G = 4.7 VGS = 10 V (see test circuit, figure 5) Min. Typ. 7 6 13 Max. Unit ns ns ns
SOURCE DRAIN DIODE
Symbo l ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 5.5 A V GS = 0 380 2.3 12 I SD = 5.5 A di/dt = 100 A/s o T j = 150 C V DD = 100 V (see test circuit, figure 5) Test Con ditions Min. Typ. Max. 5.5 22 1.6 Unit A A V ns C A
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area
Safe Operating Area
Safe Operating Area for TO-220FP
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STP5NC50/FP
Thermal Impedence Thermal Impedence for TO-220FP
Output Characteristics
Tranfer Characteristics
Transconductance
Static Drain-source On Resistance
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STP5NC50/FP
Gate Charge vs Gate-source Voltage Capacitance Variation
Normalized Gate Threshold Voltage vs Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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STP5NC50/FP
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STP5NC50/FP
TO-220 MECHANICAL DATA
DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147
E
mm TYP. MAX. 4.60 1.32 2.72 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40
inch TYP. MAX. 0.181 0.051 0.107 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 0.645 0.551 0.116 0.620 0.260 0.154 0.151
A
C
D1
L2 F1
D
G1
Dia. F2 F
L5 L7 L6
L9
L4
G
H2
P011C
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STP5NC50/FP
TO-220FP MECHANICAL DATA
DIM. MIN. A B D E F F1 F2 G G1 H L2 L3 L4 L6 L7 O 28.6 9.8 15.9 9 3 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 30.6 10.6 16.4 9.3 3.2 1.126 0.385 0.626 0.354 0.118 mm TYP. MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409
A
B
L3 L6 L7 F1 F
D
G1
E
H
F2
123 L2 L4
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G
STP5NC50/FP
Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japa - Malaysia - Malta - Morocco n Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com .
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