View PLL602-38NSCL-R_409943.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC
FEATURES
* * * * * Low phase noise output (-127dBc @ 10kHz frequency offset). 12MHz to 25MHz crystal input. 48MHz to 100MHz PECL output. 3.3V operation. Available in Green (RoHS Compliant) 8-Pin SOIC package.
PIN CONFIGURATION (Top View)
X1 X2 GND
1 2 3 4
8 7 6 5
VDD CLKB VDD CLK
PLL602-38N
DESCRIPTION
The PLL602-38N is a high performance and low phase noise PECL XO IC chip. It provides phase noise performance as low as -127dBc at 10kHz offset and a typical RMS jitter of 4.5pS RMS ( at 100MHz ). It accepts a fundamental parallel resonant mode crystal input from 12MHz to 25MHz.
GND
BLOCK DIAGRAM
XIN XOUT
Oscillator Amplifier
PLL (Phase Locked Loop)
Q Q
PLL602-38N
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/24/04 Page 1
PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC
PIN DESCRIPTIONS
Name
X1 X2 GND CLK VDD CLKC
TSSOP Pin number
1 2 3,4 5 6,8 7
Type
I I P O P O
Description
Crystal input. See Crystal Specifications on page 2. Crystal output. See Crystal Specifications on page 2. Ground. True output PECL. Power Supply. Complementary output PECL.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings PARAMETERS
Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) ESD Protection, Human Body Model
SYMBOL
VDD VI VO TS TA TJ
MIN.
-0.5 -0.5 -65 -40
MAX.
4.6 VDD+0.5 VDD+0.5 150 85 125 260 2
UNITS
V V V C C C C kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. General Electrical Specifications PARAMETERS
Supply Current, Dynamic (with Loaded Outputs) Operating Voltage Short Circuit Current
SYMBOL
IDD VDD
CONDITIONS
48MHz < Fout < 100MHz
MIN.
TYP.
MAX.
65
UNITS
mA V mA
2.97 50
3.63
3. Crystal Specifications PARAMETERS
Crystal Resonator Frequency Crystal Loading Rating Recommended ESR
SYMBOL
FXIN CL (xtal) RE
CONDITIONS
Parallel Fundamental Mode AT cut
MIN.
12
TYP.
20
MAX.
25 30
UNITS
MHz pF
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/24/04 Page 2
PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC 4. Jitter Specifications PARAMETERS
Period jitter RMS Period jitter Peak-to-Peak Integrated jitter RMS
CONDITIONS
With capacitive decoupling between VDD and GND. Over 10,000 cycles. With capacitive decoupling between VDD and GND. Over 10,000 cycles. Integrated 12 kHz to 20 MHz
FREQUENCY
100.00MHz 100.00MHz 100.00MHz
MIN.
TYP.
4.3 27 2.6
MAX.
UNITS
ps ps
4
ps
5. Phase Noise Specifications PARAMETERS
Phase Noise relative to carrier (typical)
FREQUENCY
100.00MHz
@10Hz
-65
@100Hz
-95
@1kHz
-120
@10kHz
-125
@100kHz
-121
UNITS
dBc/Hz
6. PECL Electrical Characteristics PARAMETERS
Output High Voltage Output Low Voltage
SYMBOL
VOH VOL
CONDITIONS
RL = 50 to (VDD - 2V) (see figure)
MIN.
VDD - 1.025
MAX.
VDD - 1.620
UNITS
V V
7. PECL Switching Characteristics PARAMETERS
Clock Rise Time Clock Fall Time Duty Cycle
OUT
SYMBOL
tr tf
CONDITIONS
20% to 80% of signal 80% to 20% of signal Measured @ 50% of signal
VDD OUT
MIN.
300 300 45
TYP.
MAX.
600 600 55
UNITS
ps ps %
50
PECL Levels Test Circuit
PECL Output Skew
50
2.0V 50%
50 OUT OUT tSKEW
PECL Transistion Time Waveform
DUTY CYCLE 45 - 55% OUT 80% 50% 20% OUT tR tF 55 - 45%
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/24/04 Page 3
PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC PACKAGE INFORMATION
8 PIN SOIC (in m m)
Symbol A A1 B C D E H L e Min. 1.35 0.10 0.33 0.19 4.80 3.80 5.80 0.40 Nom Max. 1.55 1.75 .175 0.25 0.43 0.53 0.23 0.27 4.90 5.00 3.90 4.00 6.00 6.20 0.645 0.89 1.27 BSC E H
D
A A1 e B C L
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following: Device number, Package type and Operating temperature range
PLL602-38N X C X - R
PART NUMBER PACKAGE TYPE S=SOIC TEMPERATURE C=COMMERCIAL NONE= TUBE R=TAPE and REEL NONE=NORMAL PACKAGE L=GREEN PACKAGE (RoHS Compliant)
Order Number PLL602-38NSCL-R PLL602-38NSCL
Marking P602-38NSC P602-38NSC
Package Option SOIC 8 - Tape and Reel SOIC 8 - Tube
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/24/04 Page 4

▲Up To Search▲

Price & Availability of PLL602-38NSCL-R

	To Download PLL602-38NSCL-R Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .