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HFA1112, HFA1112A
TM
Data Sheet
December 2000
File Number
2992.6
850MHz, Low Distortion Programmable Gain Buffer Amplifiers
The HFA1112/12A are closed loop Buffers featuring user programmable gain and ultra high speed performance. Manufactured on Intersil's proprietary complementary bipolar UHF-1 process, these devices offer a wide -3dB bandwidth of 850MHz, very fast slew rate, excellent gain flatness, low distortion and high output current. The HFA1112A is a more stable version optimized for unity gain applications. A unique feature of the pinout allows the user to select a voltage gain of +1, -1, or +2, without the use of any external components. Gain selection is accomplished via connections to the inputs, as described in the "Application Information" section. The result is a more flexible product, fewer part types in inventory, and more efficient use of board space. Compatibility with existing op amp pinouts provides flexibility to upgrade low gain amplifiers, while decreasing component count. Unlike most buffers, the standard pinout provides an upgrade path should a higher closed loop gain be needed at a future date. This amplifier is available with programmable output limiting as the HFA1113. For applications requiring a standard buffer pinout, please refer to the HFA1110 data sheet.
HFA1112 (PDIP, SOIC) HFA1112A (SOIC) TOP VIEW
NC -IN +IN V1 300 2 3 4 + 7 V+ 6 OUT 5 NC 300 8 NC
Features
* User Programmable for Closed-Loop Gains of +1, -1 or +2 without Use of External Resistors * HFA1112A Optimized for AV = 1 Applications * Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . . 850MHz * Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . . 2400V/s * Fast Settling Time (0.1%) . . . . . . . . . . . . . . . . . . . . . 11ns * High Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 60mA * Excellent Gain Accuracy . . . . . . . . . . . . . . . . . . . 0.99V/V * Overdrive Recovery . . . . . . . . . . . . . . . . . . . . . . . . <10ns * Standard Operational Amplifier Pinout
Applications
* RF/IF Processors * Driving Flash A/D Converters * High-Speed Communications * Impedance Transformation * Line Driving * Video Switching and Routing * Radar Systems * Medical Imaging Systems * Related Literature - AN9507, Video Cable Drivers Save Board Space
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)"
Ordering Information
PART NUMBER (BRAND) TEMP. RANGE (oC) -40 to 85 -40 to 85 -40 to 85 PACKAGE 8 Ld PDIP 8 Ld SOIC 8 Ld SOIC PKG. NO. E8.3 M8.15 M8.15
Pin Descriptions
NAME NC -IN +IN VOUT V+ PIN NUMBER 1, 5, 8 2 3 4 6 7 DESCRIPTION No Connection Inverting Input Non-Inverting Input Negative Supply Output Positive Supply
HFA1112IP HFA1112IB (1112I) HFA1112AIB (1112AIB) HFA11XXEVAL
High Speed Op Amp DIP Evaluation Board
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright (c) Intersil Corporation 2000
HFA1112, HFA1112A
Absolute Maximum Ratings
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) JC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . 125 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 170 N/A Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS Output Offset Voltage
VSUPPLY = 5V, AV = +1, RL = 100, Unless Otherwise Specified TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS
25 Full
39 35 25 240 2.5 0.980 0.975 1.96 1.95 3.0 2.5 50 35 4.5 -
8 10 45 9 37 25 50 300 2 2.8 0.990 1.98 0.02 3.3 3.0 60 50 0.3
25 35 40 65 360 -
mV mV V/oC dB dB nV/Hz pA/Hz A A k pF V
Output Offset Voltage Drift PSRR
Full 25 Full
Input Noise Voltage (Note 3) Non-Inverting Input Noise Current (Note 3) Non-Inverting Input Bias Current
100kHz 100kHz
25 25 25 Full
Non-Inverting Input Resistance Inverting Input Resistance (Note 2) Input Capacitance Input Common Mode Range TRANSFER CHARACTERISTICS Gain AV = +1, VIN = +2V AV = +2, VIN = +1V AV = +2, 2V Full Scale AV = -1 RL = 50 DC, AV = +2
25 25 25 Full
25 Full
1.02 1.025 2.04 2.05 -
V/V V/V V/V V/V %
Gain
25 Full
DC Non-Linearity (Note 3) OUTPUT CHARACTERISTICS Output Voltage (Note 3)
25
25 Full
5.5 26 33
V V mA mA V mA mA
Output Current (Note 3)
25, 85 -40
Closed Loop Output Impedance POWER SUPPLY CHARACTERISTICS Supply Voltage Range Supply Current (Note 3)
25
Full 25 Full
21 -
AC CHARACTERISTICS -3dB Bandwidth (VOUT = 0.2VP-P, Notes 2, 3) AV = -1 AV = +1 AV = +2 25 25 25 450 500 350 800 850 550 MHz MHz MHz
2
HFA1112, HFA1112A
Electrical Specifications
PARAMETER Slew Rate (VOUT = 5VP-P, Note 2) VSUPPLY = 5V, AV = +1, RL = 100, Unless Otherwise Specified (Continued) TEST CONDITIONS AV = -1 AV = +1 AV = +2 Full Power Bandwidth (VOUT = 5VP-P, Note 3) AV = -1 AV = +1 AV = +2 Gain Flatness (to 30MHz, Notes 2, 3) AV = -1 AV = +1 AV = +2 Gain Flatness (to 50MHz, Notes 2, 3) AV = -1 AV = +1 AV = +2 Gain Flatness (to 100MHz, Notes 2, 3) Linear Phase Deviation (to 100MHz, Note 3) AV = -1 AV = +2 AV = -1 AV = +1 AV = +2 2nd Harmonic Distortion (30MHz, VOUT = 2VP-P, Notes 2, 3) AV = -1 AV = +1 AV = +2 3rd Harmonic Distortion (30MHz, VOUT = 2VP-P, Notes 2, 3) AV = -1 AV = +1 AV = +2 2nd Harmonic Distortion (50MHz, VOUT = 2VP-P, Notes 2, 3) AV = -1 AV = +1 AV = +2 3rd Harmonic Distortion (50MHz, VOUT = 2VP-P, Notes 2, 3) AV = -1 AV = +1 AV = +2 2nd Harmonic Distortion (100MHz, VOUT = 2VP-P, Notes 2, 3) AV = -1 AV = +1 AV = +2 3rd Harmonic Distortion (100MHz, VOUT = 2VP-P, Notes 2, 3) AV = -1 AV = +1 AV = +2 3rd Order Intercept (AV = +2, Note 3) 1dB Compression (AV = +2, Note 3) Reverse Isolation (S12, Note 3) 100MHz 300MHz 100MHz 300MHz 40MHz 100MHz 600MHz TRANSIENT CHARACTERISTICS Rise Time (VOUT = 0.5V Step, Note 2) AV = -1 AV = +1 AV = +2 25 25 25 500 480 700 800 750 1000 ps ps ps TEMP (oC) 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 MIN 1500 800 1100 TYP 2400 1500 1900 300 150 220 0.02 0.1 0.015 0.05 0.2 0.036 0.10 0.07 0.13 0.83 0.05 -52 -57 -52 -71 -73 -72 -47 -53 -47 -63 -68 -65 -41 -50 -42 -55 -49 -62 28 13 19 12 -70 -60 -32 MAX 0.04 0.08 0.22 -45 -65 -40 -55 -35 -45 UNITS V/s V/s V/s MHz MHz MHz dB dB dB dB dB dB dB dB Degrees Degrees Degrees dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBm dBm dBm dBm dB dB dB
3
HFA1112, HFA1112A
Electrical Specifications
PARAMETER Rise Time (VOUT = 2V Step) VSUPPLY = 5V, AV = +1, RL = 100, Unless Otherwise Specified (Continued) TEST CONDITIONS AV = -1 AV = +1 AV = +2 Overshoot (VOUT = 0.5V Step, Input tR/tF = 200ps, Notes 2, 3, 4) 0.1% Settling Time (Note 3) 0.05% Settling Time Overdrive Recovery Time Differential Gain AV = -1 AV = +1 AV = +2 VOUT = 2V to 0V VOUT = 2V to 0V VIN = 5VP-P AV = +1, 3.58MHz, RL = 150 AV = +2, 3.58MHz, RL = 150 Differential Phase AV = +1, 3.58MHz, RL = 150 AV = +2, 3.58MHz, RL = 150 NOTES: 2. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation. 3. See Typical Performance Curves for more information. 4. Overshoot decreases as input transition times increase, especially for AV = +1. Please refer to Typical Performance Curves. TEMP (oC) 25 25 25 25 25 25 25 25 25 25 25 25 25 MIN TYP 0.82 1.06 1.00 12 45 6 11 15 8.5 0.03 0.02 0.05 0.04 MAX 30 65 20 UNITS ns ns ns % % % ns ns ns % % Degrees Degrees
Application Information
Closed Loop Gain Selection
The HFA1112 features a novel design which allows the user to select from three closed loop gains, without any external components. The result is a more flexible product, fewer part types in inventory, and more efficient use of board space. This "buffer" operates in closed loop gains of -1, +1, or +2, and gain selection is accomplished via connections to the inputs. Applying the input signal to +IN and floating -IN selects a gain of +1, while grounding -IN selects a gain of +2. A gain of -1 is obtained by applying the input signal to -IN with +IN grounded. The table below summarizes these connections:
GAIN (ACL) -1 +1 (Note) +2 CONNECTIONS +INPUT (PIN 3) GND Input Input -INPUT (PIN 2) Input NC (Floating) GND
Terminated microstrip signal lines are recommended at the input and output of the device. Capacitance directly on the output must be minimized, or isolated as discussed in the next section. For unity gain applications, care must also be taken to minimize the capacitance to ground seen by the amplifier's inverting input. At higher frequencies this capacitance will tend to short the -INPUT to GND, resulting in a closed loop gain which increases with frequency. This will cause excessive high frequency peaking and potentially other problems as well. An example of a good high frequency layout is the Evaluation Board shown in Figure 2.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier's phase margin resulting in frequency response peaking and possible oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. Figure 1 details starting points for the selection of this resistor. The points on the curve indicate the RS and CL combinations for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. Picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. RS and CL form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth of 850MHz. By decreasing RS as CLincreases
NOTE: Use HFA1112A For Maximum Stability.
PC Board Layout
The frequency response of this amplifier depends greatly on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10F) tantalum in parallel with a small value (0.1F) chip capacitor works well in most cases. 4
HFA1112, HFA1112A
(as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. Even so, bandwidth does decrease as you move to the right along the curve. For example, at AV = +1, RS = 50, CL = 30pF, the overall bandwidth is limited to 300MHz, and bandwidth drops to 100MHz at AV = +1, RS = 5, CL = 340pF.
Evaluation Board
The performance of the HFA1112 may be evaluated using the HFA11XX Evaluation Board, slightly modified as follows: 1. Remove the 500 feedback resistor (R2), and leave the connection open. 2. a. For AV = +1 evaluation, remove the 500 gain setting resistor (R1), and leave pin 2 floating. b. For AV = +2, replace the 500 gain setting resistor with a 0 resistor to GND.
50 45 40 35 30 25 20 15 10 5 0 0
AV = +1
The layout and modified schematic of the board are shown in Figure 2. To order evaluation boards (part number HFA11XXEVAL), please contact your local sales office.
RS ()
AV = +2 40 80 120 160 200 240 280 320 LOAD CAPACITANCE (pF) 360 400
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs LOAD CAPACITANCE
(AV = +1) or 0 (AV = +2) R1 50 IN 0.1F -5V GND 1 2 3 4 10F 8 7
VH 0.1F 50 6 5 GND OUT VL 10F +5V +IN
TOP LAYOUT
VH 1
BOTTOM LAYOUT
OUT V+ VL VGND
FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT
5
HFA1112, HFA1112A Typical Performance Curves
200 AV = +2 150 OUTPUT VOLTAGE (mV) 100 50 0 -50 -100 -150 -200 TIME (5ns/DIV.) OUTPUT VOLTAGE (V) 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 TIME (5ns/DIV.)
VSUPPLY = 5V, TA = 25oC, RL = 100, Unless Otherwise Specified
2.0 AV = +2
FIGURE 3. SMALL SIGNAL PULSE RESPONSE
FIGURE 4. LARGE SIGNAL PULSE RESPONSE
200 150 OUTPUT VOLTAGE (mV) 100 50 0 -50 -100 -150 -200 TIME (5ns/DIV.) AV = +1 OUTPUT VOLTAGE (V)
2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 TIME (5ns/DIV.) AV = +1
FIGURE 5. SMALL SIGNAL PULSE RESPONSE
FIGURE 6. LARGE SIGNAL PULSE RESPONSE
200 150 OUTPUT VOLTAGE (mV) 100 50 0 -50 -100 -150 -200 TIME (5ns/DIV.) AV = -1
2.0 1.5 OUTPUT VOLTAGE (V) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 TIME (5ns/DIV.) AV = -1
FIGURE 7. SMALL SIGNAL PULSE RESPONSE
FIGURE 8. LARGE SIGNAL PULSE RESPONSE
6
HFA1112, HFA1112A Typical Performance Curves
NORMALIZED GAIN (dB) 6 VOUT = 200mVP-P 3 0 -3 -6 -9 PHASE -90 AV = +2 AV = -1 AV = +1 -180 -270 -360 GAIN AV = -1 AV = +2 0 AV = +1 9 GAIN (dB) NORMALIZED PHASE (DEGREES) 6 3 0 GAIN RL = 50 RL = 100 RL = 1k 0 PHASE RL = 100 RL = 50 RL = 1k 0.3 1 10 100 FREQUENCY (MHz) -90 -180 -270 -360 1000 PHASE (DEGREES) PHASE (DEGREES) PHASE (DEGREES) AV = +2, VOUT = 200mVP-P
VSUPPLY = 5V, TA = 25oC, RL = 100, Unless Otherwise Specified (Continued)
0.3
1
10 100 FREQUENCY (MHz)
1000
FIGURE 9. FREQUENCY RESPONSE
FIGURE 10. FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS
6 3 GAIN (dB) 0 -3 -6 -9
AV = +1, VOUT = 200mVP-P
6 RL = 1k GAIN (dB) 3 0 -3 -6 -9 0 PHASE (DEGREES)
AV = -1, VOUT = 200mVP-P
RL = 1k
GAIN
RL = 100 RL = 50
GAIN
RL = 100 RL = 50
RL = 100 180 PHASE 90 0 RL = 50 RL = 1k 0.3 1 10 100 FREQUENCY (MHz) -90 -180 1000
PHASE RL = 100 RL = 50 RL = 1k 0.3 1 10 100 FREQUENCY (MHz) -90 -180 -270 -360 1000
FIGURE 11. FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS
FIGURE 12. FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS
12 GAIN (dB) 9 6
AV = +2
1VP-P GAIN (dB)
6 3 0
AV = +1
GAIN 3 0 PHASE 4.0VP-P PHASE (DEGREES) 2.5VP-P 0 -90 4.0VP-P 2.5VP-P 1VP-P 0.3 1 10 100 FREQUENCY (MHz) -180 -270 -360 1000
GAIN -3 -6
VOUT = 4VP-P VOUT = 2.5VP-P VOUT = 1VP-P 0
PHASE -90 VOUT = 4VP-P VOUT = 2.5VP-P VOUT = 1VP-P 0.3 1 10 100 FREQUENCY (MHz) -180 -270 -360 1000
FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES
FIGURE 14. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES
7
HFA1112, HFA1112A Typical Performance Curves
6 GAIN (dB) 3 GAIN 0 -3 -6 PHASE PHASE (DEGREES) 180 90 VOUT = 4VP-P VOUT = 2.5VP-P VOUT = 1VP-P -180 0.3 1 10 100 FREQUENCY (MHz) 1000 0 -90 VOUT = 1VP-P NORMALIZED GAIN (dB) AV = -1 VOUT = 2.5VP-P VOUT = 4VP-P
VSUPPLY = 5V, TA = 25oC, RL = 100, Unless Otherwise Specified (Continued)
15 12 9 6 3 0 -3 -6 -9 -12 -15 0.3 1 10 FREQUENCY (MHz) 100 1000 AV = -1 AV = +2 AV = +1 VOUT = 5VP-P
FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES
FIGURE 16. FULL POWER BANDWIDTH
900 850 800 BANDWIDTH (MHz) 750 700 650 600 AV = +2 550 500 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC) AV = +1 AV = -1 NORMALIZED GAIN (dB)
0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 -0.05 -0.10 -0.15 1 10 FREQUENCY (MHz) 100 AV = +2 AV = +1 AV = -1
FIGURE 17. -3dB BANDWIDTH vs TEMPERATURE
FIGURE 18. GAIN FLATNESS
4 3 DEVIATION (DEGREES) 2 SETTLING ERROR (%) 1 0 -1 -2 -3 -4 -5 -6 0 15 30 45 60 75 90 105 120 135 150 FREQUENCY (MHz) -2 3 8 13 18 23 28 33 38 43 48 AV = +2 AV = +1 AV = -1 0.6 0.4 0.2 0.1 0 -0.1 -0.2 -0.4 -0.6 AV = +2, VOUT = 2V
TIME (ns)
FIGURE 19. DEVIATION FROM LINEAR PHASE
FIGURE 20. SETTLING RESPONSE
8
HFA1112, HFA1112A Typical Performance Curves
-24 -30 -36 -42 GAIN (dB) -48 -54 GAIN (dB) -60 -66 -72 -78 -84 0 20 40 60 80 100 120 140 160 180 200 FREQUENCY (MHz) AV = +2 AV = -1 AV = +2 AV = -1 AV = +1 -24 -30 -36 -42 -48 -54 -60 100 190 280 370 460 550 640 730 820 910 1000 AV = -1 AV = +1 AV = -1 AV = +2 AV = +2 GAIN PHASE AV = +1 90 45 0
VSUPPLY = 5V, TA = 25oC, RL = 100, Unless Otherwise Specified (Continued)
PHASE (DEGREES) 235 180
FREQUENCY (MHz)
FIGURE 21. LOW FREQUENCY REVERSE ISOLATION (S12)
OUTPUT POWER AT 1dB COMPRESSION (dBm) 20 18 AV = -1
FIGURE 22. HIGH FREQUENCY REVERSE ISOLATION (S12)
30 2 - TONE
INTERCEPT POINT (dBm)
16 14 12 10 8 6 4 2 0 100 200 AV = +1
AV = -1 20
AV = +2 AV = +1 10
AV = +2
300 FREQUENCY (MHz)
400
500
0 100
200
300
400
FREQUENCY (MHz)
FIGURE 23. 1dB GAIN COMPRESSION vs FREQUENCY
FIGURE 24. 3rd ORDER INTERMODULATION INTERCEPT vs FREQUENCY
-20 AV = +2 -30 -40 DISTORTION (dBc) DISTORTION (dBc) -50 -60 100MHz -70 -80 -90 -100 -6 -3 0 3 6 9 12 15 OUTPUT POWER (dBm) 50MHz 30MHz
-20 -30 -40 -50 -60 -70 -80 -90 -100 -6
AV = +2
30MHz 50MHz 100MHz
-3
0
3
6
9
12
15
18
OUTPUT POWER (dBm)
FIGURE 25. 2nd HARMONIC DISTORTION vs POUT
FIGURE 26. 3rd HARMONIC DISTORTION vs POUT
9
HFA1112, HFA1112A Typical Performance Curves
-20 AV = +1 -30 -40 DISTORTION (dBc) -50 -60 -70 -80 -90 -100 -6 -3 0 3 6 9 OUTPUT POWER (dBm) 12 15 100MHz 50MHz 30MHz DISTORTION (dBc) -30 -40 -50 -60 -70 100MHz -80 -90 -100 -6 -3 0 3 6 9 OUTPUT POWER (dBm) 12 15 50MHz 30MHz
VSUPPLY = 5V, TA = 25oC, RL = 100, Unless Otherwise Specified (Continued)
-20 AV = +1
FIGURE 27. 2nd HARMONIC DISTORTION vs POUT
-20 AV = -1 -30 -40 DISTORTION (dBc) DISTORTION (dBc) -50 -60 -70 -80 -90 -100 -6 -3 0 3 6 9 OUTPUT POWER (dBm) 12 15 100MHz 50MHz 30MHz
FIGURE 28. 3rd HARMONIC DISTORTION vs POUT
-20 AV = -1 -30 -40 -50 -60 -70 -80 50MHz -90 -100 -6 -3 0 3 6 9 12 15 OUTPUT POWER (dBm) 100MHz 30MHz
FIGURE 29. 2nd HARMONIC DISTORTION vs POUT
FIGURE 30. 3rd HARMONIC DISTORTION vs POUT
0.04
60 VOUT = 0.5V 50
PERCENT ERROR (%)
0.02 OVERSHOOT (%) 40
AV = +1
0
30
20 AV = -1 10 AV = +2 0 100
-0.02
-0.04 -3.0 -2.0 -1.0 0 1.0 2.0 3.0 INPUT VOLTAGE (V)
300
500
700
900
1100
1300
INPUT RISE TIME (ps)
FIGURE 31. INTEGRAL LINEARITY ERROR
FIGURE 32. OVERSHOOT vs INPUT RISE TIME
10
HFA1112, HFA1112A Typical Performance Curves
60 VOUT = 1V 50 OVERSHOOT (%) OVERSHOOT (%) 50
VSUPPLY = 5V, TA = 25oC, RL = 100, Unless Otherwise Specified (Continued)
60 VOUT = 2V
40 AV = +1 30
40 AV = +1
30
20 AV = -1 AV = +2 0 100 300 500 700 900 1100 1300
20 AV = +2
10
10 AV = -1 0 100 300 500 700 900 1100 1300
INPUT RISE TIME (ps)
INPUT RISE TIME (ps)
FIGURE 33. OVERSHOOT vs INPUT RISE TIME
22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 5 6 7 8 9 10 TOTAL SUPPLY VOLTAGE (V+ - V-, V) 25 24 23 SUPPLY CURRENT (mA) 22 21 20 19 18 17 16 15
FIGURE 34. OVERSHOOT vs INPUT RISE TIME
SUPPLY CURRENT (mA)
-50
-25
0
25
50
75
100
125
TEMPERATURE (oC)
FIGURE 35. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 36. SUPPLY CURRENT vs TEMPERATURE
3.6 3.5 3.4 OUTPUT VOLTAGE (V) 3.3 3.2 3.1 3.0 2.9 2.8 2.7 2.6 -50 -25 0 25 50 75 TEMPERATURE (oC) 100 125 |-VOUT| (RL= 50) |-VOUT| (RL= 100) AV = -1 +VOUT (RL= 50) +VOUT (RL= 100) NOISE VOLTAGE (nV/Hz)
50
130
30
90
20 ENI 10 INI 0 0.1 1 10 FREQUENCY (kHz)
70
50
30 100
FIGURE 37. OUTPUT VOLTAGE vs TEMPERATURE
FIGURE 38. INPUT NOISE CHARACTERISTICS
11
NOISE CURRENT (pA/Hz)
40
110
HFA1112, HFA1112A Die Characteristics
DIE DIMENSIONS 63 mils x 44 mils x 19 mils 1600m x 1130m 483m METALLIZATION Type: Metal 1: AlCu (2%)/TiW Thickness: Metal 1: 8kA 0.4kA Type: Metal 2: AlCu (2%) Thickness: Metal 2: 16kA 0.8kA PASSIVATION Type: Nitride Thickness: 4kA 0.5kA TRANSISTOR COUNT 52 SUBSTRATE POTENTIAL (POWERED UP) Floating (Recommend Connection to V-)
Metallization Mask Layouts
HFA1112 HFA1112A
NC
NC
+IN
+IN
V-
V-
-IN NC NC
-IN
NC
NC
NC
NC
V+
V+
OUT
OUT
12
HFA1112, HFA1112A Dual-In-Line Plastic Packages (PDIP)
N E1 INDEX AREA 12 3 N/2
E18.3A (JEDEC MS-001-AC ISSUE D)
18 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL
-B-
MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 33.27 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 34.65 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 5/00
MIN 0.015 0.115 0.014 0.045 0.008 0.880 0.005 0.300 0.240
MAX 0.210 0.195 0.022 0.070 0.014 0.920 0.325 0.280
-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1 A2 L A C L E
A A1 A2 B B1 C D D1 E
-C-
eA eC
C
e
C A BS
eB
NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
E1 e eA eB L N
0.100 BSC 0.300 BSC 0.115 18 0.430 0.150 -
2.54 BSC 7.62 BSC 10.92 3.81 18
2.93
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HFA1112, HFA1112A Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M8.15 (JEDEC MS-012-AA ISSUE C) 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES SYMBOL A MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497 MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574 MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
L
A1 B C D E
A1 0.10(0.004) C
e H h L N
0.050 BSC 0.2284 0.0099 0.016 8 0o 8o 0.2440 0.0196 0.050
1.27 BSC 5.80 0.25 0.40 8 0o 6.20 0.50 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil Ltd. 8F-2, 96, Sec. 1, Chien-kuo North, Taipei, Taiwan 104 Republic of China TEL: 886-2-2515-8508 FAX: 886-2-2515-8369
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