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SSI 32F8030
(R)
A TDK Group Company
Programmable Electronic Filter
April 1995
DESCRIPTION
The SSI 32F8030 Programmable Electronic Filter provides an electronically controlled low-pass filter with a separate differentiated low-pass output. A seven- pole, 0.05 Equiripple-type linear phase, low-pass filter is provided along with a single-pole, single-zero differentiator. Both outputs have matched delays. The delay matching is unaffected by any amount of programmed high frequency peaking (boost) or bandwidth. This programability, combined with low group delay variation makes the SSI 32F8030 ideal for use in many applications. Double differentiation high frequency boost is accomplished by a two-pole, low- pass with a two-pole, high-pass feed forward section to provide complementary real axis zeros. A variable attenuator is used to program the zero locations, which controls the amount of boost. The SSI 32F8030 programmable boost and bandwidth characteristics can be controlled by external DACs or DACs provided in the SSI 32D4661 Time Base Generator. Fixed characteristics are easily accomplished with three external resistors. In addition, boost can be switched in or out by a logic signal. The SSI 32F8030 requires only a +5V supply and is available in 16-Lead SON, and SOL packages.
FEATURES
* * * * * * * * * *
Ideal for: - constant density recording applications - magnetic tape recording Programmable filter cutoff frequency (c = 250 kHz to 2.5 MHz) Programmable high frequency peaking (0 to 9 dB boost at the filter cutoff frequency) Matched normal and differentiated low-pass outputs Differential filter input and outputs
3.0% group delay variation from 0.2 c to 1.75 c, 0.25 MHz c 2.5 MHz
Total harmonic distortion less than 1% +5V only operation 16-Lead SON, and SOL packages 5 mW idle mode
BLOCK DIAGRAM
PIN DIAGRAM
VIN+ VIN-
Low Pass Filter
Summer
Low Pass Filter
VO_NORM+ VO_NORM-
GND1 VO_NORMVO_NORM+
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VO_DIFF+ VO_DIFFPWRON VR VCC2 IFP VFP GND2
High Pass Filter
Variable Atten.
High Pass Filter
VO_DIFF+ VO_DIFF-
VCC1 VINVIN+
VBP IFP VFP FBST GND1 GND2 VCC1 VCC2 VREF Filter Control BIAS PWRON VR
VBP FBST
CAUTION: Use handling procedures necessary for a static sensitive component.
04/14/95 - rev.
1
SSI 32F8030 Programmable Electronic Filter
FUNCTIONAL DESCRIPTION
The SSI 32F8030, a high performance programmable electronic filter, provides a low pass 0.05 Equirippletype linear phase seven pole filter with matched normal and differentiated outputs. The device has been optimized for usage with several Silicon Systems products, including the SSI 32D4661 Time Base Generator, the SSI 32P54x family of Pulse Detectors, and the SSI 32P4720 Combo device (Data Separator and Pulse Detector). CUTOFF FREQUENCY PROGRAMMING The SSI 32F8030 programmable electronic filter can be set to a filter cutoff frequency from 250 kHz to 2.5 MHz (with no boost). Cutoff frequency programming can be established using either a current source fed into the IFP pin, whose output current is proportional to the SSI 32F8030 output reference voltage VR, or by means of an external resistor tied from the output voltage reference pin VR to pin VFP. The former method is optimized using the SSI 32D4661 Time Base Generator, since the current source into pin IFP is available at the DAC F output of the 32D4661. Furthermore, the voltage reference input is supplied to pin VR3 of the 32D4661 by the reference voltage VR from the VR pin of the 32F8030. This reference voltage is an internally generated bandgap reference, which typically varies less than 1 % over voltage supply and temperature variation. (For the calculations below IVFP = current into IFP or VFP pins). The cutoff frequency, determined by the -3dB point relative to a very low frequency value (< 10kHz), is related to the current IVFP injected into pin IFP by the formula Fc (ideal, in MHz) = 3.125*IFP = 3.125*IVFP*2.2/VR, where IFP and IVFP are in mA, 0.082
SLIMMER HIGH FREQUENCY BOOST PROGRAMMING The amplitude of the output signal at frequencies near the cutoff frequency can be increased using this feature. Applying an external voltage to pin VBP which is proportional to reference output voltage VR (provided by the VR pin) will set the amount of boost. A fixed amount of boost can be set by an external resistor divider network connected from pin VBP to pins VR and GND. No boost is applied if pin FBST, frequency boost enable, is at a low logic level. The amount of boost FB at the cutoff frequency Fc is related to the voltage VBP by the formula FB (ideal, in dB) = 20 log10[1.884(VBP/VR)+1], where 0SSI 32F8030 Programmable Electronic Filter
PIN DESCRIPTION
NAME VIN+, VINVO_NORM+, VO_NORMVO_DIFF+, VO_DIFFIFP TYPE I O O O I DIFFERENTIAL DIFFERENTIATED OUTPUTS. For minimum time skew, these outputs should be AC coupled to the pulse detector. FREQUENCY PROGRAM INPUT. The filter cutoff frequency FC, is set by an external current IFP, injected into this pin. IFP must be proportional to voltage VR. This current can be set with an external current generator such as a DAC. VFP should be left open when using this pin. FREQUENCY PROGRAM INPUT. The filter cutoff frequency can be set by programming a current through a resistor from VR to this pin. IFP should be left open when using this pin. FREQUENCY BOOST PROGRAM INPUT. The high frequency boost is set by an external voltage applied to this pin. VBP must be proportional to voltage VR. A fixed amount of boost can be set by an external resistor divider network connected from VBP to VR and GND. No boost is applied if the FBST pin is grounded, or at logic low. FREQUENCY BOOST. A high logic level or open input enables the frequency boost circuitry. POWER ON. A high logic level enables the chip. A low level puts the chip in a low power state. REFERENCE VOLTAGE. Internally generated reference voltage. +5 VOLT SUPPLY. GROUND DESCRIPTION DIFFERENTIAL SIGNAL INPUTS. The input signals must be AC coupled to these pins. DIFFERENTIAL NORMAL OUTPUTS. The output signals must be AC coupled.
VFP
I
VBP
I
FBST PWRON VR VCC1, VCC2 GND1, GND2
I I - I -
3
SSI 32F8030 Programmable Electronic Filter
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS Operation above maximum ratings may damage the device. PARAMETER Storage Temperature Junction Operating Temperature, Tj Supply Voltage, VCC1, VCC2 Voltage Applied to Inputs IFP, VFP Inputs Maximum Current RECOMMENDED OPERATING CONDITIONS Supply voltage, VCC1, VCC2 Ambient Temperature 4.5 < VCC1,2 < 5.50V 0 < Ta < 70C RATING -65 to +150C +130C -0.5 to 7V -0.5 to VCC + 0.5V 1.2 mA
4
SSI 32F8030 Programmable Electronic Filter
Power Supply Characteristics Unless otherwise specified, recommended operating conditions apply. PARAMETER ICC ICC PD PD Power Supply Current Power Supply Current Power Dissipation Power Dissipation CONDITIONS PWRON 0.8V PWRON 2.0V PWRON 2.0V PWRON 0.8V 28 140 MIN NOM MAX 0.5 42 231 3 UNIT mA mA mW mW
DC Characteristics VIH VIL IIH IIL High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current VIH = 2.7V VIL = 0.4V -1.5 TTL input 2.0 -0.3 VCC+0.3 0.8 20 V V A mA
Filter Characteristics c = 1.25 MHz unless otherwise stated FCA AO AD TGD0 TGDB Filter c Accuracy VO_NORM Diff Gain VO_DIFF Diff Gain Group Delay Variation Without Boost* Group Delay Variation With Boost* using IFP pin: IFP = 0.4 mA or using VFP pin: Rx = 1.84 k F = 0.67 c, FB = 0 dB F = 0.67 c, FB = 0 dB VBP = VR 0.25 MHz c 2.5 MHz F = 0.2 c to 1.75 c 0.25 MHz c 2.5 MHz VBP = VR, F = 0.2 c to 1.75 c THD = 1% max, F = 0.67 c (no boost, 1000 pF capacitor across Rx) THD = 1% max, F = 0.67 c VBP = 0 (1000 pF capacitor across Rx) THD = 1% max, F = 0.67 c VBP = VR (1000 pF capacitor across Rx) THD = 1% max, F = 0.67 c VBP = 0 (1000 pF capacitor across Rx) THD = 1% max, F = 0.67 c VBP = VR (1000 pF capacitor across Rx) 1.125 0.8 0.9AO 8.0 -3 -3 1.0 1.0 1.0 1.0 1.0 9.2 1.375 1.20 1.1AO 10.4 +3 +3 MHz V/V V/V dB % % Vpp Vpp Vpp Vpp Vpp
FBA Frequency Boost Accuracy
VIF Filter Input Dynamic Range VOF VOF Filter Normal Output Dynamic Range Filter Normal Output Dynamic Range
VOF Filter Differentiated Output Dynamic Range VOF Filter Differentiated Output Dynamic Range
5
SSI 32F8030 Programmable Electronic Filter
Filter Characteristics (continued) PARAMETER RIN Filter Diff Input Resistance CIN EOUT EOUT EOUT EOUT EOUT EOUT EOUT EOUT IORO
Filter Diff Input Capacitance*
CONDITIONS
MIN 3.0
NOM 4.0 3.0 2.7 1.6 3.1 1.8 1.8 1.0 2.0 1.1
MAX 5.0 3.2 2.0 3.8 2.2 2.1 1.2 2.5 1.5
UNIT k pF
mVRms
Output Noise Voltage* Differentiated Output Output Noise Voltage* Normal Output Output Noise Voltage* Differentiated Output Output Noise Voltage* Normal Output Output Noise Voltage* Differentiated Output Output Noise Voltage* Normal Output Output Noise Voltage* Differentiated Output Output Noise Voltage* Normal Output Filter Output Sink Current Filter Output Resistance**
BW = 100 MHz, Rs = 50, Ip = 0.8 mA, VBP = 0.0V BW = 100 MHz, Rs = 50 Ip = 0.8 mA, VBP = 0.0V BW = 100 MHz, Rs = 50 Ip = 0.8 mA, VBP = VR BW = 100 MHz, Rs = 50 Ip = 0.8 mA, VBP = VR BW = 10 MHz, Rs = 50, Ip = 0.08 mA, VBP = 0.0V BW = 10 MHz, Rs = 50 Ip = 0.08 mA, VBP = 0.0V BW = 10 MHz, Rs = 50 Ip = 0.08 mA, VBP = VR BW = 10 MHz, Rs = 50 Ip = 0.08 mA, VBP = VR 1.0 2.0 Sinking 1 mA from pin
mVRms
mVRms
mVRms
mVRms
mVRms
mVRms
mVRms
mA mA 70
IO+ Filter Output Source Current * Not directly testable in production, design characteristic. ** Single ended Filter Control Characteristics VR IVR Reference Voltage Output Reference Output Source Current
2.0
2.40 2.0
V mA
6
SSI 32F8030 Programmable Electronic Filter
2
1
1.8 1.6 1.4 1.2 1 ifp = 80 A 2 ifp = 224 A 3 ifp = 368 A 4 ifp = 512 A 5 ifp = 656 A 6 ifp = 800 A (c = 250 kHz) (c = 700 kHz) (c = 1.15 MHz) (c = 1.6 MHz) (c = 2.05 MHz) (c = 2.5 MHz)
Delay (s)
1.0 0.8 0.6
2
3
0.4 0.2 0.0 100k
4
5
6
200k
300k
400k 500k
700k
1meg
2meg
3meg
4meg 5meg
Frequency (Hz)
FIGURE 1: Typical Normal/Differentiated Output Group Delay Response
32F8030 GND1 VO_NORMVO_NORM+ VCC1 (+5V) VINVIN+ VBP FBST RBP2
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
VO_DIFF+ VO_DIFFPWR_ON VR VCC2 (+5V) IFP Cx VFP GND2
Rx
RBP1
FIGURE 1: 32F8030 Applications Setup 16-Pin SO VR = 2.2V VFP = .667 VR Cx = 1000 pF needed for THD at low c VFP is used when programming current is set with a resistor from VR. When VFP is used IFP must be left open.
7
IVfp = .33VR/Rx IVfp range: 0.08 mA to 0.8 mA (0.25 MHz to 2.5 MHz)
SSI 32F8030 Programmable Electronic Filter
SDEN
SDATA
to Controller SCLK
Rx c Control
IR
Ref 7-bit DAC Ref 7-bit DAC
Serial Control
SUM
IFP
Cx
DACF
FOUT To Data Sync Phase Lock Loop 7-bit DAC 7-bit DAC DACI To Data Sync DACM To Data Sync
VR LP HP LP HP Boost Control
VR3
VBP
DACS
VO_NORM+
VO_DIFF+
VO_NORM-
VO_DIFF-
VIN+
VIN-
32F8030 32D4661
OUT+
OUT-
DIN+
CIN+
DIN-
CIN-
2k
IN+ IN-
Active Differentiator
DFF Charge Pump
OS
RD To Data Sync
BYP
FWR
AGC
LEVEL
HYS
32P54X
IOF = DACF output current IOF = (0.98F*VR)/127Rx Rx = (0.98F*VR)/127IOF Rx = current reference setting resistor VR = Voltage Reference = 2.2V
F = DAC setting: 0-127 Full scale, F = 127 For range of Max c = 2.5 MHz then IFP = 0.8 mA Therefore, for Max programming current range to 0.8 mA: Rx = (0.98)(2.2/0.8) = 2.7 k
Please note that in setups such as this where IFP is used for cutoff frequency programming VFP must be left open.
FIGURE 2: Applications Setup, Constant Density Recording 32F8030, 32P54X, 32D4661
+1.31703 INPUT S + S 1.68495 + 1.31703
2
+
+
2.95139 S + S 1.54203 + 2.95139
2
5.37034 S + S 1.14558 + 5.37034
2
NORM 0.86133 S + 0.86133
AN
NORM
-KS
2
2
S + S 1.68495 + 1.31703
Normalized for c = (2) c = 1 AN and AD are adjusted for unity gain (0 dB) at F = 0.67 c Denormalize the frequency by substituting S (S/2c) Eq for c = 2.5 MHz, S = S / [(2) (2.5 * 10 6)] = S / (1.57080 * 10 7)
S S + 0.86133
AD
DIFF
FIGURE 3: 32F8030 Normalized Block Diagram
8
SSI 32F8030 Programmable Electronic Filter
TABLE 1: 32F8030 Frequency Boost Calculations - K = 1.31703 (10BOOST (dB) / 20 -1) Assuming 9.2 dB boost for VBP = VR
FB/20 -1 VBP 10 VR 1.884
Boost 1 dB 2 dB 3 dB 4 dB 5 dB
K 0.16 0.34 0.54 0.77 1.03 VBP/VR 0.1 0.2 0.3 0.4 0.5
VBP/VR 0.065 0.137 0.219 0.310 0.413 Boost 1.499 dB 2.777 dB 3.891 dB 4.879 dB 5.765 dB
Boost 6 dB 7 dB 8 dB 9 dB
K 1.31 1.63 1.99 2.40
VBP/VR 0.528 0.657 0.802 0.965
(
(
)
)
or,
VBP/VR 0.6 0.7 0.8 0.9 1.0
Boost 6.569 7.305 7.984 8.613 9.200 dB dB dB dB dB
VBP boost in dB = 20log 1.884 +1 VR
TABLE 2: Calculations Typical change in -3 dB point with boost Boost (dB) 0 1 2 3 4 5 6 7 8 9 Gain @ c(dB) -3 -2 -1 0 1 2 3 4 5 6 Gain @ peak(dB) 0.00 0.00 0.00 0.15 0.99 2.15 3.41 4.68 5.94 7.18 peak/c no peak no peak no peak 0.70 1.05 1.23 1.33 1.38 1.43 1.46 f-3 dB/c 1.00 1.21 1.51 1.80 2.04 2.20 2.33 2.43 2.51 2.59
Notes: 1. c is the original programmed cutoff frequency with no boost 2. -3 dB is the new -3 dB value with boost implemented 3. peak is the frequency where the magnitude peaks with boost implemented i.e., c = 2.5 MHz when boost = 0 dB if boost is programmed to 5 dB then f-3 dB = 5.5 MHz peak = 3.075 MHz
9
SSI 32F8030 Programmable Electronic Filter
PACKAGE PIN DESIGNATIONS
(Top View)
GND1 VO_NORMVO_NORM+ VCC1 VINVIN+ VBP FBST 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VO_DIFF+ VO_DIFFPWRON VR VCC2 IFP VFP GND2
Thermal Characteristics: jA 16-lead SON (150 mil) 16-lead SOL (300 mil) 105 C/W 100 C/W
16-Lead SON, SOL
CAUTION: Use handling procedures necessary for a static sensitive component.
ORDERING INFORMATION
PART DESCRIPTION 16-lead SON (150 mil) 16-lead SOL (300 mil) ORDER NUMBER 32F8030-CN 32F8030-CL PACKAGE MARK 32F8030-CN 32F8030-CN
No responsibility is assumed by Silicon Systems for use of this product nor for any infringements of patents and trademarks or other rights of third parties resulting from its use. No license is granted under any patents, patent rights or trademarks of Silicon Systems. Silicon Systems reserves the right to make changes in specifications at any time without notice. Accordingly, the reader is cautioned to verify that the data sheet is current before placing orders. Silicon Systems, Inc., 14351 Myford Road, Tustin, CA 92680-7022 (714) 573-6000, FAX (714) 573-6914 04/14/95 - rev. 10 (c)1991 Silicon Systems, Inc. Protection by the following patents: 5182477, 5235540

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