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PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION
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Z90365
DIGITAL TELEVISION CONTROLLER
FEATURES
Device Z90365 ROM (KW) 32 RAM* (Words) 640 PWM (8-Bit) 8 Voltage Range 4.5 to 5.5V
s s s s s s
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Character-Control and Closed-Caption Modes Keypad User Control TV Tuner Serial Interface Direct Video Signals Supports Violence Blocking Speed: 12 MHz
Note: *General-Purpose s s s
42-Pin SDIP 0C to +70C Temperature Range Fully Customized Character Set
GENERAL DESCRIPTION
The Z90365 Digital Television Controller is designed to provide complete audio and video control of television receivers, video recorders, and advanced on-screen display facilities. The television controller features a Z89C00 RISC processor core that controls the on-board peripheral functions and registers using the standard processor instruction set. Character attributes can be controlled through two modes: the on-screen display Character-Control Mode and the Closed-Caption Mode. The Character-Control Mode provides access to the full set of attribute controls, allowing the modification of attributes on a character-by-character basis. The insertion of control characters permits direction of other character attributes. Closed-caption text can be decoded directly from the composite video signal and displayed on-screen with the assistance of the processor's digital signal processing (DSP) capabilities. The fully customized 512 character set, formatted in two 256 character banks, can be displayed with a host of display attributes that include underlining, italics, blinking, eight foreground/background colors, character position offset delay, and background transparency. Serial interfacing with the television tuner is provided through the tuner serial port. Other serial devices, such as digital channel tuning adjustments, may be accessed through the industry-standard I2C port. User control can be monitored through the keypad scanning port, or the 16-bit remote control capture register. Receiver functions such as color and volume can be directly controlled by eight 8-bit pulse width modulated ports. Notes: All Signals with a preceding front slash, "/", are active Low. For example, B//W (WORD is active Low); /B/W (BYTE is active Low, only). Power connections follow conventional descriptions below: Connection Power Ground Circuit VCC GND Device VDD VSS
CP97TEL2800
PRELIMINARY
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Z90365 Digital Television Controller
Zilog
GENERAL DESCRIPTION (Continued)
Capture IRIN ADC Port 17 Port 00 ADC0 ADC1 ADC2 ADC3 ADC4 Port 0 Port 00 Port 01 Port 02 Port 03 Port 04 Port 05 Port 06 Port 07 Port 08 Port 09 Port 0F
PWM PWM1 PWM2 PWM3 PWM4 PWM5 PWM9 PWM10
Port1 Port 10 Port 11 Port 12 Port 13 Port 14 Port 15 Port 16 Port 17 Port 18
Control XTAL1 XTAL2 LPF HSYNC VSYNC /Reset CPU RAM 640 x 16
Address ROM Addr Data
Register Addr/Data
OSD V1 V2 V3 VBLANK HALFBLNK ROM 32K x 16
Port0F
ROM Data
Figure 1. Functional Block Diagram
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CP97TEL2800
Zilog
Z90365 Digital Television Controller
PIN DESCRIPTION
PWM10 PWM9 PWM5 PWM4 PWM3 PWM2 PWM1 Port03 Port04/ADC4 Port05/ADC3 Port00/ADC2 Port17/ADC1 GND Port10/R<0> Port06/Counter Port18/G<0> Port13/G<1> Port14/B<0> Port15/B<1> Port16/SCLK Port0F/Half Blank
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Z90365 Shrink DIP
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
Port12/I2MSD P11/I2MSC Port02/I2SSD Port01/I2SSC Port09 Port08/R<1> IRIN Port07/CSync Vcc /Reset XTAL2 XTAL1 ANGND LPF CVI/ADC0 VSync HSync VBlank V1 V2 V3
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Figure 2. 42-Pin Shrink DIP
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PIN DESCRIPTION (Continued)
Table 1. 42-Pin SDIP Pin Identification Name VCC GND IRIN Function + 5 Volts Z90365 34 Direction PWR PWR I AI O O B Reset - - I I O O I 1 Notes
0 Volts 13, 30 Infrared Remote Capture 36 Input ADC[4:0] 4-Bit A/D Converter Input 9, 10, 11, 12, 28 PWM10, PWM9 14-Bit Pulse Width 1, 2 Modulator Output PWM[5:1] 8-Bit Pulse Width Modulator 3, 4, 5, 6, 7 Output Port0[F:0] Bit Programmable 21, -, -, -, -, -, 38, 37, Input/Output Ports 35, -, -, 15, 8, 40, 39, 11 Port1[8:0] Bit Programmable 16, 12, 20, 19, 18, 17, Input/Output Ports 42, 41, 14 2 39 or 41 SCL I C Clock I/O SCD XTAL1 XTAL2 LPF HSYNC VSYNC /Reset V[3:1] Blank HalfBlank RGB Digital Outputs SCLK 40 or 42 I Data I/O Crystal Oscillator Input 31 Crystal Oscillator Output 32 Loop Filter 29 H_SYNC 26 V_SYNC 27 Device Reset 33 OSD Video Output Typically 22, 23, 24 Drive B, G, and R Outputs OSD Blank Output 25 OSD HalfBlank Output 21 R[1:0], G[1:0], and B[1:0] 37, 14, 17, 16, 19, 18 Outputs of the RGB Matrix Internal Processor SCLK 20
2C
B BOD BOD AI AO AB B B I O O O O O
I 2 3 I O O I I I O O 4 5 6
Notes: 1. SCL I/O pin is shared with Port 0 or Port 11. 2. SCD I/O pin is shared with Port 02 or Port 12. 3. Half Blank output is a function shared with Port 0F. 4. Digital RGB outputs and the internal SCLK are shared with Port 1 [5:0]. 5. Internal processor SCLK is shared with Port 16. PWM outputs are push/pull
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CP97TEL2800
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Z90365 Digital Television Controller
V1, V2, V3 (R, G, B) ANALOG OUTPUT (PRELIMINARY) TA = 0C to 70C
Output Voltage (30 k load) VCC = 4.75 data = 00 data = 01 data = 10 data = 11 0.00v .. 0.65v 1.70v 0.20v 2.80v 0.25v 3.90v 0.3v 5.00V 0.00v .. 0.70v 1.80v 0.20v 2.90v 0.25v 4.0v 0.30v 5.25V 0.00v .. 0.75v 1.90v 0.20v 3.00v 0.25v 4.10v 0.30v Settling Time 70% of DC level, 10pF load
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50 ns
Z90365
32.768 KHz
10 M
22 pF
XTAL1
XTAL2
68 K 47 pF
Figure 3. 32 kHz Oscillator Recommended Circuit
Z90365
510 0.1 F
47 F
Figure 4. Recommended Low Pass Filter Circuit
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Z90365 Digital Television Controller
Zilog
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VID VIA VO VO IOH IOH IOL IOL TA TA Parameter Power Supply Voltage Input Voltage Input Voltage Output Voltage Output Voltage Output Current High Output Current High Output Current Low Output Current Low Operating Temperature Storage Temperature 0 -65 Min 0 -0.3 -0.3 -0.3 -0.3 Max 7 VCC +0.3 VCC +0.3 VCC +0.3 VCC +0.3 -10 -100 20 200 70 150 Units V V V V V mA mA mA mA C C Digital Inputs Analog Inputs (A/D0...A/D4) All Push-Pull Digital Output Push/Pull PWM Outputs (PWM1...PMW8) One Pin All Pins One Pin All Pins Conditions
DC CHARACTERISTICS TA = 0C to + 70C; VCC = 4.5V to + 5.5V; FOSC = 32.768 kHz
Symbol VIL VIH VPU VOL VOH VXL VXH VHY IIR IIL ICC IADC Parameter Input Voltage Low Input Voltage High Max. Pull-Up Voltage Output Voltage Low Output Voltage High Input Voltage XTAL1 Low Input Voltage XTAL1 High Schmitt Hysteresis Reset Input Current Input Leakage Supply Current Input Current -3.0 VCC -2.0 3.0 0.75 150 3.0 100 10 VCC -0.4 0.3 VCC Min 0 0.7 VCC Max 0.2 VCC VCC VCC +0.3 0.4 0.16 4.75 1.0 3.5 0.5 90 0.01 60 Typical 0.4 3.6 Units V V V V V V V V A A mA A All Pins @ IOL = 1 mA @ IOL = 0.75 mA External Clock Generator Driven On XTAL1 Input Pin VRL = 0V @ 0V and VCC Conditions
Notes: 1. The Z90365 should not be operated for extended periods with the crystal oscillator disconnected, except in the defined powerdown modes. In the event that the Z90365 is operated with the oscillator disconnected, the device may draw higher than typical current. 2. Each line of the on-screen display can consist of any number of characters, up to a maximum of 30 characters.
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PRELIMINARY
CP97TEL2800
Zilog
Z90365 Digital Television Controller
AC CHARACTERISTICS TA = 0C to 70C; VCC = 4.5V to 5.25V; FOSC = 32.768 kHz
Symbol TPC TRC,TFC TDPOR TWRES TDHS TDVS TDES TDOS TWHVS Parameter Input Clock Period Clock Input Rise and Fall Power-On Reset Delay Power-On Reset Minimum Width H-SYNC Incoming Signal Width V-SyYNC Incoming Signal Width 1 1 10 200 0 32 0.5 0.8 Min 16 Typical 32 12 1.2 5 TPC 15 10,000 +12 44 2.0 Max 100 Units S nS S S S S S S S
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Time Delay Between Leading Edge of V-SYNC and H-SYNC in -12 EVEN Field Time Delay Between Leading Edge of H-SYNC in ODD Field 20 H_Sync/V_Sync Edge Width
Note: All timing of the I2C bus interface are defined by related specifications of the I2C bus interface.
(c) 1997 by Zilog, Inc. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Zilog, Inc. The information in this document is subject to change without notice. Devices sold by Zilog, Inc. are covered by warranty and patent indemnification provisions appearing in Zilog, Inc. Terms and Conditions of Sale only. Zilog, Inc. makes no warranty, express, statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from intellectual property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be responsible for any errors that may appear in this document. Zilog, Inc. makes no commitment to update or keep current the information contained in this document.
Zilog's products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to such intended use is executed between the customer and Zilog prior to use. Life support devices or systems are those which are intended for surgical implantation into the body, or which sustains life whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. Zilog, Inc. 210 East Hacienda Ave. Campbell, CA 95008-6600 Telephone (408) 370-8000 FAX 408 370-8056 Internet: http://www.zilog.com
CP97TEL2800
PRELIMINARY
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Z90365 Digital Television Controller
Zilog
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PRELIMINARY
CP97TEL2800

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