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| ADVANCED LINEAR DEVICES, INC. ALD1102A/ALD1102B ALD1102 DUAL P-CHANNEL MATCHED MOSFET PAIR (c) 1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com GENERAL DESCRIPTION The ALD1102 is a monolithic dual P-channel matched transistor pair intended for a broad range of analog applications. These enhancementmode transistors are manufactured with Advanced Linear Devices' enhanced ACMOS silicon gate CMOS process. The ALD1102 offers high input impedance and negative current temperature coefficient. The transistor pair is matched for minimum offset voltage and differential thermal response, and it is designed for switching and amplifying applications in +2V to +12V systems where low input bias current, low input capacitance and fast switching speed are desired. Since these are MOSFET devices, they feature very large (almost infinite) current gain in a low frequency, or near DC operating environment. When used with an ALD1101, a dual CMOS analog switch can be constructed. In addition, the ALD1102 is intended as a building block for differential amplifier input stages, transmission gates, and multiplexer applications. The ALD1102 is suitable for use in precision applications which require very high current gain, beta, such as current mirrors and current sources. The high input impedance and the high DC current gain of the Field Effect Transistors result in extremely low current loss through the control gate. The DC current gain is limited by the gate input leakage current, which is specified at 50pA at room temperature. For example, DC beta of the device at a drain current of 5mA at 25C is = 5mA/50pA = 100,000,000. APPLICATIONS * * * * * * * * * Precision current mirrors Precision current sources Analog switches Choppers Differential amplifier input stage Voltage comparator Data converters Sample and Hold Analog inverter PIN CONFIGURATION SOURCE 1 GATE 1 DRAIN 1 NC 1 2 3 4 TOP VIEW DA, PA, SA PACKAGE 8 7 6 5 SUBSTRATE SOURCE 2 GATE 2 DRAIN 2 FEATURES * * * * * * * * Low threshold voltage of 0.7V Low input capacitance Low Vos grades -- 2mV, 5mV, 10mV High input impedance -- 1012 typical Low input and output leakage currents Negative current (IDS) temperature coefficient Enhancement-mode (normally off) DC current gain 109 BLOCK DIAGRAM ORDERING INFORMATION Operating Temperature Range* -55C to +125C 0C to +70C 0C to +70C 8-Pin CERDIP Package 8-Pin Plastic Dip Package ALD1102A PA ALD1102B PA ALD1102 PA 8-Pin SOIC Package DRAIN 1 (3) GATE 1 (2) SOURCE 1 (1) SUBSTRATE (8) DRAIN 2 (5) SOURCE 2 (7) GATE 2 (6) ALD1102 DA ALD1102 SA * Contact factory for industrial temperature range. (c) 1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com ABSOLUTE MAXIMUM RATINGS Drain-source voltage, VDS Gate-source voltage, VGS Power dissipation Operating temperature range Storage temperature range Lead temperature, 10 seconds -13.2V -13.2V 500 mW 0C to +70C -55C to +125C -65C to +150C +260C PA, SA package DA package OPERATING ELECTRICAL CHARACTERISTICS TA = 25C unless otherwise specified Parameter Gate Threshold Voltage Offset Voltage VGS1 - VGS2 Symbol VT VOS -1.3 Min -0.4 1102A Typ -0.7 Max -1.2 2 -1.3 Min -0.4 1102B Typ Max -0.7 -1.2 5 -1.3 Min -0.4 1102 Typ -0.7 Max -1.2 10 Unit V mV mV/C Test Conditions IDS = -10A VGS = V DS IDS = -100A VGS = V DS Gate Threshold TCVT Temperature Drift On Drain Current IDS (ON) -8 2 -16 4 0.5 500 180 270 -8 2 -16 4 0.5 500 180 270 -8 2 -16 4 0.5 500 180 270 mA mmho % mho VGS = VDS = -5V VDS = -5V IDS= -10mA Transconductance G fs Mismatch Output Conductance Drain Source ON Resistance Drain Source ON Resistance Mismatch Drain Source Breakdown Voltage Off Drain Current G fs G OS RDS(ON) VDS = -5V IDS = -10mA VDS = -0.1V VGS = -5V RDS(ON) 0.5 0.5 0.5 % VDS = -0.1V VGS = -5V BVDSS IDS(OFF) IGSS CISS -12 -12 -12 V IDS = -10A VGS =0V VDS =-12V VGS = 0V TA = 125C VDS =0V VGS =-12V TA = 125C 0.1 4 4 50 10 10 0.1 4 4 50 10 10 0.1 4 4 50 10 10 nA A pA nA pF Gate Leakage Current Input Capacitance 1 1 1 6 6 6 ALD1102A/ALD1102B ALD1102 Advanced Linear Devices 2 TYPICAL PERFORMANCE CHARACTERISITCS OUTPUT CHARACTERISTICS 4 LOW VOLTAGE OUTPUT CHARACTERISTICS DRAIN-SOURCE CURRENT (mA) VBS = 0V TA = 25C 2 VGS = -12V -6V -4V -2V 0 DRAIN - SOURCE CURRENT (mA) -80 -60 VBS = 0V TA = 25C VGS = -12V -10V -8V -6V -40 -20 -2 -4V -2V 0 0 -2 -4 -6 -8 -10 -12 DRAIN - SOURCE VOLTAGE (V) -4 -320 -160 0 160 320 DRAIN -SOURCE VOLTAGE (mV) FORWARD TRANSCONDUCTANCE vs. DRAIN - SOURCE VOLTAGE FORWARD TRANSCONDUCTANCE (mho) 10000 5000 2000 1000 500 200 100 0 -2 -4 -6 -8 -10 -12 TA = +25C IDS = -1mA TA = +125C TRANSFER CHARACTERISTIC WITH SUBSTRATE BIAS -20 DRAIN-SOURCE CURRENT (A) VBS = 0V f = 1KHz IDS = -5mA VBS = 0V -15 2V 4V 6V 8V 10V 12V -10 -5 VGS = VDS TA = 25C 0 0 -0.8 -1.6 -2.4 -3.2 -4.0 DRAIN - SOURCE VOLTAGE (V) GATE - SOURCE VOLTAGE (V) RDS (ON) vs. GATE - SOURCE VOLTAGE DRAIN - SOURCE ON RESISTANCE () OFF - DRAIN SOURCE CURRENT (A) 10000 VDS = 0.4V VBS = 0V 1000 TA = +125C OFF DRAIN - CURRENT vs. TEMPERATURE -10X10-6 VDS = -12V VGS = VBS = 0V -10X10-9 100 TA = +25C 10 0 -2 -4 -6 -8 -10 -12 -10X10-12 -50 -25 0 +25 +50 +75 +100 +125 GATE - SOURCE VOLTAGE (V) TEMPERATURE (C) ALD1102A/ALD1102B ALD1102 Advanced Linear Devices 3 ALD1102A/ALD1102B ALD1102 Advanced Linear Devices 4 |
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