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Bulletin I27179 22 - Sep
PIIPM15P12D007
Programmable Isolated IPM
PI-IPM Features:
Power Module:
* * NPT IGBTs 15A, 1200V 10us Short Circuit capability Square RBSOA Low Vce(on) (2.7Vtyp @ 15A, 25C) Positive Vce(on) temperature coefficient Gen III HexFred Technology Low diode VF (2.32Vtyp @ 15A, 25C) Soft reverse recovery 10m sensing resistors on all phase outputs Thermal coefficient < 50ppm/C
Package:
*
*
PIIPM - BBI (EconoPack 2 outline compatible)
Embedded driving board
* * * * * * * * * * * Programmable 40 Mips DSP Current sensing feedback from two phases Full protection from ground and line to line faults UVLO, OVLO on DCbus voltage Embedded flyback smps for floating stages (single 15Vdc @ 300mA input required) Asynchronous isolated 2.5Mbps serial port for DSP communication and/or programming Synchronous isolated 10Mbps serial port for DSP communication and/or programming IEEE standard 1149.1 (JTAG port interface) for program downloading and debugging Separated turn on / turn off outputs for IGBTs di/dt control Hall effect sensors, sin/cos and quadrature encoder interfaces 2 On board 64kbits I C EEprom
Power Module schematic:
DC+ OUT DC+ IN DC+ (signal)
IN1 IN2 IN3
BRK
Out 1 Out 2 Out 3
DC-
DC- (signal)
Input bridge, brake and three phases inverter (BBI) with current sensing resistors on all output phases and thermistor
PIIPM15P12D007 System Block Schematic:
Description
The PIIPM15P12D007 is a fully integrated Intelligent Power Module for high performances Servo Motor Driver applications. The device core is a state of the art DSP, the TMS320LF2406A at 40 Mips, interfaced with a full set of peripherals designed to handle all analog feedback and control signals needed to correctly manage the power section of the device. A 64kbits EEPROM is also available to store calibration data. The PIIPM has been designed and tailored to implement internally all functions needed to close the current, speed and position loops of a high performances servo motor driver. The use of the flash memory version of the DSP and the JTAG port connector allows the user to easily develop and download his own proprietary algorithm.
The device comes in the EMP package, fully compatible in length, width and height with the popular EconoPack 2 outline.
TM
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Pin on RS485 connector
Pin on JTAG connector
15V 15V 3.3V iso-3 15V 15V 3.3V iso-2
TD o
E M U0 PD
C AN TX
C AN R X
T ck
TM S
TR S T E M U1
AD Cin5 ; 69
AD Cin2 ; 74 A D C in1 ; 77
TCLKinB ; 89 22kHz ADCin8 ; 80 BrakeFault~ ADCin7 ; 66 ADCin6 ; 67 FaultMem~ 3.3V IOPB6-TdirA ; 11
AD Cin3 ; 72
Cap3/TdirB ; 2 , 52 DCB mon
PDPintA~ ; 6
P D P in tB ~ ; 9 5
B rake Fa ult~
Hall1
Cap5 ;56 Cap6/PWM7 ; 45 , 48 3.3V Comp
Hall2
F a ult~
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S tart / stop TD i B oo t-en~
Fault~ Fault~ FaultCLR Hin
Module connectors
5V iso
Vin iso
Hin SciTx ; 17 IOPA2 ; 16 PWM1 ; 39 PWM2 ; 37 Lin Lin
PIIPM15P12D007
JTAG/CAN interface connector
FaultCLR
Tx + Optoisolation
5V
SciRx ; 18 SpiSOMI ; 22 T3PWM ; 7 IOPE4 ; 38 3.3V Hin I2C-Data EEPROM FaultCLR Latch-reset~ DIV I2C-clock Fault~ FaultCLR Lin IOPE2 ; 43 SpiSIMO ;21 ADCin4 ; 70 IOPE3 ; 41 IOPD0 ; 15
Gate Drivers IR2214 Based Gate Drivers IR2214 Based
Tx-
Rx+
RS485 line driver
C1 G1 E1 G4 E4 C4 C2 G2 E2 G5 E5 C5
15V 15V 3.3V iso-1
RxOptoisolation
5V
DE
GND iso
SCI_Tx_en
TMS320LF2406A 40Mips
PWM3 PWM4 PWM5 PWM6
; 36 ; 33 ; 31 ; 28
SpiRXin Optoisolation
SpiCLK ; 24
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SpiTXout
SpiCKout
5V GND iso
QEP1 ; 57 QEP2 ; 55 3.3V
Gate Drivers IR2214 Based
n.c.
Th+ ThDC +
15V 3.3V
C3 G3 E3 G6 E6 C6
Embedded driving board block schematic
SinCos1/QE1
SinCos2/QE2
Homing/Direction. Counter ADCin
Lin
BrakeFault~ FaultCLR
Gate Drivers IR2214 Based
Contactor
Cap4 ; 60
DC -
CB GB EB
Hall3 - Excitation
Latch
FaultMem~
WD 85
Latch-reset~ 5V
Watchdog
RS~ 93
V in
15V 5V ref 3.3V ref 3.3V 5V
400kHz ADCin1 11kHz
R2 + R2 Current Sense & Level Shifter
5V Lin Reg
V in
15V iso-2
COM
COM
5V
15V iso-1 15V iso-2 15V iso-3
ADCin2 11kHz
Power Supply 3.3V, 5V 15V flyback
400kHz
R3 + R3 Current Sense & Level Shifter
5V Lin Reg
15V iso-3
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Signal pins on RS485 connector
Symbol Tx+ TxRxRx+ SpiCKout Vin iso GND iso SpiTXout SpiRXin SinCos1 / QE1 SinCos2 / QE2 Contactor Hall1 Hall2 Hall3 / Excitation Vin COM Lead Description RS485 Trasmitter Non inverting Driver Output RS485 Trasmitter Inverting Driver Output RS485 Receiver Inverting Driver Input RS485 Receiver Non inverting Driver Input SPI clock output (GND iso referenced) External 5V supply voltage for opto-couplers and line driver supply Extenal 5V supply ground reference for opto-couplers and line driver supply SPI transmitter output (GND iso referenced) SPI receiver input (GND iso referenced) SinCos encoder input 1 / Quadrature encoder input 1 SinCos encoder input 2 / Quadrature encoder input 2 General purpose I/O Hall effect sensor input 1 Hall effect sensor input 2 Hall effect sensor input 3 / Resolver excitation External 15V supply voltage. Internally referred to DC bus minus pin (DC -) External 15V supply ground reference. This pin is directly connected to DC State Output Output Input Input Output Input Input Output Input Input Input I/O Input Input I/O Input Input Connector pin number 1 2 3 4 5 6 7 8 10 11 12 13 14 15 16 17-18 19-20
Signal pins on IEEE1149.1 JTAG connector
CAUTION: DO NOT APPLY DC BUS VOLTAGE WHEN JTAG INTERFACE IS CONNECTED, SEVERE DAMAGE MAY OCCUR ON POWER MODULE AND ON YOUR EQUIPMENT! Symbol PD Lead Description Presence detect. Indicates that the emulation cable is connected and that the PIIPM logic is powered up. PD is tied to the DSP 3.3V supply through a 1k resistor. Homing signal / Counter direction Start/Stop signal CAN transmitter signal CAN receiver signal Emulation pin 1 Counter signal Emulation pin 0 JTAG test reset State Output Input Input Output Input I/O Output I/O Input Connector pin number 3 4 5 6 7 8 9 10 13 3
Homing / Direction Start/Stop CAN Tx CAN Rx EMU1/OFF~ Counter EMU0 TRST~ www.irf.com
PIIPM15P12D007 TMS TDO TDI TCKRET TCK Boot-En~ ADCin COM Vin
I27179 22 - Sep JTAG test mode select JTAG test data output JTAG test data input JTAG test clock return. Test clock input to the emulator. Internally short circuited to TCK. JTAG test clock. TCK is a 10MHz clock source from the emulation pod. This signal can be used to drive the system test clock. Boot ROM enable. This pin is sampled during DSP reset, pulling it low enables DSP boot ROM through SCI serial line at 40Mhz operation (Flash versions only). 47k internal pull up. General purpose analog input External 15V supply ground reference. This pin is directly connected to DC External 15V supply voltage. Internally referred to DC bus minus pin (DC-) Input Output Input Output Input Input Input input Input 14 15 16 17 18 19 20 1-11 2-12
Following pins are intended for signal communication between driving board and power module only, though here described for completeness, they are on purpose not available to the user.
Symbol DC + DC Th + Th G1/2/3 E1/2/3 R1/2/3 + R1/2/3 G4/5/6 E4/5/6 Gb Eb Brk DC Bus plus input signal DC Bus minus input signal (internally connected to COM) Thermal sensor positive input Thermal sensor negative input (internally connected to COM) Gate connections for high side IGBTs Emitter connections for high side IGBTs (Kelvin points) Output current sensing resistor positive input (IGBTs emitters 1/2/3 side, Kelvin points) Output current sensing resistor negative input (Motor side, Kelvin points) Gate connections for low side IGBTs Emitter connections for low side IGBTs (Kelvin points) Gate connections for brake IGBT Emitter connection for brake IGBT (Kelvin point) Collector connection for brake IGBT (Kelvin point) Lateral connectors on embedded driving board Lead Description Pin number
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Power Module Frame Pins Mapping
IN1
JTAG conn. Pin1 OUT1
IN2
RS485 conn.
OUT2
IN3
OUT3
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Absolute Maximum Ratings (TC=25C)
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to VDC-, all currents are defined positive into any lead. Thermal Resistance and Power Dissipation ratings are measured at still air conditions.
Symbol VDC VCES IC @ 100C IC @ 25C ICM Inverter and Brake IF @ 100C IF @ 25C IFM VGE PD @ 25C PD @ 100C VRRM VRSM Io Bridge IFSM DC Bus Voltage Collector Emitter Voltage IGBTs continuous collector current (TC = 100 C, fig. 1) IGBTs continuous collector current (TC = 25 C,fig 1) Pulsed Collector Current (Fig. 3, Fig. CT.5) Diode Continuous Forward Current (TC = 100 C) Diode Continuous Forward Current (TC = 25 C) Diode Maximum Forward Current Gate to Emitter Voltage Power Dissipation (One transistor) Power Dissipation (One transistor, TC = 100 C) repetitive peak reverse voltage (Tj = 150 C) non repetitive peak reverse voltage Tj = 150 C Irrm(max)=5mA -20 Parameter Definition Min. 0 0 Max. 1000 1200 15 30 60 15 30 60 +20 140 55 1400 1500 45 225 270 253 365 3650 -20 -5 -7 -25 -40 AC DC RMS 2500 3.5 -40 -40 -2500 +150 +125 +2500 Nm C V 20 5.5 12 +70 +125 800 1000 C V A 2s A2s A V W A Units V
V
Diode Continuous Forward Current (TC = 100 C, 120 Rect conduction angle) One-cycle forward. Non-repetitive on state surge current (t=10ms, Initial Tj = 150C) Current I2t for fusing (t=10ms, Initial Tj = 150C) 100% VRRM reapplied No voltage reapplied 100% VRRM reapplied No voltage reapplied
I2t I2t Vin Vin-iso Embedded Driving Board Rx TA--EDB TSTG-EDB VISO-CONT R485 VISO-TEMP RS485 MT Power Module TJ TSTG Vc-iso
Current I2t for fusing (t=0.1 to 10ms, no voltage reapplied, Initial Tj = 150C) Non isolated supply voltage (DC- referenced) Isolated supply voltage (GND iso referenced) RS485 Receiver input voltage (GND iso referenced) Operating Ambient Temperature Range Board Storage Temperature Range Input-Output Continuous Withstand Voltage (RH 50%, -40C TA 85C ) Input-Output Momentary Withstand Voltage (RH 50%, t = 1 min, TA = 25C) Mounting Torque Operating Junction Temperature Storage Temperature Range Isolation Voltage to Base Copper Plate
V
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Electrical Characteristics: Inverter and Brake
For proper operation the device should be used within the recommended conditions. TJ = 25C (unless otherwise specified)
Symbol V(BR)CES V(BR)CES / T Parameter Definition Collector To Emitter Breakdown Voltage Temperature Coeff. of Breakdown Voltage Min. 1200 +1.2 2.70 VCE(on) Collector To Emitter Saturation Voltage 3.74 3.14 VGE(th) VGE(th) / Tj gfe Gate Threshold Voltage Temp. Coeff. of Threshold Voltage Forward Trasconductance 8 4.68 4.89 -9.80 9 10 125 ICES Zero Gate Voltage Collector Current 376 1110 2000 VFM IGES R1/2/3 Diode Forward Voltage Drop Gate To Emitter Leakage Current Sensing Resistors 9.9 10 2.32 2.47 2.52 2.64 100 10.1 V nA m A 3.00 4.24 3.61 5.30 V mV/C S V Typ. Max. Units V V/C Test Conditions VGE = 0V, IC = 250A VGE = 0V, IC = 1mA (25 - 125 C) IC = 15A, VGE = 15V IC = 30A, VGE = 15V IC = 15A, VGE = 15V, TJ = 125 C VCE = VGE, IC = 250A VCE = VGE, IC = 1mA (25 - 125 C) VCE = 50V, IC = 15A, PW = 80s VGE = 0V, VCE = 1200V VGE = 0V, VCE = 1200V, TJ = 125 C VGE = 0V, VCE = 1200V, TJ = 150 C IC = 15A IC = 15A, TJ = 125 C VGE = 20V 8 5, 6 7, 9 10, 11 12 Fig.
Electrical Characteristics: Bridge
For proper operation the device should be used within the recommended conditions. TJ = 25C (unless otherwise specified)
Symbol VFM VF(TO) Irm Parameter Definition Forward Voltage Drop Threshold voltage Reverse Leakage Current Min. Typ. 1.24 1.08 0.78 5 Max. 1.76 1.27 Units V V mA Test Conditions tp = 400s, Ipk = 30A tp = 400s, Ipk = 15A TJ = 125 C TJ = 125 C VR = 1200V Fig. 24
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Switching Characteristics: Inverter and Brake
For proper operation the device should be used within the recommended conditions. TJ = 25C (unless otherwise specified)
Symbol Qg Qge Qgc Eon Eoff Etot Eon Eoff Etot td (on) Tr td (off) Tf Cies Coes Cres RBSOA Parameter Definition Total Gate Charge (turn on) Gate - Emitter Charge (turn on) Gate - Collector Charge (turn on) Turn on Switching Loss Turn off Switching Loss Total Switching Loss Turn on Switching Loss Turn off Switching Loss Total Switching Loss Turn on delay time Rise time Turn off delay time Fall time Input Capacitance Output Capacitance Reverse Transfer Capacitance Reverse Bias Safe Operating Area Min Typ 84 10 43 838 632 1470 1154 933 2087 98 14 132 226 1323 255 37 FULL SQUARE pF Max 127 15 64 1207 900 2107 1512 1030 2542 104 25 142 247 ns VGE = 15V, RG =10, L = 500H VCC = 30V VGE = 0V f = 1MHz TJ = 150 C, I C =60A, VGE = 15V to 0V VCC = 1000V, Vp = 1200V, RG = 5 s 711 113 36 1263 300 41 0.9 1.54 0.03 29 Pdiss Total Dissipated Power 42 81 40 W J ns A C/W C/W C/W IC = 2A, VDC = 530V, fsw = 8kHz, TC = 55 C IC = 3A, VDC = 530V, fsw = 8kHz, TC = 55 C IC = 3A, VDC = 530V, fsw = 16kHz TC = 55 C, IC = 7A, VDC = 530V, fsw = 4kHz, TC = 55C PD1 PD2 PD3 See also fig. 25, 26 25,26 TJ = 150 C, VGE = 15V to 0V VCC = 1000V, Vp= 1200V, RG = 5 TJ = 125 C IF= 15A, VCC = 600V, VGE = 15V, RG =10, L = 500H 4 CT2 CT3 WF4 17,18 19,20 21 CT4 WF3 22 J J nC Units IC = 15A VCC = 600V VGE = 15V IC = 15A, VCC = 600V, TJ = 25 C VGE = 15V, RG =10, L = 500H Tail and Diode Rev. Recovery included IC = 15A, VCC = 600V, TJ = 125 C VGE = 15V, RG =10, L = 500H Tail and Diode Rev. Recovery included IC = 15A, VCC = 600V, TJ = 125 C CT4 WF1 WF2 13, 15 CT4 WF1 WF2 14,16 CT4 WF1 WF2 Test Conditions Fig. 23 CT1
SCSOA EREC Trr Irr RthJ-C_T RthJ-C_D RthC-H
Short Circuit Safe Operating Area Diode reverse recovery energy Diode reverse recovery time Peak reverse recovery current Each IGBT to copper plate thermal resistance Each Diode to copper plate thermal resistance Module copper plate to heat sink thermal resistance. Silicon grease applied = 0.1mm
10
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Electrical Characteristics: Embedded Driving Board (EDB) communication ports
For proper operation the device should be used within the recommended conditions. Vin = 15V, Vin-iso = 5V, TA = 0 to 55C, TC = 75C (unless otherwise specified)
Symbol Vin Isupp Vin iso Iq. iso Parameter Definition EDB Input supply Voltage EDB Input Supply Current EDB isolated supply voltage EDB isolated quiescent supply current 10 Isupp. iso EDB isolated supply current 50 VDO-TX VCO-TX VDI-RX RIN-RX fMAX Differential Driver Output Voltage Driver Common mode output voltage Receiver Input Differential Threshold Voltage Receiver Input Resistance RS485 maximum data rate Logic High Input Voltage SpiRxIn Logic Low Input Voltage Logic Low Input Current 3.8 1.0 -5 0,8 SpiTxOut SpiCkOut Logic Low Output Voltage 1,2 Logic High Output Voltage TMS,TDI,TDO TCK,TRSTEMU0 EMU1/OFF~ PD VPD VBoot En~ IBoot-En~ JTAG interface pins (CAUTION: DO NOT APPLY DC BUS VOLTAGE WHEN JTAG INTERFACE IS CONNECTED, SEVER DAMAGE MAY OCCUR ON POWER MODULE AND ON YOUR EQUIPMENT!) Presence detect voltage Boot ROM enable input voltage Boot ROM enable input current Logic Low Output Voltage CAN Tx Logic High Output Voltage Logic Low Input Voltage CAN Rx Logic High Input Voltage 2.4 V 2.4 0.8 V V 2.4 Please see TMS320LF2406A datasheet from Texas Instruments and VPD specifications 3.2 3.3 3.4 0.5 - 100 0.8 V V Active low A V Iout = - 780A Iout = 860A CAN port JTAG JTAG V V Iout = -1,2mA Iout = 3mA Directly connected from DSP to connector pins. EMU0 and EMU1 with 4.7k internal pull up. IPD = -100A - 0.2 120 2.5 2 3 0.2 55 62 mA V Rload = 120 V V Mbps V V mA V Iout = -510A SPI port - 7V VCM +12V RS485 port RS485 4.5 Min. 12 Typ. 15 150 5 9 15 Max. 18 250 5.5 15 22 Units V mA V mA mA Rx+ = +5V, Rx- = 0V SPIRxIn open SPIRxIn low Rx+ = 0V, Rx- = +5V Tx+ and Tx- open SPIRxIn low Rx+ = 0V, Rx- = +5V Tx+ and Tx- on 120 VDC = 600V, fPWM = 16kHz Test Conditions Type Non isolated Suppy Conn.
Isolated supply
JTAG
JTAG
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AC Electrical Characteristics: Embedded Driving Board (EDB) DSP pins mapping
For proper operation the device should be used within the recommended conditions. Vin = 15V, Vin-iso = 5V, TA = 0 to 55C, TC = 75C (unless otherwise specified)
Symbol VDCgain VDCpole VDC-OVth VTH25C VTH100C Vin-gain Vin-pole Iph-GAIN Iph-pole Iph-LAT Iph-Zero Vce_sc ISC-DEL WD ADCin Parameter Definition DC bus voltage feedback partition coefficient DC bus voltage feedback second order filter DC bus voltage over-voltage threshold Thermal sensor voltage feedback at 25 C (Fig. TF1) Thermal sensor voltage feedback at 100 C (Fig. TF1) Input voltage feedback partition coefficient Input voltage feedback filter pole Current feedback gain Current feedback filter pole Current feedback signal delay Zero current input voltage level Vce Short Circuit Threshold detection Short Circuit detection delay time External watchdog timeout (see also RS~ signal), please see WD internal signal for more details Generic purpose analog Input Generic purpose analog input filter pole Analog input 1 for sincos resolver SinCos1/QE1 Analog input for sincos resolver filter pole QEP1: internal digital signal of QE1 High level threshold Low level threshold 0 4.13 2,4 1 2,4 1 3.3 0 4.13 0.9 0 4.13 3.3 3.3 1.62 1.65 7.4 3 6 Min. 2.39 870 2.65 1.04 125 1600 78 9.8 Typ. 2.44 22 920 2.75 1.09 128 1700 80 10.9 Max. 2.49 970 2.85 1.14 131 1800 82 12 5 1.68 Units mV/V kHz V V V mV/V Hz mV/A kHz all two phases s V V s Sec V kHz V kHz V V V kHz V V See also QEP2 internal signal QEP2 ; 55 See also QEP1 internal signal QEP1 ; 57 ADCIN06 ; 67 IOPC1 ; 85 ADCIN08 ; 80 all phases PDPINTA~ ; 6 ADCIN02: 74 ADCIN01: 77 ADCIN05 ; 69 PDPINTA~ ; 6 ADCIN04 ; 70 Test Conditions DSP name; pin N
ADCIN03 ; 72
Analog input 2 for sincos resolver SinCos2/QE2 Analog input for sincos resolver filter pole QEP2: internal digital signal of QE2 COM 3.3V Floating DSP Ground DSP 3.3V supply Not connected to anything High level threshold Low level threshold
ADCIN07;66
3, 5, 13, 14, 19, 26, 27, 29, 32, 34, 46, 53,55, 58, 63, 65, 68, 71, 73, 75, 76, 78,79, 81, 84, 90, 97 4, 10, 20, 30, 35, 47, 54, 59, 64, 91, 98 12, 23, 88, 25, 42, 44, 51
~ indicates active low signals
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Other DSP pins mapping to the connector
Symbol Hall1 Hall2 Hall3 / Excitation Contactor CAN Tx CAN Rx Signal Definition Hall effect sensor input 1 Hall effect sensor input 2 Hall effect sensor input 3 / Resolver excitation General purpose I/O CAN transmit data CAN receive data DSP name ; pin N CAP4/QEP3/IOPE7 ; 60 CAP5/QEP4/IOPF0 ; 56 PWM7/IOPE1, CAP6/IOPF1 ; 45, 48 IOPB6 ; 11 CANTX ; 50 CANRX ; 49 TDIRB/IOPF4, CAP3/IOPA5 ;2, 52 IOPF6 ; 92 BOOT_EN~ ; 86 TCLKINB ; 89 Comments Digital Input. See elec. characteristic of I/O pins Digital Input. See elec. characteristic of I/O pins Digital I/O, Output is type G3. See electrical characteristics of I/O pins Digital I/O, Output is type G3. See electrical characteristics of I/O pins Not isolated Not isolated Avoid electrical conflicts beetwen these two pins JTAG Digital Input. See elec. Characteristic of I/O pins See also EDB electrical characteristics Digital Input. See elec. Characteristics of I/O pins RS485 Connector
Homing/Direction Homing signal/ Counter direction
Start/Stop Boot En~ Counter
Start/Stop signal Boot ROM enable signal Counter signal
These signals are internal only
Symbol PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 Brake SpiTXout SpiRXout SpiCKout Ref3.3V 5V supp. Tx Rx SCI_Tx_en Latch-reset~ FaultCLR Signal Definition Out 1 high side IGBT gate drive signal Out 1 low side IGBT gate drive signal Out 2 high side IGBT gate drive signal Out 2 low side IGBT gate drive signal Out 3 high side IGBT gate drive signal Out 3 low side IGBT gate drive signal Brake IGBT gate drive signal SpiTx output SpiRx input SpiClk output 3.3V reference voltage Flash programming voltage pin SCI transmit data SCI receive data SCI transmitter enable System general fault output reset signal Gate driver fault output reset signal DSP name ; pin N PWM1; 39 PWM2 ; 37 PWM3 ; 36 PWM4 ; 33 PWM5 ; 31 PWM6 ; 28 T3PWM ; 7 SPISIMO ; 21 SPISOMI ; 22 SPICLK ; 24 VREFHI, VCCA ; 82, 83 VCCP ; 40 SCITXD ; 17 SCIRXD ; 18 IOPA2 ; 16 IOPD0 ; 15 IOPE3 ; 41 3.3V reference and supply voltage for ADC converter Supplied by the embedded flyback regulator Drives Tx+ and Tx- through the opto-isolator and the line driver Driven by Rx+ and Rx- through the opto-isolator and the line driver Enable the SCI line driver through an opto-isolator LFAULT Reset signal, to be activated via software after a fault or system boot, active low Gate driver reset, to be activated via software after a short-circuit or system boot These signal are optically isolated. See also EDB electrical characteristics Comments DSP Event Manager A output DSP Event Manager A output DSP Event Manager A output DSP Event Manager A output DSP Event Manager A output DSP Event Manager A output DSP Event Manager B output
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PIIPM15P12D007
RS~ Xtal1 PLLF1 PLLF2 FaultMem~ BrakeFault~ QEP1 QEP2
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RS~ ; 93 XTAL1 ; 87 PFFL ; 9 PLLF2 ; 8 PDPINTA~ ; 6 PDPINTB~ ; 95 QEP1 ; 57 QEP2 ; 55 Forces a DSP reset if WD signal holds too long (see also EDB electrical char.) A 10Mhz oscillator at 100ppm frequency stability feeds this pin. PLL filter for 40Mhz DSP clock frequency PLL filter for 40Mhz DSP clock frequency Activated by short circuits on output phases or brake IGBTand by DC bus over-voltage comparator. Latched signal, see also Latch-reset Activated by short circuits on brake Internal Schmitt trigger, see also AC electrical characteristic Internal Schmitt trigger, see also AC electrical characteristic WD = high impedance, external watchdog is disabled
DSP reset input signal (see also WD signal) PLL oscillator input pin PLL filter input 1 PLL filter input 2 System general fault input Brake Protection Interrupt signal Square wave of SinCos1/QE1 Square wave of SinCos2/QE2
WD
Output signal for external watchdog
IOPC1 ; 85
WD = high or WD = low, external watchdog is enabled and WD has to be periodically triggered by positive or negative transition. When the supervising system fails to retrigger the ext. watchdog within the time shown on AC electrical Characteristics, RS~ signal becomes active.
~ indicates active low signals
64kbits I2C EEprom (please see Microchip 24LC4 for more specifications)
Symbol I2C - Clock I2C - Data Signal Definition I2C - Clock I2C - Clock DSP name ; pin N IOPE2 ; 43 IOPE4 ; 38 Comments Connected to the I2C EEPROM Connected to the I2C EEPROM
Electrical characteristic of digital inputs and outputs.
Symbol Input: VIH Input: VIL Output Type G1(*) Parameter Definition Logic high,generic input voltage Logic low, generic input voltage VOH VOL Output Type G2(*) VOH VOL Output Type G3(*) VOH VOL 2.4 0.8 2.4 0.8 2.4 0.8 Min. 2.4 0.8 Typ. Max. Units V V V V V V V V Iout = 700A Iout = - 700 Iout = 850 Iout = - 850 Iout = 950 A Iout = -950 Test Conditions
Please refer to TMS320LF2406A datasheet from Texas Instruments for more specifications. www.irf.com
(*)
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Fig. 1 - Maximum DC collector Current vs. case temperature
Fig. 2 - Power Dissipation vs. Case Temperature
TC = (C) Fig. 3 - Forward SOA TC = 25C; Tj 150C
TC = (C) Fig. 4 - Reverse Bias SOA Tj = 150C, VGE = 15V
VCE = (V)
VCE = (V)
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Fig. 5 - Typical IGBT Output Characteristics Tj = - 40C; tp = 300s
Fig. 6 - Typical IGBT Output Characteristics Tj = 25C; tp = 300s
VCE = (V) Fig. 7 - Typical IGBT Output Characteristics Tj = 125C; tp = 300s
VCE = (V) Fig. 8 - Typical Diode Forward Characteristics tp = 300s
VCE = (V)
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VF = (V)
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Fig. 9 - Typical VCE vs. VGE Tj = - 40C
Fig. 10 - Typical VCE vs. VGE Tj = 25C
VGE = (V) Fig. 11 - Typical VCE vs. VGE Tj = 125C
VGE = (V) Fig. 12 - Typical Transfer Characteristics VCE = 20V; tp = 20s
VGE = (V)
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VGE = (V)
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Fig. 13 - Typical Energy Loss vs. IC Tj = 125C; L = 500H; VCE = 600V; Rg = 10; VGE = 15V
Fig. 14 - Typical Switching Time vs. IC Tj = 125C; L = 500H; VCE = 600V; Rg = 10; VGE = 15V
IC = (A) Fig. 15 - Typical Energy Loss vs. Rg Tj = 125C; L = 500H; VCE = 600V; ICE = 15A; VGE = 15V
IC = (A) Fig. 16 - Typical Switching Time vs. Rg Tj = 125C; L = 500H; VCE = 600V; ICE = 15A; VGE = 15V
Rg = ()
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Rg = ()
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Fig. 17 - Typical Diode IRR vs. IF Tj = 125C
Fig. 18 - Typical Diode IRR vs. Rg IF = 15A; Tj = 125C
IF = (A) Fig. 19 - Typical Diode IRR vs. dIF/dt VDC = 600V; VGE = 15V; IF = 15A; Tj = 125C
Rg = () Fig. 20 - Typical Diode QRR VDC = 600V; VGE = 15V; Tj = 125C
dIF/dt (A/s)
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dIF/dt (A/s)
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PIIPM15P12D007
I27179 22 - Sep
Fig. 21 - Typical Diode EREC vs. IF Tj = 125C
Fig. 22 - Typical Capacitance vs. VCE VGE = 0V; f = 1MHz
IF = (A) Fig. 23 - Typical Gate Charge vs. VGE IC = 15A; L = 600H; VCC = 600V
VCE = (V) Fig. 24 - On state Voltage Drop characteristic VFM vs IF tp = 400s
QG = (nC)
VFM = (V)
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PIIPM15P12D007
I27179 22 - Sep
Fig. 25 - Normalized Transient Thermal Impedance, Junction-to-copper plate (IGBTs)
t1, Rectangular Pulse Duration (sec) Fig. 26 - Normalized Transient Impedance, Junction-to-copper plate (FRED diodes)
t1, Rectangular Pulse Duration (sec)
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PIIPM15P12D007
I27179 22 - Sep
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PIIPM15P12D007
I27179 22 - Sep
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PIIPM15P12D007
I27179 22 - Sep
Fig. PD1 - Total Dissipated Power vs. fSW IoutRMS = 2A, VDC = 530V, TC = 55C
120
Fig. PD2 - Total Dissipated Power vs. fSW IoutRMS = 3A, VDC = 530V, TC = 55C
120
90
90
60
60
30
30
0 0 4 8 12 16 20
0 0 4 8 12 16 20
fSW = (kHz) Fig. PD3 - Total Dissipated Power vs. fSW IoutRMS = 7A, VDC = 530V, TC = 55C
fSW = (kHz) Fig. TF1 - Thermal Sensor Voltage Feedback vs. Base-plate Temperature
fSW = (kHz)
TC (C)
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PIIPM15P12D007
I27179 22 - Sep
PIIPM family part number identification
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PIIPM15P12D007
I27179 22 - Sep (top view)
Top board suggested footprint
RS485 and JTAG Connectors Top view
These connectors do not have any orientation tag; please check their Pin 1 position on Power Module Frame Pins Mapping before inserting mate part.
Molex 53916-0204 mates with 54167-0208 or 52991-0208
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PIIPM15P12D007
I27179 22 - Sep
PIIPM15P12D007 case outline and dimensions
Data and specifications subject to change without notice This product has been designed and qualified for Industrial Level. Qualification Standards can be found on IR's Web Site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 3252 7105 TAC Fax: (310) 252 7309 Visit us at www.irf.com for sales contact information 22 - Sep
Data and specifications subject to change without notice. Sales Offices, Agents and Distributors in Major Cities Throughout the World. (c) 2003 International Rectifier - Printed in Italy 09 - 22 - Rev. 3.1
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