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MITSUBISHI PM100CSE120 PM100CSE120 FLAT-BASE TYPE FLAT-BASE TYPE INSULATED PACKAGE INSULATED PACKAGE PM100CSE120 FEATURE a) Adopting new 4th generation planar IGBT chip, which performance is improved by 1m fine rule process. b) Using new Diode which is designed to get soft reverse recovery characteristics. * 3 100A, 1200V Current-sense IGBT for 15kHz switching * Monolithic gate drive & protection logic * Detection, protection & status indication circuits for overcurrent, short-circuit, over-temperature & under-voltage * Acoustic noise-less 18.5/22kW class inverter application APPLICATION General purpose inverter, servo drives and other motor controls PACKAGE OUTLINES Dimensions in mm 135 1 120.5 0.5 0.5 0.3 39.7 LABEL 4- 5.5 MOUNTING HOLES 24.1 Terminal code 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. VUPC UP VUP1 VVPC VP VVP1 VWPC WP VWP1 VNC 11. 12. 13. 14. 15. 16. VN1 NC UN VN WN FO 16.5 1 23 456 789 11 13 15 10 12 14 16 3.22 10.16 10.16 10.16 20 39.5 10.5 2.54 U 51.5 A 2-2.54 V 26 16- 95.5 0.5 110 1 2-2.54 2-2.54 2-2.54 6-2.54 67.4 74.4 20 11 13 W 3.22 4-R6 6-M5 NUTS Screwing depth Min9.0 2-2.54 0.64 26 0.64 11.6 33.7 34.7 24.1 -0.5 4 +1.0 21.3 A : DETAIL 10.6 5 P N B PPS Sep. 2001 MITSUBISHI PM100CSE120 FLAT-BASE TYPE INSULATED PACKAGE INTERNAL FUNCTIONS BLOCK DIAGRAM Rfo=1.5k WP NC Fo VNC WN VN1 VN UN VWPC VWP1 VVPC VP VVP1 VUPC UP VUP1 Rfo Gnd In Fo Vcc Gnd In Fo Vcc Gnd In Fo Vcc Gnd In Vcc Gnd In Vcc Gnd In Vcc Gnd Si Out Gnd TEMP Si Out Gnd Si Out Gnd Si Out Gnd Si Out Gnd Si Out Th NC N W V U P MAXIMUM RATINGS (Tj = 25C, unless otherwise noted) INVERTER PART Symbol VCES IC ICP PC Tj Parameter Collector-Emitter Voltage Collector Current Collector Current (Peak) Collector Dissipation Junction Temperature Condition VD = 15V, VCIN = 15V TC = 25C TC = 25C TC = 25C Ratings 1200 100 200 595 -20 ~ +150 Unit V A A W C CONTROL PART Symbol VD VCIN VFO IFO Parameter Supply Voltage Input Voltage Fault Output Supply Voltage Fault Output Current Condition Applied between : VUP1-VUPC VVP1-VVPC, VWP1-VWPC, VN1-VNC Applied between : UP-VUPC, VP-VVPC WP-VWPC, UN * VN * WN-VNC Applied between : FO-VNC Sink current at FO terminal Ratings 20 20 20 20 Unit V V V mA Sep. 2001 MITSUBISHI PM100CSE120 FLAT-BASE TYPE INSULATED PACKAGE TOTAL SYSTEM Parameter Supply Voltage Protected by VCC(PROT) OC & SC VCC(surge) Supply Voltage (Surge) Module Case Operating TC Temperature Storage Temperature Tstg Viso Isolation Voltage Symbol Condition VD = 13.5 ~ 16.5V, Inverter Part, Tj = 125C Start Applied between : P-N, Surge value or without switching (Note-1) Ratings 800 1000 -20 ~ +100 -40 ~ +125 2500 Unit V V C C Vrms 60Hz, Sinusoidal, Charged part to Base, AC 1 min. (Note-1) TC measurement point is as shown below. (Base plate depth 3mm) Tc THERMAL RESISTANCES Symbol Rth(j-c)Q Rth(j-c)F Rth(j-c')Q Rth(j-c')F Rth(c-f) Parameter Test Condition Inverter IGBT part (per 1 element), (Note-1) Inverter FWDi part (per 1 element), (Note-1) Inverter IGBT part (per 1 element), (Note-2) Inverter FWDi part (per 1 element), (Note-2) Case to fin, Thermal grease applied (per 1 module) Min. -- -- -- -- -- Limits Typ. -- -- -- -- -- Max. 0.21 0.35 0.13 0.21 0.018 Unit Junction to case Thermal Resistances Contact Thermal Resistance (Note-2) TC measurement point is just under the chips. If you use this value, Rth(f-a) should be measured just under the chips. ELECTRICAL CHARACTERISTICS (Tj = 25C, unless otherwise noted) INVERTER PART Symbol VCE(sat) VEC ton trr tc(on) toff tc(off) ICES Parameter Collector-Emitter Saturation Voltage FWDi Forward Voltage Test Condition VD = 15V, IC = 100A (Fig. 1) VCIN = 0V, Pulsed -IC = 100A, VD = 15V, VCIN = 15V VD = 15V, VCIN = 15V0V VCC = 600V, IC = 100A Tj = 125C Inductive Load (upper and lower arm) VCE = VCES, VCIN = 15V (Fig. 4) Tj = 25C Tj = 125C (Fig. 2) Min. -- -- -- 0.5 -- -- -- -- -- -- Limits Typ. 2.4 2.1 2.5 1.0 0.15 0.4 2.5 0.7 -- -- Max. 3.2 2.8 3.5 2.5 0.3 1.0 3.5 1.2 1 10 Unit V V Switching Time Collector-Emitter Cutoff Current P N B 63mm U V W C/W s (Fig. 3) Tj = 25C Tj = 125C mA Sep. 2001 MITSUBISHI PM100CSE120 FLAT-BASE TYPE INSULATED PACKAGE CONTROL PART Symbol ID Vth(on) Vth(off) OC SC toff(OC) OT OTr UV UVr IFO(H) IFO(L) tFO Parameter Circuit Current Input ON Threshold Voltage Input OFF Threshold Voltage Over Current Trip Level Short Circuit Trip Level Over Current Delay Time Over Temperature Protection Supply Circuit Under-Voltage Protection Fault Output Current Minimum Fault Output Pulse Width Test Condition VN1-VNC VXP1-VXPC Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN * VN * WN-VNC VD = 15V, VCIN = 15V VD = 15V (Fig. 5,6) Tj = 25C Tj = 125C (Fig. 5,6) (Fig. 5,6) Trip level Reset level Trip level Reset level (Note-3) (Note-3) Min. -- -- 1.2 1.7 228 145 -- -- 111 -- 11.5 -- -- -- 1.0 Limits Typ. 45 15 1.5 2.0 345 -- 340 10 118 100 12.0 12.5 -- 10 1.8 Max. 62 20 1.8 2.3 -- -- -- -- 125 -- 12.5 -- 0.01 15 -- Unit mA V A A s C V mA ms -20 Tj 125C, VD = 15V VD = 15V Base-plate Temperature detection, VD = 15V -20 Tj 125C VD = 15V, VFO = 15V VD = 15V (Note-3) Fault output Fault output Fault output Fault output is given only when the internal OC, SC, OT & UV protection. of OT protection operate by lower arm. of OC, SC protection given pulse. of OT, UV protection given pulse while over level. MECHANICAL RATINGS AND CHARACTERISTICS Symbol -- -- -- Parameter Mounting torque Mounting torque Weight Main terminal Mounting part -- Test Condition screw : M5 screw : M5 Min. 2.5 2.5 -- Limits Typ. 3.0 3.0 920 Max. 3.5 3.5 -- Unit N*m N*m g RECOMMENDED CONDITIONS FOR USE Symbol VCC VD VCIN(on) VCIN(off) fPWM tdead Parameter Supply Voltage Control Supply Voltage Input ON Voltage Input OFF Voltage PWM Input Frequency Arm Shoot-through Blocking Time Test Condition Applied across P-N terminals Applied between : VUP1-VUPC, VVP1-VVPC VWP1-VWPC, VN1-VNC (Note-4) Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN * VN * WN-VNC Using Application Circuit input signal of IPM, 3 sinusoidal PWM VVVF inverter (Fig. 8) For IPM's each input signals (Fig. 7) Recommended value 800 15 1.5 0.8 4.0 20 3.0 Unit V V V kHz s (Note-4) Allowable Ripple rating of Control Voltage : dv/dt 5V/s, 2Vp-p Sep. 2001 MITSUBISHI PM100CSE120 FLAT-BASE TYPE INSULATED PACKAGE PRECAUTIONS FOR TESTING 1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corresponding supply voltage and each input signal should be kept off state. After this, the specified ON and OFF level setting for each input signal should be done. 2. When performing "OC" and "SC" tests, the turn-off surge voltage spike at the corresponding protection operation should not be allowed to rise above VCES rating of the device. (These test should not be done by using a curve tracer or its equivalent.) P, (U,V,W) IN (Fo) IN (Fo) P, (U,V,W) VCIN (0V) V Ic VCIN (15V) V -Ic VD (all) U,V,W, (N) VD (all) U,V,W, (N) Fig. 1 VCE(sat) Test a) Lower Arm Switching P Fig. 2 VEC Test VCIN (15V) VCIN Signal input (Upper Arm) Signal input (Lower Arm) Fo trr U,V,W Irr CS VCE Ic 90% Vcc 90% N b) Upper Arm Switching VCIN Signal input (Upper Arm) Signal input (Lower Arm) VD (all) P Ic VCIN U,V,W 10% 10% tc (on) 10% tc (off) 10% CS Vcc td (on) tr td (off) tf VCIN (15V) Fo (ton= td (on) + tr) N (toff= td (off) + tf) VD (all) Ic Fig. 3 Switching time Test circuit and waveform P, (U,V,W) A IN (Fo) VCIN Pulse VCE VCIN (15V) Over Current VD (all) U,V,W, (N) IC toff (OC) Constant Current OC Fig. 4 ICES Test P, (U,V,W) IN (Fo) Short Circuit Current VCC IC Constant Current VCIN SC VD (all) U,V,W, (N) IC Fig. 5 OC and SC Test Fig. 6 OC and SC Test waveform P VD VCINP U,V,W Vcc VD VCINN N Ic VCINP 0V VCINN 0V t t tdead tdead tdead Fig. 7 Dead time measurement point example Sep. 2001 MITSUBISHI PM100CSE120 FLAT-BASE TYPE INSULATED PACKAGE 20k 10 P VUP1 Vcc OUT Si In GND GND Vcc U VD IF UP VUPC 0.1 + - VVP1 OUT Si VD VP VVPC VWP1 In GND GND Vcc V M OUT Si VD 20k WP VWPC In GND GND Vcc Fo OUT Si W IF 10 UN 0.1 In GND GND N 20k TEMP 10 Th IF Vcc VN Fo In OUT Si 0.1 20k GND GND VN1 10 Vcc Fo In OUT Si NC VD IF WN 0.1 VNC GND GND NC 5V 1k Fo Rfo : Interface which is the same as the U-phase Fig. 8 Application Example Circuit NOTES FOR STABLE AND SAFE OPERATION ; Design the PCB pattern to minimize wiring length between opto-coupler and IPM's input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. Quick opto-couplers : TPLH, TPLH 0.8s. Use High CMR type. The line between opto-coupler and intelligent module should be shortened as much as possible to minimize the floating capacitance. Slow switching opto-coupler : recommend to use at CTR = 100 ~ 200%, Input current = 8 ~ 10mA, to work in active. Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the power supply. Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N terminal. Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line and improve noise immunity of the system. * * * * * * Sep. 2001 |
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