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| UPB587B* 1.0 GHz DIVIDE- BY- 2/4/8 PRESCALER UPB587G *B VERSION FOR HI-REL APPLICATIONS ONLY FEATURES * HIGH FREQUENCY OPERATION TO 1 GHz * LOW SUPPLY VOLTAGE: 2.2 V to 3.5 V C TEST CIRCUIT VCC C * LOW SUPPLY CURRENT: 5.5 mA * AVAILABLE IN TAPE AND REEL (G08 PACKAGE) INPUT C C 1 2 3 4 8 C 7 M2 6 C 5 C C = 2200 pF M1 Re* OUTPUT Ro* DESCRIPTION The UPB587 series of devices are silicon bipolar digital prescalers which can be operated in divide-by-two, divide-byfour or divide-by-eight mode. They feature frequency response to 1 GHz, and operate from a single 3 volt supply drawing only 5.5 milliamps. The series is available in two package styles: 8 lead ceramic flat pack (UPB587B), and an 8 pin plastic mini-flat package (UPB587G). Applications include: synthesizer for DBS receiver and telecommunication applications. The low DC voltage required and power-saving current draw make them ideal for hand-held, battery-powered applications. *Re and Ro used on test circuit as indicated below. BLOCK DIAGRAM VCC1 1 VCC2 8 IN BYPASS 2 3 AMP 1/2 1/2 1/2 BUF 7 OUT 5 M1 6 M2 4 GND ELECTRICAL CHARACTERISTICS1 (TA = -20 to +75C, VCC = 2.2 to 3.5 V) PART NUMBER PACKAGE OUTLINE SYMBOLS ICC fIN PARAMETERS AND CONDITIONS Supply Current Frequency Response at PIN = -20 to 0 dBm, Divide-by-eight Divide-by-four Divide-by-two PIN = -18 to 0 dBm, Divide-by-eight Divide-by-four Divide-by-two Input Power at: fIN = 50 to 100 MHz fIN = 100 to 300 MHz, Divide-by-two fIN = 100 to 600 MHz, Ddivide-by-four fIN = 100 to 1000 MHz, Divide-by-eight UNITS mA MHz MHz MHz MHz MHz MHz dBm dBm dBm dBm VP-P C/W C/W 100 100 100 50 50 50 -18 -20 -20 -20 0.1 0.3 50 270 MIN UPB587B, UPB587G BF08, G08 TYP 5.5 MAX 7.5 1000 600 300 1000 600 300 0 0 0 0 PIN VO RTH (J-C) RTH (J-A) Output Voltage, at fIN = 0.5 GHz, PIN = -10 dBm, ZO = 200 Thermal Resistance, Junction to Case (UPB587B) Thermal Resistance, Junction to Ambient (UPB587G)2 Notes: 1. VCC1 = 2.2 V to 3.5 V, VCC2 = 2.2 to 3.5 V. 2. Mounted on a 5 x 5 x 0.16 mm epoxy glass circuit board. 3. To improve impedance match to a 50 load, a 1.2 K shunt resistor on the output line is recommended. California Eastern Laboratories UPB587B, UPB587G ABSOLUTE MAXIMUM RATINGS1 (TA = 25C) SYMBOLS PARAMETERS UNITS V V dBm W mW C C C C RATINGS -0.5 to 4.0 -0.5 to VCC + 0.5 +10 1.5 (TA = +125C) 250 (TA = +85C) -55 to +125 -40 to +85 -65 to +200 -65 to +150 VCC1, VCC2 Supply Voltage VIN, VM PIN PT Input Voltage, Ratio Control Voltage Input Power Power Dissipation UPB587B UPB587G Operating Temperature UPB587B UPB587G Storage Temperature UPB587B UPB587G RECOMMENDED OPERATING CONDITIONS SYMBOL VCC1, VCC2 TOP PARAMETER Supply Voltage Operating Temperature UNITS V C RATINGS 2.2 to 3.5 -20 to +75 TOP TSTG Note: 1. Operation in excess of any one of these parameters may result in permanent damage. Note: Because of the high internal gain and gain compression of the UPB587, this device is prone to self-oscillation in the absence of an RF input signal. If the device will be used in an application where DC power will be applied in the absence of an RF input signal, this self-oscillation can be suppressed by any of the following means: * Add a shunt resistor from the RF input line to ground. The blocking capacitor should be between the resistor and the UPB587, but physical separation should be minimized. Typically a resistor value between 50 and 100 ohms will suppress the selfoscillation. * Apply a DC offset voltage of +2.0 volts to the INPUT pin. The voltage source should be isolated from the INPUT pin by a series 1000 ohm resistor. * Apply a DC offset voltage of +1.0 volts to the BYPASS pin. The voltage source should be isolated from the BYPASS pin by a series 1000 ohm resistor. All these approaches reduce the input sensitivity of the UPB587 (by as much as 3 dB for the example of a 50 ohm shunt resistor), but otherwise have no affect on the reliability or other electrical characteristics of this device. TYPICAL PERFORMANCE CURVES (TA = 25C unless otherwise noted) FREQUENCY RESPONSE (DIVIDE-BY-2 @ TA = 25C) +10 FREQUENCY RESPONSE (DIVIDE-BY-2 @ VCC = 2.2 V) *Guaranteed Input Power, PIN (dBm) G* O W 10 0 Input Power, PIN (dBm) -10 -20 -30 VCC = 2.2 V 3.0 V 3.5 V Operating Window 0 -10 -20 -30 -40 -50 -60 G* O W TA = +75C +25C -20C -40 -50 -60 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Frequency, f (GHz) FREQUENCY RESPONSE (DIVIDE-BY-4 @ TA = 25C) +10 0 +10 Frequency, f (GHz) FREQUENCY RESPONSE (DIVIDE-BY-4 @ VCC = 2.2 V) 0 Input Power, PIN (dBm) Input Power, PIN (dBm) -10 -20 -30 -40 G* O W VCC = 2.2 V 3.0 V 3.5 V -10 -20 -30 -40 -50 -60 G* O W TA = +75C +25C -20C -50 -60 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Frequency, f (GHz) Frequency, f (GHz) UPB587B, UPB587G TYPICAL PERFORMANCE CURVES FREQUENCY RESPONSE (DIVIDE-BY-8 @ TA = 25C) +10 +10 FREQUENCY RESPONSE (DIVIDE-BY-8 @ VCC = 2.2 V) 0 0 Input Power, PIN (dBm Input Power, PIN (dBm) -10 -20 Guaranteed Operating Window -10 Guaranteed Operating Window -20 TA = +75C +25C -20C -30 -40 -50 -60 0 0.2 0.4 VCC = 2.2 V 3.0 V 3.5 V -30 -40 -50 -60 0.6 0.8 1.0 1.2 1.4 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Frequency, f (GHz) Frequency, f (GHz) UPB587G OUTPUT LEVEL vs. FREQUENCY AND Re 2.0 UPB587G OUTPUT LEVEL vs. FREQUENCY & SUPPLY VOLTAGE TA = 25C PIN = -20 dBm VCC1 = 3.0 V VCC2 = 3.0 V Division Ratio = 1/8 Ro = 200 TA = 25C PIN = -20 dBm VCC1 = VCC2 Division Ratio = 1/8 Re = 3.3 K Ro = 200 1.0 3.5V Output Level (Vpp) 1.0 1 2 3 4 5 6 0 0 500 1000 1500 Output Level (Vpp) 1. 2. 3. 4. 5. 6. Re = 680 Re = 910 Re = 1.3 K Re = 2.2 K Re = 3.3 K Re = Open Ro = Open 3.0V 0.5 2.5V 2.0V 0 0 500 1000 1500 Input Frequency (MHz) Input Frequency (MHz) UPB587G OUTPUT LEVEL vs. FREQUENCY & DIVISION RATIO 1.0 SSB PHASE NOISE vs. OFFSET FROM CARRIER fIN - 1 GHz, TA = 25C TA = 25C PIN = -20 dBm VCC1 = 3.0 V VCC2 = 3.0 V Re = 3.3 K Ro = 200 -50 Divide by eight mode -60 SSB Phase Noise (dBc/Hz) -70 -80 -90 -100 -110 -120 -130 -140 Output Level (Vpp) 1/8 0.5 1/2 1/4 0 0 500 1000 1500 -150 10 100 1K 10K 100K Input Frequency (MHz) Offset from Carrier (Hz) UPB587B, UPB587G UPB587B INPUT AND OUTPUT S-PARAMETERS VCC = 3.5 V, ICC = 5.5 mA, ZS = ZL = 50 DIVIDE-BY-2 MODE Frequency (MHz) 100 200 300 400 500 100 200 300 400 500 600 700 800 100 200 300 400 500 600 700 800 900 1000 MAG 0.039 0.052 0.069 0.087 0.103 0.039 0.052 0.069 0.086 0.102 0.119 0.135 0.150 0.039 0.052 0.069 0.086 0.102 0.119 0.135 0.150 0.164 0.181 S11 ANG -106 -109 -112 -115 -118 -106 -109 -112 -115 -118 -120 -123 -126 -106 -109 -112 -115 -118 -120 -123 -126 -128 -130 Frequency (GHz) 0.10 0.20 0.30 0.40 0.50 0.10 0.20 0.30 0.40 0.50 MAG 0.597 0.619 0.623 0.634 0.636 0.606 0.626 0.644 0.660 0.665 S22 ANG -1 -5 -8 -14 -19 -1 -2 -6 -12 -19 UPB587G INPUT AND OUTPUT S-PARAMETERS Vcc = 3.5 V, Icc = 5.5 mA, ZS = ZL = 50 DIVIDE-BY-TWO MODE * Frequency (MHz) 100 200 300 400 500 S11 MAG 0.049 0.054 0.066 0.079 0.092 ANG -107 -114 -113 -112 -111 Frequency (GHz 100 200 300 400 500 MAG 0.331 0.451 0.480 0.517 0.548 S22 ANG 9 22 16 15 13 DIVIDE-BY-4 MODE DIVIDE-BY-FOUR MODE * 100 200 300 400 500 600 700 800 0.049 0.055 0.066 0.080 0.092 0.106 0.117 0.130 -107 -111 -112 -111 -110 -109 -108 -106 100 200 300 400 500 0.377 0.410 0.508 0.565 0.599 7 23 22 17 13 DIVIDE-BY-8 MODE 0.10 0.20 0.30 0.40 0.50 0.606 0.628 0.644 0.659 0.662 0 -2 -6 -13 -19 DIVIDE-BY-EIGHT MODE * 100 200 300 400 500 600 700 800 900 1000 0.049 0.054 0.066 0.078 0.091 0.105 0.117 0.128 0.143 0.155 -107 -113 -112 -111 -110 -109 -108 -106 -105 -103 100 200 300 400 500 0.392 0.433 0.518 0.569 0.597 9 21 19 15 11 * These parameters were taken with the oscillation suppression 50 resistor on the input line. EQUIVALENT CIRCUIT INPUT BYPASS VCC1 VCC2 GND M1 M2 OUTPUT UPB587B, UPB587G OUTLINE DIMENSIONS (Units in mm) UPB587B PACKAGE OUTLINE BF08 7.00.5 1.27 1.27 1.27 0.1 0.1 0.1 1.7 MAX UPB587G PACKAGE OUTLINE G08 8 7 6 5 8 7 6 5 10.40.5 2.6 4.40.2 PIN CONNECTION 1. VCC1 2. Input 3. Bypass 4. GND 5. M1 6. M2 7. Output 8. VCC2 N 587 XXX 2 3 5.70 MAX 4 PIN CONNECTION 1. VCC1 2. 3. Bypass 4. 5. M1 6. 7. Output 8. Input GND M2 VCC2 XXX = Lot/Date Code 1 6.5 0.3 0.15 +0.10 -0.05 4.4 1.1 1.49 1.8 MAX 1 2 0.4 5.00.2 3 4 +0.05 0.2 -0.02 0.1 0.1 1.27 +0.10 0.40 -0.05 0.6 0.2 0.94 MAX PIN DESCRIPTION PIN NO. 1 2 3 4 SYMBOL VCC1 INPUT BYPASS GND DESCRIPTION Power Supply Pin of Input Amplifier and Divider Signal Input Pin Input Bypass Pin, shall be connected to ground through bypass capacitor Ground Pin Division Ratio Control1 M1 M2 Division Ratio L L 1/8 L H 1/4 H H 1/2 Output Pin Power Supply of Output Buffer Note: 1. Control Voltages: PIN 5 or 6 VM WITHOUT EXTERNAL RESISTOR HIGH VM LOW 0V VCC - 0.3 MIN VCC - 0.2 V MAX VCC + 0.5 PIN 5 or 6 R VM WITH EXTERNAL RESISTOR (R = 300 k) HIGH VM LOW MIN VCC 0V MAX VCC + 1.1 V VCC - 0.5 5 6 M1 M2 ORDERING INFORMATION PART NUMBER UPB587G-E1 QTY 2500/Reel 7 8 OUTPUT VCC2 EXCLUSIVE NORTH AMERICAN AGENT FOR RF, MICROWAVE & OPTOELECTRONIC SEMICONDUCTORS CALIFORNIA EASTERN LABORATORIES * Headquarters * 4590 Patrick Henry Drive * Santa Clara, CA 95054-1817 * (408) 988-3500 * Telex 34-6393 * FAX (408) 988-0279 24-Hour Fax-On-Demand: 800-390-3232 (U.S. and Canada only) * Internet: http://WWW.CEL.COM PRINTED IN USA ON RECYCLED PAPER -3/97 DATA SUBJECT TO CHANGE WITHOUT NOTICE |
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