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PD - 94592A
IRF6156
Ultra Low RSS(on) per Footprint Area l Low Thermal Resistance l Bi-Directional N-Channel Switch l Super Low Profile (<.8mm) l Available Tested on Tape & Reel l ESD Protection Diode Description
l
FlipFET Power MOSFET
VSS
20V
RSS(on) max
40m:@VGS1,2 = 4.5V 60m:@VGS1,2 = 2.5V
IS
6.5 5.2
True chip-scale packaging is available from International Rectifier. Through the use of advanced processing techniques and a unique packaging concept, extremely low on-resistance and the highest power densities in the industry have been made available for battery and load management applications. These benefits, combined with the ruggedized device design that International Rectifier is well known for, provide the designer with an
extremely efficient and reliable device.
The FlipFET package, is one-fifth the footprint of a comparable TSSOP-8 package and has a profile of less than .8mm. Combined with the low thermal resistance of the die level device, this makes the FlipFET the best device for applications where printed circuit board space is at a premium and in extremely thin application environments such as battery packs, mobile phones and PCMCIA cards.
Absolute Maximum Ratings
Parameter
VSS IS @ TA = 25C IS @ TA = 70C ISM PD @TA = 25C PD @TA = 70C VGS TJ TSTG Source-to-Source Voltage Continuous Current, VGS1 = VGS2 = 4.5V Continuous Current, VGS1 = VGS2 Pulsed Current
Max.
Units
V A W
e Power Dissipation e
Power Dissipation
c
e = 4.5V e
20 6.5 5.2 33 2.5 1.6 20 12 -55 to + 150
Linear Derating Factor Gate-to-Source Voltage Operating Junction and Storage Temperature Range
mW/C V C
Thermal Resistance
Parameter
RJA RJ-PCB Junction-to-Ambient Junction-to-PCB
e
Typ.
--- 35
Max.
50 ---
Units
C/W
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1
09/25/03
IRF6156
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)SSS RSS(on) VGS(th) gfs ISSS Source-to-Source Breakdown Voltage V(BR)SSS/TJ Breakdown Voltage Temp. Coefficient
Min. Typ. Max. Units
20 --- --- --- 16 27 43 --- --- --- --- 50 100 8.0 -8.0 --- --- 40 60 1.2 --- 1.0 25 --- --- 20 -20 0.5 18 2.4 6.6 --- --- --- --- --- --- --- 1.2 V pF ns nC A A nA V S A V
Conditions
VGS=0V, IS=250A,See Fig. 23a&b
Static Source-to-Source On-Resistance --- Gate Threshold Voltage Forward Transconductance Zero Gate Voltage Source Current 0.45 18 --- --- --- ---
mV/C Reference to 25C,IS=1mA,Fig.23a&b m VGS1,2 = 4.5V, IS = 6.5A Fig.11a&b VGS1,2 = 2.5V, IS = 5.2A VSS = VGS, IS
d d = 250A d Fig. 10a&b
VSS = 10V, IS = 6.5A, See Fig. 4 VSS = 20V, VGS = 0V,See Fig.23a&b VSS = 16V, VGS = 0V, TJ = 125C VSS = 4.5V, VGS = 0V, TJ = 25C VSS = 4.5V, VGS = 0V, TJ = 60C VGS = 12V, See Fig. 22 VGS = -12V VGS = 4.5V VGS = -4.5V IS = 6.5A VSS = 16V VGS = 5.0V, See Fig. 14a,b&c VSS = 10V IS = 1.0A RG = 3.0 VGS = 5.0V, See Fig. 21a,b&c VGS = 0V VSS = 15V = 1.0KHz, See Fig. 13a,b,c,d,e&f See Fig. 17a&b Iss = 2.5A
IGSS
Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage
--- ---
--- 0.20 --- --- --- --- --- --- --- --- --- --- --- 12 1.6 4.4 8.0 13 33 26 950 210 150 ---
--- -0.20 -0.5
Qg Qgs QG1-S2 td(on) tr td(off) tf Ciss Coss Crss Vssf
Total Gate Charge Gate-to-Source Charge Miller Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Source-to-Source Diode Forward Voltage, One Device On
Notes: Repetitive rating; pulse width limited by max. junction temperature. Pulse width 400s; duty cycle 2%. Gate voltage applied to both gates. When mounted on 1 inch square 2oz copper on FR-4. Figures 1, 2 and 3: One Fet is biased with VGS = 9.0V and curves show response of the second FET. See Fig.4. Figures 5, 6 and 7: G1 and G2 are shorted. See Fig.9a&b. The diode connected between the gate and source serves only as protection against ESD. No gate over voltage rating is implied.
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IRF6156
100
TOP VGS 7.0V 5.0V 4.5V 2.5V 1.8V 1.5V 1.2V 1.0V
100
TOP VGS 7.0V 5.0V 4.5V 2.5V 1.8V 1.5V 1.2V 1.0V
IS, Source-to-Source Current (A)
10
BOTTOM
IS, Source-to-Source Current (A)
10
BOTTOM
1
1.0V
0.1
1
1.0V
20s PULSE WIDTH Tj = 25C
0.01 0.1 1 10 100 1000
20s PULSE WIDTH Tj = 150C
0.1 0.1 1 10 100 1000
VSS, Source-to-Source Voltage (V)
VSS, Source-to-Source Voltage (V)
Fig 1. Typical Output Characteristics.
Fig 2. Typical Output Characteristics.
100.00
S2
IS, Source-to-Source Current ()
+
9V
T J = 25C T J = 150C
10.00
VSS = 15V 20s PULSE WIDTH
1.00 1.0 1.5 2.0 2.5
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics.
Fig 4. Output and Transfer Test Circuit.
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-
Q2 G2 Q1 G1 S1
+ -
VSS
3
IRF6156
RSS(on) , Source-to -Source On Resistance ( m)
RSS (on) , Source-to-Source On Resistance ( m)
1200
60
1000
50
800
VGS = 2.5V
40
600
400
VGS = 4.5V
30
200
ID = 6.5A
0 1.0 2.0 3.0 4.0 5.0 6.0 7.0
20 0 5 10 15 20 25 30 35
VGS, Gate -to -Source Voltage (V)
IS , Source Current (A)
Fig 5. Typical On-Resistance vs. Gate Voltage.
Fig 6. Typical On-Resistance vs. Source Current.
10 9
100000 10000
8
IGSS , Gate Current ( mA)
IGSS , Gate Current (A)
7 6 5 4 3 2
1000 100 10 1 0.1
T J = 150C
T J = 25C
1 0 0 5 10 15 20 0.01 0 5 10 15 20 25
VGS , Gate-to-Source Voltage (V)
VGS , Gate-to-Source Voltage (V)
Fig 7a. Gate-Current vs. Gate-Source Voltage
Fig 7b. Gate-Current vs. Gate-Source Voltage
4
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IRF6156
2.0
7
ID = 6.5A VGS = 4.5V
RSS(on) , Source-to-Source On Resistance
6
IS, Source Current (A)
5 4 3 2 1
1.5
(Normalized)
1.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160
0 25 50 75 100 125 150
T J , Junction Temperature (C)
T C , Case Temperature (C)
Fig 8. Normalized On-Resistance vs. Temperature.
Fig 9. Maximum Source Current vs. Case Temperature.
To Drain S1
S2
To Drain
Q1 G1 Q2
Q2
DUT
DUT
G2 Q1
G2
S2 To Source
G1
S1 To Source
Fig 10a. VGS(th) is symmetrical and can be measured when connected as shown on figure 10a.
Fig 10b. VGS(th) is symmetrical and can be measured when connected as shown on figure 10b.
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IRF6156
2.5V 4.5V
-
Q1
+
S1
2.5V 4.5V
-
Q2
+
S2
DUT
DUT
G1 Q2
G2 Q1
G2
S2
G1
S1
Fig 11a
Fig 11b
RSS(on) is symmetrical and can be measured when connected as shown in either figures 11a or 11b.
10000
VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds Crss = Cgd Coss = Cds + Cgd
SHORTED
C, Capacitance(pF)
1000
Ciss
Coss Crss
100 0 5 10 15 20
VSS, Source-to-Source Voltage (V)
Fig 12. Typical Capacitance vs. Source-to-Source Voltage.
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IRF6156
33K 4.5V
1F High Capacitance Bridge Low G1
Fig 13b Fig 13a Ciss capacitance is symmetrical and can be measured as shown either in figures 13a or 13b.
4.5V 33K S2
H
L Capacitance Bridge H
1F G1
Fig 13c Fig 13d Coss capacitance is symmetrical and can be measured as shown either in figures 13c or 13d.
4.5V 33K
Common
L Capacitance Bridge H
1F
Common
Crss capacitance is symmetrical and can be measured as shown either in figures 13e or 13f.
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+
+
+
G2 10M
S2
Low Capacitance Bridge 10M S2
33K
1F
+
16V
High 1F
16V 1F
DUT
DUT
G2 G1 + 4.5V S1 -
+
S1 33K
33K
+
DUT
G2 16V
Capacitance Bridge 1F L G2 G1
S2
33K
DUT
-
16V
S1
S1
+
33K
+ 4.5V 33K
S2
33K S2
+
DUT
G2 G1 16V
-
H Capacitance Bridge L
DUT
1F
G2 G1
16V
S1 33K
S1
+ -
+
4.5V
33K
Fig 13e
Fig 13f
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IRF6156
6.0 ID= 6.5A
VGS , Gate-to-Source Voltage (V)
5.0
4.0
VDS= 16V VDS= 10V
QG QGS VG QGD QG1-S2
3.0
2.0
1.0
Charge
0.0 0 2 4 6 8 10 12 14 Q G Total Gate Charge (nC)
Fig 14. Typical Gate Charge vs. Gate-to-Source Voltage.
Fig 14a. Basic Gate Charge Waveform.
Current Regulator +
4.5 V G2
S2
Current Regulator
Same type as DUT
+
.5F 12V 2F G2 50K G1 +
S2
Same type as DUT
+ 12V 2 F
50K .5F
G1
+
S1 16V
-
+
16V
4.5 V
S1
+
IG 3mA S2 ID
S2 4.5V
DUT
G2 G1
DUT
G2 G1 +
3mA
S1
4.5V -
S1
IG
ID
Fig 14b
Fig 14c
Gate Charge is symmetrical and can be measured as shown in either figures 14b or 14c.
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IRF6156
100 OPERATION IN THIS AREA LIMITED BY R SS(on)
IS, Source-to-Source Current (A)
100.00
100sec 10
Iss , Reverse Source Current (A)
10.00
TJ = 150C
1msec 1 TA = 25C Tj = 150C Single Pulse 0.1 1 10 VSS , Source-to-Source Voltage (V) 100
10msec
1.00 TJ = 25C VGS = 0V 0.10 0.0 0.5 1.0 1.5 2.0 2.5 Vssf , Source-to-Source Diode Forward Voltage (V)
Fig 15. Maximum Safe Operating Area.
Fig 16. Typical Source-Source Diode Forward Voltage. (See Fig.17a&b for Connection)
To Drain (-VS)
-
To Drain (-VS)
-
4.5V+
Q1 G1 Q2
S1
4.5V+
Q2 G2 Q1
S2
DUT
DUT
G2
S2 To Source
G1
S1 To Source
Fig 17a
Fig 17b
Vssf is symmetrical and can be measured when connected as shown either in figures 17a or 17b.
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IRF6156
50
1.0
40
VGS(th) Gate threshold Voltage (V)
0.8
Power (W)
30
0.6
ID = 250A
0.4
20
10
0.2
0 1.00 10.00 100.00 1000.00
0.0 -75 -50 -25 0 25 50 75 100 125 150
Time (sec)
T J , Temperature ( C )
Fig 18. Typical Power vs. Time.
Fig 19. Threshold Voltage vs. Temperature.
100
D = 0.50
Thermal Response ( Z thJA )
10
0.20 0.10 0.05
1
0.02 0.01
P DM t1
0.1
t2
SINGLE PULSE ( THERMAL RESPONSE )
0.01 1E-006 1E-005 0.0001 0.001 0.01
Notes: 1. Duty factor D = 2. Peak T t1 / t 2 +TA
J = P DM x Z thJA
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 20. Typical Effective Transient Thermal Impedance, Junction-to-Ambient.
10
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IRF6156
RS = 10ohm
4.5V
S2
S2
+
10V
6ohm VGS
G2
10V
DUT
VGS 6ohm
G2 G1
G1
DUT
S1
+
4.5V
S1
RS = 10ohm
Fig 21a
Fig 21b
Switching times are symmetrical and can be measured as shown in either figures 21a or 21b.
td(on)
tr
t d(off)
tf
VGS 10%
90% VDS
Fig 21c. Switching Time Waveforms.
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IRF6156
S1 Q1
Q2 S2
DUT
DUT
G1 Q2
G2 Q1
G2
S2
G1
S1
Fig 22a IGSS Test Connection
Fig 22b
Q1
S1
Q2
S2
DUT
DUT
G1 Q2
G2 Q1
G2
S2
G1
S1
Fig 23a
Fig 23b
ISSS and V(BR)SSS are symmetrical and can be measured when connected either as figures 23a or 23b.
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IRF6156
Bi-Directional MOSFET Pinout Outline Dimension and Tape and Reel Information
Drawing No. 01-0115
A BALL 1 LOCATION MARK PART NUMBER LOT NUMBER DATE C ODE
NOTES: 1. DIM ENSIONING & TOLERANCINGPER ASME Y14.5M -1994. 2. CONTROLLING DIMENSION: M ILLIM ETER 3. DIM ENSIONS ARE SHOW IN MILLIMETERS [INCHES]. N
0.10 [.004] C B 1.524 [.060] A 0.10 [.004] C 0.80 2X [.032] 2.324 [.092] 0.280 [.0110] 0.240 [.0094] C
0.05 [.002] C
PAD ASSIGNMENTS A1 = A2 = B1 = B2 = C1 = C2 = G1 G2 S1 S2 S1 S2
6X O
0.388 [.0153] 0.338 [.0133] CAB C
0.537 [.0211] 0.507 [.0199] 0.20 [.008] C
0.15 [.006] 0.08 [.003]
0.812 [.032] 0.752 [.029]
0.800 [.032] Gate 1 A1 Gate 2 A2
O 13"
S ource 1 B1 S ource 2 B2 0.800 [.032] 2x
S ource 1 C1
S ource 2 C2
12mm
6X O 0.25 [.010]
R E COMME NDE D F OOT PR INT
A1 B ALL L OCAT ION 12mm
4mm
F E E D DIRE CT ION
NOT E S : 1. T AP E AND RE E L OU T LINE CONF ORMS T O E IA-481 & E IA-541.
Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.09/03
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