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Global Mixed-mode Technology Inc.
G1421
2W Stereo Audio Amplifier with No Headphone Coupling Capacitor Function
Features
Depop Circuitry Integrated Output Power at 1% THD+N, VDD=5V --1.8W/CH (typical) into a 4 Load --1.2W/CH (typical) into a 8 Load Eliminates Headphone Amplifier Output Coupling Capacitors Maximum Output Power Clamping Circuitry Integrated Bridge-Tied Load (BTL), Single-Ended (SE), and Stereo Headphone Amplifier (HP-IN) modes Supported Stereo Input MUX Mute and Shutdown Control Available Surface-Mount Power Package 24-Pin TSSOP-P
General Description
G1421 is a stereo audio power amplifier in 24pin TSSOP thermal pad package. It can drive 1.8W continuous RMS power into 4 load per channel in Bridge-Tied Load (BTL) mode at 5V supply voltage. Its THD is smaller than 1% under the above operation condition. To simplify the audio system design in the notebook application, G1421 supports the Bridge-Tied Load (BTL) mode for driving the speakers, Single-End (SE) mode for driving the headphone. In the HP-IN mode, it can support a DC value to the phone-jacket and drive the headphone without the audio amplifier outputs coupling capacitors. G1421 can mute the output when Mute-In is activated. For the low current consumption applications, the SHDN mode is supported to disable G1421 when it is idle. The current consumption can be further reduced to below 5A. G1421 also supports two input paths, that means two different gain loops can be set in the same PCB and choosing either one by setting HP/ LINE pin. It enhances the hardware designing flexibility. G1421 also supports an extra function -- the maximum output power clamping function to protect the speakers or headphones from burned-out.
Applications
Stereo Power Amplifiers for Notebooks or Desktop Computers Multimedia Monitors Stereo Power Amplifiers for Portable Audio Systems
Ordering Information
ORDER NUMBER
G1421 Note: U: Tape & Reel (FD): Thermal Pad
ORDER NUMBER (Pb free)
G1421f
TEMP. RANGE
-40C to +85C
PACKAGE
TSSOP-24 (FD)
Pin Configuration
G1421
GND/HS TJ LOUT+ LLINEIN LHPIN LBYPASS LVDD SHUTDOWN MUTE OUT 1 2 3 4 5 6 7 8 9 24 23 22 21 20 19 18 17 16 15 14 13 GND/HS VOL ROUT+ RLINEIN RHPIN RBYPASS RVDD HP-IN HP/LINE ROUTSE/BTL GND/HS 14
Thermal Pad
LOUT- 10 MUTE IN 11 GND/HS 12
Top View TSSOP-24 (FD)
Bottom View
Note: Recommend connecting the Thermal Pad to the GND for excellent power dissipation.
Ver: 1.6 Aug 04, 2005
TEL: 886-3-5788833 http://www.gmt.com.tw
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Global Mixed-mode Technology Inc.
Absolute Maximum Ratings
Supply Voltage, VDD............................................6V Input Voltage, VI...........................-0.3V to VDD+0.3V Operating Ambient Temperature Range TA..................................................-40C to +85C Maximum Junction Temperature, TJ.................150C Storage Temperature Range, TSTG.......-65C to+150C Reflow Temperature (soldering, 10sec)............260C
Note:
(1) (2)
G1421
Power Dissipation (1) TA 25C..................................................2.7W TA 70C..................................................1.7W TA 85C..................................................1.4W Electrostatic Discharge, VESD Human body mode Lout- pin.........................................-8000 to 8000V Other pins.......................................-3000 to 3000(2)
: Recommended PCB Layout. : Human body model : C = 100pF, R = 1500, 3 positive pulses plus 3 negative pulses
Electrical Characteristics
DC Electrical Characteristics, TA=+25C PARAMETER SYMBOL
VDD =3.3V VDD = 5V
CONDITION
HP-IN HP-IN Stereo BTL VDD =3.3V Stereo SE Stereo BTL VDD = 5V Stereo SE VDD = 5V,Gain = 2 Stereo BTL VDD = 5V HP-IN Stereo SE VDD = 5V
MIN
-----------------------
TYP
5.5 6.5 7 3.5 8 4 5 8 6.5 4 2
MAX
11 14 13 8 16 10 50 16 14 10 5
UNIT
Supply Current
IDD
mA
DC Differential Output Voltage Supply Current in Mute Mode IDD in Shutdown
VO(DIFF) IDD(MUTE) ISD
mV mA A
(AC Operation Characteristics, VDD = 5.0V, TA=+25C, RL = 4, unless otherwise noted) PARAMETER SYMBOL CONDITION
THD = 1%, BTL, RL = 4 THD = 1%, BTL, RL = 8 THD = 10%, BTL, RL = 4 THD = 10%, BTL, RL = 8 THD = 1%, SE, RL = 4 THD = 1%, SE, RL = 8 THD = 10%, SE, RL = 4 THD = 10%, SE, RL L = 8 THD = 0.5%, SE, RL = 32 PO = 1.6W, BTL, RL = 4 PO = 1W, BTL, RL = 8 PO = 75mW, SE, RL = 32 VI = 1V, RL = 10K, G = 1 G = 1, THD =1% RL = 4, Open Load f = 120Hz f = 1kHz
MIN
-----------------------------------------------
TYP
1.8 1.12 2 1.4 500 320 650 400 90 500 150 20 10 20 60 75 85 82 80 85 2 90 55
MAX
-----------------------------------------------
UNIT
W
Output power (each channel) see Note
P(OUT)
mW
Total harmonic distortion plus noise Maximum output power bandwidth Phase margin Power supply ripple rejection Mute attenuation Channel-to-channel output separation Line/HP input separation BTL attenuation in SE mode Input impedance Signal-to-noise ratio Output noise voltage
THD+N BOM PSRR
m% kHz dB dB dB dB dB M dB V (rms)
ZI Vn PO = 500mW, BTL Output noise voltage
Note :Output power is measured at the output terminals of the IC at 1kHz.
Ver: 1.6 Aug 04, 2005
TEL: 886-3-5788833 http://www.gmt.com.tw
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Global Mixed-mode Technology Inc.
(AC Operation Characteristics, VDD = 3.3V, TA=+25C, RL = 4, unless otherwise noted) PARAMETER SYMBOL CONDITION
THD = 1%, BTL, RL = 4 THD = 1%, BTL, RL = 8 THD = 10%, BTL, RL = 4 THD = 10%, BTL, RL = 8 THD = 1%, SE, RL = 4 THD = 1%, SE, RL = 8 THD = 10%, SE, RL = 4 THD = 10%, SE, RL L = 8 THD = 0.5%, SE, RL = 32 PO = 1.6W, BTL, RL = 4 PO = 1W, BTL, RL = 8 PO = 75mW, SE, RL = 32 VI = 1V, RL = 10K, G = 1 G = 1, THD 1% RL = 4, Open Load f = 120Hz f = 1kHz
G1421
MIN
-----------------------------------------------
TYP
0.8 0.5 1 0.6 230 140 290 180 43 270 100 20 10 20 60 75 85 80 80 85 2 90 55
MAX
-----------------------------------------------
UNIT
W
Output power (each channel) see Note
P(OUT)
mW
Total harmonic distortion plus noise Maximum output power bandwidth Phase margin Power supply ripple rejection Mute attenuation Channel-to-channel output separation Line/HP input separation BTL attenuation in SE mode Input impedance Signal-to-noise ratio Output noise voltage
THD+N BOM PSRR
m% kHz dB dB dB dB dB M dB V (rms)
ZI Vn PO = 500mW, BTL Output noise voltage
Note :Output power is measured at the output terminals of the IC at 1kHz.
Ver: 1.6 Aug 04, 2005
TEL: 886-3-5788833 http://www.gmt.com.tw
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Global Mixed-mode Technology Inc.
Typical Characteristics
Table of Graphs
FIGURE
G1421
THD +N Total Harmonic Distortion Plus Noise Output Noise Voltage Supply Ripple Rejection Ratio Crosstalk Closed loop Response Supply Current
vs Output Power vs Frequency vs Frequency vs Frequency vs Frequency vs Frequency vs Supply Voltage vs Supply Voltage vs Load Resistance vs Output Power
Vn
IDD
PO Output Power PD Power Dissipation
1,3,6,9,10,13,16,19,22,25,26,27,33,36,39 2,4,5,7,8,11,12,14,15,17,18,20,21,23,24,28,29 30,31,32,34,35,37,38,40,41 42,43,44 45,46,47 48,49,50,51,52 53,54,55,56 57 58,59 60,61 62,63,64,65
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10 5
Total Harmonic Distortion Plus Noise vs Output Frequency
20kHz
2 1 0.5 % 0.2 0.1 0 .05 2 1
Po=1.8W
1kHz
%
0.5
0.2 0.1
20 Hz
Po=1.5W
0 .02 0 .01 3m
VDD=5V RL=3 BTL
20m 5 0m 1 00m W 20 0m 500 m 1 2 3
0 .05
VDD=5V RL=3 BTL Av=-2V/V
0 .02 0 .01 20
5m
10 m
50
10 0
2 00
5 00 Hz
1k
2k
5k
10 k
20k
Figure 1
Figure 2
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10 5
Total Harmonic Distortion Plus Noise vs Output Frequency
2 1 0.5 % 0.2 0.1 0 .05
20kHz
Av=-4V/V
2 1
Av=-2V/V
1kHz
%
0.5
0.2 0.1
20 Hz
0 .02 0 .01 3m
VDD=5V RL=4 BTL
20m 5 0m 1 00m W 20 0m 500 m 1 2 3
Av=-1V/V
0 .05
0 .02 0 .01 20
VDD=5V RL=4 BTL Po=1.5W
1k 2k 5k 10 k 20k
5m
10 m
50
10 0
2 00
5 00 Hz
Figure 3
Figure 4
Ver: 1.6 Aug 04, 2005
TEL: 886-3-5788833 http://www.gmt.com.tw
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Global Mixed-mode Technology Inc.
Total Harmonic Distortion Plus Noise vs Output Frequency
10 5 10
G1421
VDD=5V RL=8 BTL Av=-2V/V
Total Harmonic Distortion Plus Noise vs Output Power
5
2 1 0.5 % 0.2 0.1 0 .05
VDD=5V RL=4 BTL Av=-2V/V
Po=1.5W Po=0.25W
%
2 1 0.5
20kHz
0.2 0.1
1kHz
Po=0.75W
0 .05
0 .02 0 .01 20
0 .02 0 .01 3m
20Hz
5m 10m 20m 5 0m 1 00m W 20 0m 500 m 1 2 3
50
10 0
2 00
5 00 Hz
1k
2k
5k
10 k
20k
Figure 5
Figure 6
Total Harmonic Distortion Plus Noise vs Output Frequency
10 5 10
Total Harmonic Distortion Plus Noise vs Output Frequency
5
2 1 0.5 % 0.2 0.1 0 .05
VDD=5V RL=8 BTL Av=-2V/V Po=0.25W
Po=1W
2 1 0.5 % 0.2 0.1
VDD=5V RL=8 BTL Po=1W Av=-2V/V
Av=-4V/V
Po=0.5W
0 .05 0 .02 0 .01 20
0 .02 0 .01 20
Av=-1V/V
50 10 0 2 00 5 00 Hz 1k 2k 5k 10 k 20k
50
10 0
2 00
5 00 Hz
1k
2k
5k
10 k
20k
Figure 7
Figure 8
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10 5
Total Harmonic Distortion Plus Noise vs Output Power
20kHz
2 1 0.5 % 0.2 0.1 0 .05 2 1
20kHz
1kHz
%
0.5
1kHz
0.2 0.1
0 .02 0 .01 1m
VDD=3.3V RL=3 BTL
2m 5m 1 0m
20Hz
0 .05
VDD=3.3V RL=4 BTL
20Hz
0 .02 0 .01 1m
20 m W
50 m
10 0m
2 00 m
500 m
1
2m
5m
1 0m
20 m W
50 m
10 0m
2 00 m
500 m
1
Figure 9
Figure 10
Ver: 1.6 Aug 04, 2005
TEL: 886-3-5788833 http://www.gmt.com.tw
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Global Mixed-mode Technology Inc.
Total Harmonic Distortion Plus Noise vs Output Frequency
10 5 10 5
G1421
Total Harmonic Distortion Plus Noise vs Output Frequency
VDD=3.3V RL=4 BTL Av=-2V/V
2 1 0.5 % 0.2 0.1 0 .05
VDD=3.3V RL=4 BTL Po=0.65W
Av=-4V/V Av=-2V/V
2 1 0.5 % 0.2 0.1
Po=0.7W
Po=0.1W Po=0.35W
Av=-1V/V
0 .05
0 .02 0 .01 20
0 .02 0 .01 20
50
10 0
2 00
5 00 Hz
1k
2k
5k
10 k
20k
50
10 0
2 00
5 00 Hz
1k
2k
5k
10 k
20k
Figure 11
Figure 12
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10
Total Harmonic Distortion Plus Noise vs Output Frequency
5
2 1 0.5 % 0.2 0.1 0 .05
20kHz
VDD=3.3V RL=8 BTL
2 1 0.5
VDD=3.3V RL=8 BTL Po=0.4W Av=-2V/V
Av=-4V/V
1kHz
% 0.2 0.1 0 .05
20Hz
0 .02 0 .01 1m 0 .02 0 .01 20
Av=-1V/V
2m
5m
1 0m
20 m W
50 m
10 0m
2 00 m
500 m
1
50
10 0
2 00
5 00 Hz
1k
2k
5k
10 k
20k
Figure 13
Figure 14
Total Harmonic Distortion Plus Noise vs Output Frequency
10 5 10
Total Harmonic Distortion Plus Noise vs Output Power
5
2 1 0.5 % 0.2 0.1 0 .05
VDD=3.3V RL=8 BTL Av=-2V/V
2
VDD=5V RL=4 SE 20kHz
Po=0.4W
1 0.5
Po=0.1W
% 0.2
1kHz
0.1 0 .05
Po=0.25W
0 .02 0 .01 20
100Hz
0 .02 0 .01 1m 20k
50
10 0
2 00
5 00 Hz
1k
2k
5k
10 k
2m
5m
1 0m
20 m W
50 m
10 0m
2 00 m
500 m
1
Figure 15
Figure 16
Ver: 1.6 Aug 04, 2005
TEL: 886-3-5788833 http://www.gmt.com.tw
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Global Mixed-mode Technology Inc.
G1421
Total Harmonic Distortion Plus Noise vs Output Frequency
10 5 10
Total Harmonic Distortion Plus Noise vs Output Frequency
5
2 1 0.5 % 0.2 0.1 0 .05
VDD=5V RL=4 SE Po=0.5W Av=-2V/V
Av=-4V/V
2 1 0.5 % 0.2 0.1 0 .05
VDD=5V RL=4 SE Av=-2V/V
Po=0.4W
Po=0.1W
Av=-1V/V
Po=0.25W
0 .02 0 .01 20
0 .02 0 .01 20
50
10 0
2 00
5 00 Hz
1k
2k
5k
10 k
20k
50
10 0
2 00
5 00 Hz
1k
2k
5k
10 k
20k
Figure 17
Figure 18
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10
Total Harmonic Distortion Plus Noise vs Output Frequency
5
2 1 0.5 % 0.2 0.1 0 .05
VDD=5V RL=8 SE 20kHz
%
2 1 0.5
VDD=5V RL=8 SE Po=0.25W Av=-2V/V
0.2 0.1
1kHz 100Hz
2m 5m 1 0m 20 m W 50 m 10 0m 2 00 m 500 m 1
0 .05
Av=-4V/V Av=-1V/V
50 10 0 2 00 5 00 Hz 1k 2k 5k 10 k 20k
0 .02 0 .01 1m
0 .02 0 .01 20
Figure 19
Figure 20
Total Harmonic Distortion Plus Noise vs Output Frequency
10 5 10
Total Harmonic Distortion Plus Noise vs Output Power
5 2 1 0.5 0.2 % 0.1 0 .05 0 .02
2 1 0.5 % 0.2 0.1 0 .05
VDD=5V RL=8 SE Av=-2 Po=0.05W
VDD=5V RL=32 SE 20kHz
20Hz
Po=0.1W Po=0.25W
50 10 0 2 00 5 00 Hz 1k 2k 5k 10 k 20k
0 .01 0.0 05 0.0 02 0.0 01 1m
0 .02 0 .01 20
1kHz
2m 5m 10 m W 20 m 50m 10 0m 2 00m
Figure 21
Figure 22
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Global Mixed-mode Technology Inc.
Total Harmonic Distortion Plus Noise vs Output Frequency
10 5 2 1 0.5 0.2 % 0.1 0 .05 0 .02 0 .01 0.0 05 0.0 02 0.0 01 20 % 10
G1421
Total Harmonic Distortion Plus Noise vs Output Frequency
VDD=5V RL=32 SE Po=75mW
5 2 1
VDD=5V RL=32 SE Po=25mW
Av=-4V/V
0.5 0.2 0.1 0 .05 0 .02 0 .01 0.0 05
Av=-2V/V
Po=50mW
Av=-1V/V
0.0 02 0.0 01 20 50 10 0 2 00 5 00 Hz 1k 2k 5k 10 k 20k 50 10 0 2 00 5 00 Hz 1k 2k
Po=75mW
5k 10 k 20k
Figure 23
Figure 24
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10
Total Harmonic Distortion Plus Noise vs Output Power
5
2 1 0.5 % 0.2 0.1 0 .05
VDD=5V RL=4 HP-IN Av=-2V/V 20kHz 1kHz
2 1 0.5 % 0.2 0.1 0 .05
20kHz
VDD=5V RL=8 HP-IN Av=-2V/V
1kHz
0 .02 0 .01 1m
100Hz
2m 5m 1 0m 20 m W 50m 10 0m 2 00 m 5 00 m 1
0 .02 0 .01 1m
100Hz
2m 5m 1 0m 20 m W 50m 10 0m 2 00 m 5 00 m 1
Figure 25
Figure 26
Total Harmonic Distortion Plus Noise vs Output Power
10 5 2 1 0.5 0.2 % 0.1 0 .05 0 .02 0 .01 0 .05 0.0 05 0.0 02 0.0 01 1m % 10
Total Harmonic Distortion Plus Noise vs Output Power
5
VDD=5V RL=32 HP-IN Av=-2V/V
2 1 0.5
20kHz
VDD=5V RL=4 HP-IN Po=0.5W
Av=-4V/V
1kHz
0.2 0.1
Av=-2V/V
100Hz
0 .02 0 .01 20
Av=-1V/V
2m
5m
10m
2 0m W
50 m
1 00m
2 00m
5 00 m
50
100
2 00
5 00 Hz
1k
2k
5k
10 k
20k
Figure 27
Figure 28
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TEL: 886-3-5788833 http://www.gmt.com.tw
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Global Mixed-mode Technology Inc.
G1421
Total Harmonic Distortion Plus Noise vs Output Frequency
10 5 10
Total Harmonic Distortion Plus Noise vs Output Frequency
5
2 1 0.5 % 0.2 0.1 0 .05
VDD=5V RL=4 HP-IN Av=-2V/V
Po=0.25W
2 1 0.5 %
VDD=5V RL=8 HP-IN Po=0.25W Av=-4V/V Av=-2V/V
Po=0.1W
0.2 0.1 0 .05
0 .02 0 .01 20
Po=0.4W
50 100 2 00 5 00 Hz 1k 2k 5k 10 k 20k
0 .02 0 .01 20
Av=-1V/V
50 100 2 00 5 00 Hz 1k 2k 5k 10 k 20k
Figure 29
Figure 30
Total Harmonic Distortion Plus Noise vs Output Frequency
10 5 10
Total Harmonic Distortion Plus Noise vs Output Frequency
5 2 1
2 1 0.5 % 0.2 0.1 0 .05
VDD=5V RL=8 HP-IN Av=-2V/V
Po=0.1W
0.5 0.2 % 0.1 0 .05 0 .02
VDD=5V RL=32 HP-IN Av=-2V/V
Po=25mW
Po=50mW
Po=0.05W Po=0.25W
50 100 2 00 5 00 Hz 1k 2k 5k 10 k 20k
0 .01 0.0 05 0.0 02 0.0 01 20
0 .02 0 .01 20
Po=70mW
50 100 2 00 5 00 Hz 1k 2k 5k 10 k 20k
Figure 31
Figure 32
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10
Total Harmonic Distortion Plus Noise vs Output Frequency
5
2 1 0.5 % 0.2 0.1 0 .05
VDD=3.3V RL=4 ,SE Av=-2
20kHz
2 1 0.5 %
VDD=3.3V RL=4 SE Po=0.2W
Av=-4V/V
1kHz
0.2 0.1 0 .05
Av=-2V/V
0 .02 0 .01 1m
100Hz
2m 5m 1 0m 20 m W 50 m 10 0m 2 00 m 500 m 1
Av=-1V/V
0 .02 0 .01 20
50
10 0
2 00
5 00 Hz
1k
2k
5k
10 k
20k
Figure 33
Figure 34
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Global Mixed-mode Technology Inc.
Total Harmonic Distortion Plus Noise vs Output Frequency
10
G1421
Total Harmonic Distortion Plus Noise vs Output Power
10 5
RR
5
2 1 0.5 % 0.2 0.1 0 .05
VDD=3.3V RL=4 SE Av=-2
Po=50mW
2 1 0.5 %
VDD=3.3V RL=8 ,SE Av=-2 20kHz
Po=100mW
0.2 0.1 0 .05
1kHz
0 .02 0 .01 20
Po=150mW
50 10 0 2 00 5 00 Hz 1k 2k 5k 10 k 20k
0 .02 0 .01 1m
100Hz
2m 5m 10 m W 20 m 50m 10 0m 2 00m
Figure 35
Figure 36
Total Harmonic Distortion Plus Noise vs Output Frequency
10 5 10 5
Total Harmonic Distortion Plus Noise vs Output Frequency
VDD=3.3V RL=8 SE Po=25mW
2 1 0.5 % 0.2 0.1 0 .05
VDD=3.3V RL=8 SE Po=100mW
2 1 0.5 % 0.2
Av=-4V/V
Po=50mW
Av=-2V/V
0.1 0 .05
0 .02 0 .01 20
Av=-1V/V
50 10 0 2 00 5 00 Hz 1k 2k 5k 10 k 20k
0 .02 0 .01 20
Po=100mW
50 10 0 2 00 5 00 Hz 1k 2k 5k 10 k 20k
Figure 37
Figure 38
Total Harmonic Distortion Plus Noise vs Output Power
10 5 10
Total Harmonic Distortion Plus Noise vs Output Frequency
5 2 1 0.5
VDD=3.3V RL=32 SE
2 1 0.5 % 0.2 0.1 0 .05
1kHz
VDD=3.3V RL=32 SE Po=30mW Av=-2V/V
Av=-4V/V
20kHz
%
0.2 0.1 0 .05 0 .02 0 .01 0.0 05
20Hz
Av=-1V/V
0 .02 0 .01 1m
0.0 02 0.0 01 20
2m
5m
1 0m W
2 0m
50 m
1 00m
50
10 0
2 00
5 00 Hz
1k
2k
5k
10 k
20k
Figure 39
Figure 40
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Global Mixed-mode Technology Inc.
Total Harmonic Distortion Plus Noise vs Output Frequency
10 5 2 1 0.5 0.2 % 0.1 0 .05 0 .02 0 .01 0.0 05 0.0 02 0.0 01 20 V 10 0u
G1421
Output Noise Voltage vs Frequency
BW=22Hz to 20kHz
VDD=3.3V RL=32 SE Po=10mW
9 0u 8 0u 7 0u 6 0u 5 0u 4 0u
VDD=5V RL=4
Vo BTL
3 0u
Po=20mW
2 0u
Vo SE
Po=30mW
50 10 0 2 00 5 00 Hz 1k 2k 5k 10 k 20k 1 0u 20 50 10 0 2 00 5 00 Hz 1k 2k 5k 10 k 20k
Figure 41
Figure 42
Output Noise Voltage vs Frequency
10 0u 9 0u 8 0u 7 0u 6 0u 5 0u 4 0u V 10 0u 9 0u 8 0u 7 0u 6 0u
Output Noise Voltage vs Frequency
VDD=3.3V RL=4 BW=22Hz to 20kHz
BW=22Hz to 20kHz A- Weighted Filter VDD=5V HP-IN RL=4
5 0u 4 0u V
Vo BTL
3 0u
3 0u
2 0u
2 0u
Vo SE
1 0u 20
50
1 00
2 00
5 00 Hz
1k
2k
5k
10k
20k
1 0u 20
50
1 00
2 00
5 00 Hz
1k
2k
5k
10k
20k
Figure 43
Figure 44
Supply Ripple Rejection Ratio vs Frequency
+0 -10 -20 -30 -40 d B -50 -60 -70 -80 -90 -1 00 20 d B
Supply Ripple Rejection Ratio vs Frequency
+0
T
T
T
T
VDD=5V RL=4 CB=4.7uF
-10 -20 -30 -40 -50 -60 -70 -80 -90 -1 00 20
VDD=5V HP-IN RL=4 CB=4.7uF
BTL
SE
50
1 00
2 00
5 00 Hz
1k
2k
5k
10k
20k
50
1 00
2 00
5 00 Hz
1k
2k
5k
10k
20k
Figure 45
Figure 46
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Supply Ripple Rejection Ratio vs Frequency
+0 -10 -20 -30 -40 d B -50 -60 -70 -80 -90 -1 00 20
G1421
Crosstalk vs Frequency
T
-20
VDD=3.3V RL=4 CB=4.7uF
-25 -30 -35 -40 -45 -50 -55 d B -60 -65 -70 -75 -80 -85
VDD=5V Po=1.5W RL=4 BTL
BTL
L to R
SE
50 1 00 2 00 5 00 Hz 1k 2k 5k 10k 20k
-90 -95 -100 20
R to L
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 47
Figure 48
Crosstalk vs Frequency
-20 -25 -30 -35 -40 -45 -50 -55 d B -60 -65 -70 -75 -80 -85 -90 -95 -100 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
d B -30
Crosstalk vs Frequency
-35 -40 -45 -50 -55 -60 -65 -70 -75 -80 -85
VDD=3.3V Po=0.75W RL=4 BTL
VDD=5V Po=75mW RL=32 SE
L to R
R to L
R to L
-90 -95 -1 00 20 50 10 0 20 0 50 0 Hz 1k 2k
L to R
5k 10 k 20k
Figure 49
Figure 50
Crosstalk vs Frequency
-30 -35 -40 -45 -50 -55 -60 d B -65 -70 -75 -80 -85 -90 -95 -1 00 20 50 10 0 20 0 50 0 Hz 1k 2k -2 0
Crosstalk vs Frequency
-2 5 -3 0 -3 5 -4 0 -4 5 -5 0 -5 5
VDD=3.3V Po=35mW RL=32 SE
d B
VDD=5V Po=75mW RL=32 HP-IN
R to L
R to L
-6 0 -6 5 -7 0 -7 5 -8 0 -8 5
L to R
L to R
5k 10 k 20k
-9 0 -9 5 -10 0 20 50 100 20 0 50 0 Hz 1k 2k 5k 10 k 20 k
Figure 51
Figure 52
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G1421
Closed Loop Response
Closed Loop Response
Figure 53
Figure 54
Closed Loop Response
Closed Loop Response
Figure 55
Figure 56
Supply Current vs Supply Voltage
10 9 8 7 6 5 4 3 2 1 0 3 4 5 Supply Voltage (V) 6 0 2.5 Stereo SE Po-Output Power (W) Supply Current(mA) Stereo BTL 2 2.5
Output Power vs Supply Voltage
THD+N=1% BTL Each Channel
RL=4
1.5 RL=3 1 RL=8
0.5
3.5
4.5 Supply Voltage (V)
5.5
6.5
Figure 57
Figure 58
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Output Power vs Supply Voltage
0.7 0.6 Po-Output Power(W) 0.5 0.4 0.3 0.2 0.1 0 2.5 3.5 4.5 Supply Voltage(V) 5.5 6.5 RL=4 THD+N=1% SE Each Channel RL=8 2 1.8 1.6 Po-Output Power(W) 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 4 8 12 16 20 24 VDD=3.3V VDD=5V
G1421
THD+N=1% BTL Each Channel
Output Power vs Load Resistance
RL=32
28
32
Load Resistance()
Figure 59
Figure 60
Output Power vs Load Resistance
0.7 0.6 Po-Output Power(W) 0.5 VDD=5V 0.4 0.3 0.2 0.1 0 0 4 8 12 16 20 24 28 32 Load Resistance() THD+N=1% SE Each Channel 1.8 1.6 Power Dissipation(W) 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0
Power Dissipation vs Output Power
RL=3
RL=4 VDD=5V BTL Each Channel
RL=8
VDD=3.3V
0.5
1 1.5 Po-Output Pow er(W)
2
2.5
Figure 61
Figure 62
Power Dissipation vs Output Power
0.8 0.7 Power Dissipation(W) 0.6 0.5 0.4 0.3 0.2 0.1 0 0 0.25 0.5 Output Pow er(W) 0.75 1 RL=8 VDD=3.3V BTL Each Channel RL=4 Power Dissipation(W) RL=3 0.35 0.3 0.25 0.2
Power Dissipation vs Output Power
RL=4
RL=8 0.15 0.1 0.05 0 0 0.2 0.4 Output Pow er(W) 0.6 0.8 RL=32 VDD=5V SE Each Channel
Figure 63
Figure 64
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G1421
TSSOP-24 (FD)
Power Dissipation vs Output Power
0.16 0.14 Power Dissipation (W) 0.12 0.1 0.08 0.06 0.04 0.02 0 0 0.05 0.1 0.15 0.2 0.25 0.3 Output Pow er (W) RL=32 RL=8 RL=4 VDD=3.3V SE Each Channel
Recommended Minimum Footprint
Figure 65
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Pin Description
PIN
1,12,13,24 2
G1421
NAME
GND/HS TJ
I/O
O
FUNCTION
Ground connection for circuitry, directly connected to thermal pad. Source a current inversely to the junction temperature. This pin should be left unconnected during normal operation. For more information, see the junction temperature measurement section of this document. Left channel + output in BTL mode, + output in SE mode. Left channel line input, selected when HP/ pin is held low. Left channel headphone input, selected when HP/pin is held high. Connect to voltage divider for left channel internal mid-supply bias. Supply voltage input for left channel and for primary bias circuits. Shutdown mode control signal input, places entire IC in shutdown mode when held high, IDD = 5A. Follows MUTE IN pin, provides buffered output. Left channel - output in BTL mode, high impedance state in SE mode. Supply VDD/2 to the phone jacket in HP-IN mode. Mute control signal input, hold low for normal operation, hold high to mute. Mode control signal input, hold low for BTL mode, hold high for SE mode. Right channel - output in BTL mode, high impedance state in SE mode. MUX control input, hold high to select headphone inputs (5,20), hold low to select line inputs (4,21). This pin can activate the HP-IN mode to supplied the VDD/2 at LOUT- onto the phone jacket. So the DC blocking capacitors can be removed in HP-IN type (like SE mode except no DC blocking capacitors). Hold high to activate this function. If this function is not used, it should be strongly tied to low. Supply voltage input for right channel. Connect to voltage divider for right channel internal mid-supply bias. Right channel headphone input, selected when HP/pin is held high. Right channel line input, selected when HP/pin is held low. Right channel + output in BTL mode, + output in SE mode. The output power can be clamped by setting a low bound voltage to this pin. The high bound voltage will be generated internally. The output voltage will be clamped between high/low bound voltages. Then the output power is limited. It is weakly pull-low internally, let this pin floating or tied to GND can deactivate this function. Recommend connecting the Thermal Pad to the GND for excellent power dissipation.
3 4 5 6 7 8 9 10 11 14 15 16 17
LOUT+ LLINE IN LHP IN LBYPASS LVDD SHUTDOWN MUTE OUT LOUTMUTE IN SE/ ROUTHP/ HP-IN
O I I I I O O I I O I
18 19 20 21 22 23
RVDD RBYPASS RHP IN RLINE IN ROUT+ VOL
I I I O I
Thermal Pad
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Block Diagram
20k
G1421
21 20
RLINE IN RHPIN RIGHT MUX
_
ROUT+ ROUT-
22 15
19
RBYPASS
+ RVDD 18
11 9 8 23
MUTEIN MUTEOUT SHUTDOW N VOL
HP-IN
17 16 14 2
BIAS C IRCU ITS MODES CON TROL CIRCU ITS
HP/LINE SE/BTL TJ
LVDD
7
6
LBYPASS + LOUTLOUT+ 10 3
5 4
LHPIN LLINE IN LEFT MUX _
20k
Parameter Measurement Information
11 8 23
MUTEIN SHUTDOWN VOL
HP-IN HP/LINE SE/BTL
17 16 14
LVDD 6 CB 4.7F CI AC source RI 5 4 LHPIN LLINEIN LEFT MUX LBYPASS
7 RL 4/8/32ohm
+ _
LOUTLOUT+
10 3
RF
BTL Mode Test Circuit
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Parameter Measurement Information (Continued)
G1421
11 8 23
MUTEIN SHUTDOWN VOL
HP-IN HP/LINE SE/BTL
17 16 VDD 14
LVDD 6 CB 4.7F CI AC source RI 5 4 LHPIN LLINEIN LEFT MUX LBYPASS
7
+ _
LOUTLOUT+
10 3
RL 32ohm
RF
SE Mode Test Circuit
VDD 11 8 23 MUTEIN SHUTDOWN VOL HP-IN HP/LINE SE/BTL 17 16 14
LVDD 6 CB 4.7F CI AC source RI 5 4 LHPIN LLINEIN LEFT MUX LBYPASS
7
+ _
LOUTLOUT+
10 3 RL 32ohm
RF
HP-IN Mode (Non-DC Blocking Cap) Test Circuit
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Application Circuits
With DC blocking Capacitors Application
G1421
GND/HS TJ LOUT+
CIR RFL 20K CFR AUDIO SOURCE 1F RIR 10K
1 2 3 4 5 6 19 8 9 10 11 12
24 23 22 21 20 7
GND/HS VOL ROUT+ RLINEIN RHPIN LVDD RVDD HP-IN HP/LINE ROUTR CSR 4.7F 4.7F RIL 10K CIL RFL 1F AUDIO SOURCE 20K CFL
LLINEIN LHPIN
LBYPASS RBYPASS
4.7F
G1421
18 17 16 15 14 13
R 100K
SHUTDWON MUTE OUT LOUTMUTE IN GND/HS
COUTR 220F
SE/BTL
100K
1K
1 3 4 2
GND/HS
0.1F
PHONOJACK
COUTR 220F 1K
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Application Circuits (Continued)
No DC Blocking Capacitors Application
G1421
GND/HS TJ LOUT+
CIR RFR 20K CFR AUDIO SOURCE 1F 10K RIR
1 2 3 4 5 6 19 8 9 10 11 12
24 23 22 21 20 7
GND/HS VOL ROUT+ RLINEIN RHPIN LVDD RVDD HP-IN HP/LINE ROUTSE/BTL GND/HS
1 2 3 4 5
LLINEIN
RIL 10K
CIL 1F AUDIO SOURCE
RFL 20K
CFL
LHPIN LBYPASS
CBL 4.7F
RC 4.7 CC 0.1F
RBYPASS SHUTDWON MUTE OUT LOUTMUTE IN
G1421
18 17 16 15 14 13
4.7F 4.7F
RC 4.7 CC 0.1F
GND/HS
PHONOJACK
Logical Truth Table INPUTS HP-IN
X X X High Low Low Low Low High High
SE/ BTL
X Low High X Low Low High High X X
HP/ LINE
X X X X Low High Low High Low High
Mute In Shutdown
---High High High Low Low Low Low Low Low High ---------Low Low Low Low Low Low
OUTPUT Mute Out
---High High High Low Low Low Low Low Low
Input
X X X X L/R Line L/R HP L/R Line L/R HP L/R Line L/R HP
AMPLIFIER STATES L/R Out+ L Out- R Out---VDD/2 VDD/2 VDD/2 BTL Output BTL Output SE Output SE Output SE Output SE Output ---VDD/2 ---VDD/2 BTL Output BTL Output ------VDD/2 VDD/2 ---VDD/2 ------BTL Output BTL Output -------------
Mode
Mute Mute Mute Mute BTL BTL SE SE HP-IN HP-IN
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Application Information
Input MUX Operation There are two input signal paths - HP & Line. With the prompt setting, G1421 allows the setting of different gains for BTL and SE modes. Generally, speakers typically require approximately a factor of 10 more gain for similar volume listening levels as compared with headphones.
SE Gain(HP) = -(RF(HP)/RI(HP)) -2(RF(LINE)/RI(LINE))
fc -3 dB
G1421
BTL Gain(LINE) =
To achieve headphones and speakers listening parity, (RF(LINE/RI(LINE)) is suggested to be 5 times of (RF(HP)/ RI(HP)). The ratio of (RF(HP)/RI(HP)) can be determined by the applications. When the optimum distortion performance into the headphones (clear sound) is important, gain of -1 ((RF(HP) / RI(HP)) = 1) is suggested.
Figure B
Bridged-Tied Load Mode Operation G1421 has two linear amplifiers to drive both ends of the speaker load in Bridged-Tied Load (BTL) mode operation. Figure C shows the BTL configuration. The differential driving to the speaker load means that when one side is slewing up, the other side is slewing down, and vice versa. This configuration in effect will double the voltage swing on the load as compared to a ground reference load. In BTL mode, the peak-to-peak voltage VO(PP) on the load will be two times than a ground reference configuration. The voltage on the load is doubled, this will also yield 4 times output power on the load at the same power supply rail and loading. Another benefit of using differential driving configuration is that BTL operation cancels the dc offsets, which eliminates the dc coupling capacitor that is needed to cancelled dc offsets in the ground reference configuration. Low-frequency performance is then limited only by the input network and speaker responses. Cost and PCB space can be minimized by eliminating the dc coupling capacitors.
VDD
Single Ended Mode Operation G1421 can drive clean, low distortion SE output power into headphone loads (generally 16 or 32) as in Figure A. Please refer to Electrical Characteristics to see the performances. A coupling capacitor is needed to block the dc offset voltage, allowing pure ac signals into headphone loads. Choosing the coupling capacitor will also determine the 3 dB point of the high-pass filter network, as Figure B.
fC=1/(2RLCC) For example, a 68uF capacitor with 32 headphone load would attenuate low frequency performance below 73Hz. So the coupling capacitor should be well chosen to achieve the excellent bass performance when in SE mode operation.
VDD
Vo(PP)
Vo(PP) RL 2xVo(PP) -Vo(PP)
CC RL Vo(PP)
VDD
Figure A
Figure C
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HP-IN Mode Operation An internal weakly pull-up circuit is connected to HP-IN control pin (pin 17). When this pin is left unconnected or tied to VDD, HP-IN mode is activated, ignoring SE/ BTL setting. In normal SE/ BTL mode operations, this HP-IN pin should be tied to GND. In HP-IN mode, the linear amplifiers of LOUT+ (pin 3) /ROUT+ (pin 22) are still alive, the linear amplifier of ROUT- (pin 15) is deactivated, the linear amplifier of LOUT- (pin 10) supplies VDD/2 on this pin to cancel the dc offsets. (Please refer to Logical Truth Table and No DC CAP Application Circuit for detailed operation.) If connected VDD/2 on the LOUT- (pin 10) to the phone jacket, the dc offset can be eliminated without using coupling capacitors in headphone applications. By using HP-IN mode, cost and PCB space can be further minimized than traditional headphone applications with coupling capacitors. The HP-IN configuration is shown on Figure D.
G1421
MUTE and SHUTDOWN Mode Operations G1421 implements the mute and shutdown mode operations to reduce supply current, IDD, to the absolute minimum level during nonuse periods for battery-power conservation. When the shutdown pin (pin 8) is pulled high, all linear amplifiers will be deactivated to mute the amplifier outputs. And G1421 enters an extra low current consumption state, IDD is smaller than 5A. If pulling mute-in pin (pin 11) high, it will force the activated linear amplifier to supply the VDD/2 dc voltage on the output to mute the AC performance. In mute mode operation, the current consumption will be a little different between BTL, SE and HP-IN modes. (SE < HP-IN < BTL) Typically, the supply current is about 2.5mA in BTL mute operation. Shutdown and Mute-In pins should never be left unconnected, this floating condition will cause the amplifier operations unpredictable. Maximum Power Clampping Function
G1421 supports the maximum output power clamping function to avoid damaging the speaker when the amplifier output a power beyond the speaker tolerance. The Vol pin (pin 23) is weakly pull-low internally. If inputting a non-zero voltage (low boundary voltage) to the Vol pin, G1421 will generate a high boundary voltage which the difference between the VDD/2 and the high boundary voltage is the same as the difference between the VDD/2 and the low boundary voltage. ( i.e. VOH - VDD/2 = VDD/2 - VOL ) Then the outputs of linear amplifiers will be effectively limited between the high/low boundary voltage, the maximum output power is clamped. By setting the voltage of Vol, the maximum output power can be well controlled. When the maximum power clamping function is not used, the Vol pin should be floated or tied to GND.
VDD
Vo(PP)+VDD/2 RL VDD/2 VDD/2 Vo(PP)
Figure D
Short circuit protection is implemented on LOUT(pin10) to avoid the short-circuit damage caused by the sleeve of the phone jack connected to ground accidentally during the module assembling. When short-circuit is detected, the linear amplifier of LOUT(pin 10) will turn off for a period. After this period, it activates again. If the short circuit condition still exists, it will be turned off again. With this protection, the damage caused by larger dc short circuit current (from VDD/2 to GND) can be avoided.
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Optimizing DEPOP Operation
G1421
Junction Temperature Measurement
Circuitry has been implemented in G1421 to minimize the amount of popping heard at power-up and when coming out of shutdown mode. Popping occurs whenever a voltage step is applied to the speaker and making the differential voltage generated at the two ends of the speaker. To avoid the popping heard, the bypass capacitor should be chosen promptly, 1/(CBx100k) 1/(CI*(RI+RF)). Where 100k is the output impedance of the mid-rail generator, CB is the mid-rail bypass capacitor, CI is the input coupling capacitor, RI is the input impedance, RF is the gain setting impedance which is on the feedback path. CB is the most important capacitor. Besides it is used to reduce the popping, CB can also determine the rate at which the amplifier starts up during startup or recovery from shutdown mode. De-popping circuitry of G1421 is shown on Figure E. The PNP transistor limits the voltage drop across the 50k by slewing the internal node slowly when power is applied. At start-up, the voltage at BYPASS capacitor is 0. The PNP is ON to pull the mid-point of the bias circuit down. So the capacitor sees a lower effective voltage, and thus the charging is slower. This appears as a linear ramp (while the PNP transistor is conducting), followed by the expected exponential ramp of an R-C circuit.
VDD 100 k 50 k Bypass 100 k
Characterizing a PCB layout with respect to thermal impedance is very difficult, as it is usually impossible to know the junction temperature of the IC. G1421 TJ (pin 2) sources a current inversely proportional to the junction temperature. Typically TJ sources-120A for a 5V supply at 25C. And the slope is approximately 0.22A/C. As the resistors have a tolerance of 20%, these values should be calibrated on each device. When the temperature sensing function is not used, TJ pin can be left floating or tied to VDD to reduce the current consumption. Temperature sensing circuit is shown on Figure F.
VDD
R
R 5R TJ
Figure F
Figure E
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Package Information
D 24 D1 E1 E
C
G1421
L
E2
1
Note 5
A2 A1 e b
A
TSSOP-24(FD) Package
NOTE: 1. Package body sizes exclude mold flash protrusions or gate burrs 2. Tolerance 0.1mm unless otherwise specified 3. Coplanarity : 0.1mm 4. Controlling dimension is millimeter. Converted inch dimensions are not necessarily exact. 5. Die pad exposure size is according to lead frame design. 6. Follow JEDEC MO-153
SYMBOLS
A A1 A2 b C D D1 E E1 E2 e L
MIN
----0.00 0.80 0.19 0.20 7.7 4.4 4.30 2.7 0.45 0
DIMENSION IN MM NOM
--------1.00 --------7.8 ----6.40 BSC 4.40 ----0.65 BSC 0.60 -----
MAX
1.20 0.15 1.05 0.30 ----7.9 4.9 4.50 3.2 0.75 8
MIN
----0.000 0.031 0.007 0.008 0.303 0.173 0.169 0.106 0.018 0
DIMENSION IN INCH NOM
--------0.039 --------0.307 ----0.252 BSC 0.173 ----0.026 BSC 0.024 -----
MAX
0.047 0.006 0.041 0.012 ----0.311 0.193 0.177 0.126 0.030 8
Taping Specification
PACKAGE
TSSOP-24 (FD)
Q'TY/REEL
2,500 ea
Feed Direction Typical TSSOP Package Orientation
GMT Inc. does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and GMT Inc. reserves the right at any time without notice to change said circuitry and specifications.
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