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| NTD32N06L Power MOSFET 32 Amps, 60 Volts, Logic Level N-Channel DPAK Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls and bridge circuits. Features http://onsemi.com VDSS 60 V RDS(ON) TYP 23.7 mW N-Channel D ID MAX 32 A * * * * * * * * * Smaller Package than MTB30N06VL Lower RDS(on), VDS(on), and Total Gate Charge Lower and Tighter VSD Lower Diode Reverse Recovery Time Lower Reverse Recovery Stored Charge Power Supplies Converters Power Motor Controls Bridge Circuits Typical Applications G S 4 Value 60 60 "20 "30 32 22 90 93.75 0.625 2.88 1.5 -55 to +175 313 Unit Vdc Vdc Vdc 12 3 DPAK CASE 369C (Surface Mount) Style 2 4 YWW 32N06L 2 1 3 Drain Gate Source 4 Drain 2 YWW 32N06L 123 Gate Drain Source Package DPAK DPAK Straight Lead DPAK Shipping 75 Units/Rail 75 Units/Rail 2500/Tape & Reel Publication Order Number: NTD32N06L/D 1 MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Drain-to-Source Voltage Drain-to-Gate Voltage (RGS = 10 MW) Gate-to-Source Voltage - Continuous - Non-Repetitive (tpv10 ms) Drain Current - Continuous @ TA = 25C - Continuous @ TA = 100C - Single Pulse (tpv10 ms) Total Power Dissipation @ TA = 25C Derate above 25C Total Power Dissipation @ TA = 25C (Note 1) Total Power Dissipation @ TA = 25C (Note 2) Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25C (Note 3) (VDD = 50 Vdc, VGS = 5 Vdc, L = 1.0 mH, IL(pk) = 25 A, VDS = 60 Vdc, RG = 25 W) Thermal Resistance - Junction-to-Case - Junction-to-Ambient (Note 1) - Junction-to-Ambient (Note 2) Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds Symbol VDSS VDGR VGS VGS ID ID IDM PD MARKING DIAGRAMS 4 Drain Adc Apk W W/C W W C mJ TJ, Tstg EAS 3 DPAK CASE 369D (Straight Lead) Style 2 32N06L Y WW Device Code = Year = Work Week C/W RqJC RqJA RqJA TL 1.6 52 100 260 C ORDERING INFORMATION Device NTD32N06L NTD32N06L-1 NTD32N06LT4 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. When surface mounted to FR4 board using 0.5 pad size. 2. When surface mounted to FR4 board using minimum recommended pad size. 3. Repetitive rating; pulse width limited by maximum junction temperature. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. (c) Semiconductor Components Industries, LLC, 2004 1 April, 2004 - Rev. 3 NTD32N06L ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (Note 4) (VGS = 0 Vdc, ID = 250 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 60 Vdc, VGS = 0 Vdc) (VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150C) Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS (Note 4) Gate Threshold Voltage (Note 4) (VDS = VGS, ID = 250 mAdc) Threshold Temperature Coefficient (Negative) Static Drain-to-Source On-Resistance (Note 4) (VGS = 5 Vdc, ID = 16 Adc) Static Drain-to-Source On-Resistance (Note 4) (VGS = 5 Vdc, ID = 20 Adc) (VGS = 5 Vdc, ID = 32 Adc) (VGS = 5 Vdc, ID = 16 Adc, TJ = 150C) Forward Transconductance (Note 4) (VDS = 6 Vdc, ID = 16 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Note 5) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Charge (VDS = 48 Vdc, ID = 32 Adc, VGS = 5 Vdc) (Note 4) SOURCE-DRAIN DIODE CHARACTERISTICS Forward On-Voltage (IS = 20 Adc, VGS = 0 Vdc) (Note 4) (IS = 32 Adc, VGS = 0 Vdc) (Note 4) (IS = 20 Adc, VGS = 0 Vdc, TJ = 150C) (IS = 32 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms) (Note 4) Reverse Recovery Stored Charge 4. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%. 5. Switching characteristics are independent of operating junction temperatures. VSD - - - - - - - 0.89 0.95 0.74 56 31 25 0.093 1.0 - - - - - - mC Vdc (VDD = 30 Vdc, ID = 32 Adc, VGS = 5 Vdc, Vdc ) (Note 4) ) RG = 9.1 W) ( td(on) tr td(off) tf QT Q1 Q2 - - - - - - - 12.8 221 37 128 23 4.5 14 30 450 80 260 50 - - nC ns (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Ciss Coss Crss - - - 1214 343 87 1700 480 180 pF VGS(th) 1.0 - RDS(on) - VDS(on) - - - gFS - 0.48 0.78 0.61 27 0.67 - - - mhos 23.7 28 Vdc 1.7 4.8 2.0 - Vdc mV/C mW V(BR)DSS 60 - IDSS - - IGSS - - - - 1.0 10 100 nAdc 70 62 - - Vdc mV/C mAdc Symbol Min Typ Max Unit Reverse Recovery Time trr ta tb QRR ns http://onsemi.com 2 NTD32N06L 60 VGS = 10 V ID, DRAIN CURRENT (AMPS) 50 40 30 20 10 0 VGS = 6 V VGS = 3.5 V VGS = 8 V VGS = 3 V VGS = 5 V VGS = 4 V ID, DRAIN CURRENT (AMPS) VGS = 4.5 V 60 VDS > = 10 V 50 40 30 20 TJ = 25C 10 TJ = 100C 0 1 2 3 4 0 1.8 2.2 2.6 3 TJ = -55C 3.4 3.8 4.2 4.6 5 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.042 VGS = 5 V 0.038 0.034 0.03 0.026 0.022 0.018 0.014 0.01 0 10 20 30 40 50 60 TJ = -55C TJ = 25C TJ = 100C 0.042 0.038 0.034 0.03 0.026 0.022 0.018 0.014 0.01 0 10 20 TJ = -55C TJ = 100C TJ = 25C VGS = 10 V 30 40 50 60 ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) Figure 3. On-Resistance vs. Drain Current RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) Figure 4. On-Resistance vs. Drain Current 1.8 1.6 1.4 1.2 1 0.8 0.6 -50 -25 ID = 16 A VGS = 5 V 10000 VGS = 0 V TJ = 150C IDSS, LEAKAGE (nA) 1000 TJ = 125C 100 TJ = 100C 10 0 25 50 75 100 125 150 175 0 10 20 30 40 50 60 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Voltage http://onsemi.com 3 NTD32N06L VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 4000 3600 C, CAPACITANCE (pF) 3200 2800 2400 2000 1600 1200 800 400 0 10 VDS = 0 V VGS = 0 V 6 5 4 3 2 1 0 0 ID = 32 A TJ = 25C 4 8 12 16 20 24 Q1 QT VGS Q2 TJ = 25C Ciss Crss Ciss Coss Crss 5 VGS 0 VDS 5 10 15 20 25 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation 1000 IS, SOURCE CURRENT (AMPS) VDS = 30 V ID = 32 A VGS = 5 V t, TIME (ns) tr 100 tf 32 28 24 20 16 12 8 4 0 0.6 Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge VGS = 0 V TJ = 25C td(off) td(on) 10 1 10 RG, GATE RESISTANCE (W) 100 0.64 0.68 0.72 0.76 0.8 0.84 0.88 0.92 0.96 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation vs. Gate Resistance EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 1000 ID, DRAIN CURRENT (AMPS) VGS = 20 V SINGLE PULSE TC = 25C 100 dc 10 10 ms 1 ms 100 ms 1 Mounted on 3 sq. FR4 board (1 sq. 2 oz. Cu 0.06 thick single sided) with one die operating,10 s max 0.1 0.1 1 10 100 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) RDS(on) Limit Thermal Limit Package Limit 350 Figure 10. Diode Forward Voltage vs. Current ID = 32 A 300 250 200 150 100 50 0 25 50 75 100 125 150 175 TJ, STARTING JUNCTION TEMPERATURE (C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 4 NTD32N06L 10 EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) Normalized to RqJC at Steady State 1 0.1 r(t), 0.01 0.00001 0.0001 0.001 0.01 t, TIME (s) 0.1 1 10 Figure 13. Thermal Response 10 EFFECTIVE TRANSIENT THERMAL RESPONSE (NORMALIZED) r(t), Normalized to RqJA at Steady State, 1 square Cu Pad, Cu Area 1.127 in2, 3 x 3 inch FR4 board 1 0.1 0.01 0.00001 0.0001 0.001 0.01 0.1 t, TIME (s) 1 10 100 1000 Figure 14. Thermal Response http://onsemi.com 5 NTD32N06L PACKAGE DIMENSIONS DPAK-3 CASE 369C-01 ISSUE O -T- B V R 4 SEATING PLANE C E DIM A B C D E F G H J K L R S U V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.090 BSC 0.180 0.215 0.025 0.040 0.020 --- 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 4.58 BSC 0.87 1.01 0.46 0.58 2.60 2.89 2.29 BSC 4.57 5.45 0.63 1.01 0.51 --- 0.89 1.27 3.93 --- A S 1 2 3 Z U K F L D G 2 PL J H 0.13 (0.005) M T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT 6.20 0.244 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 3.0 0.118 SCALE 3:1 mm inches http://onsemi.com 6 NTD32N06L PACKAGE DIMENSIONS B V R 4 C E DPAK-3 CASE 369D-01 ISSUE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 --- Z A 3 S -T- SEATING PLANE 1 2 K F D G 3 PL J H 0.13 (0.005) M DIM A B C D E F G H J K R S V Z T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN http://onsemi.com 7 NTD32N06L ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 8 NTD32N06L/D |
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