View MIC2584_700057.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MIC2584/2585
Micrel
MIC2584/MIC2585
Dual-Channel Hot Swap Controller/Sequencer
General Description
The MIC2584 and MIC2585 are dual-channel positive voltage hot swap controllers designed to facilitate the safe insertion of boards into live system backplanes. The MIC2584 and MIC2585 are available in 16-pin and 24-pin TSSOP packages, respectively. Using a few external discrete components and by controlling the gate drives of external NChannel MOSFET devices, the MIC2584/85 provides inrush current limiting and output voltage slew rate control in harsh, critical power supply environments. Additionally, the MIC2585 provides output turn-on sequencing and output tracking during turn-on and turn-off. In combination, the devices' many features provide a simplified, robust solution for many network applications to meet the power sequencing and protection requirements of multiple-voltage logic systems.
Features
* 1.0V to 13.2V supply voltage operation * Surge voltage protection up to 20V * Current regulation limits inrush current regardless of load capacitance * Programmable inrush current limiting * Electronic circuit breaker * Dual-level overcurrent fault sensing eliminates false tripping * Fast response to short circuit conditions (< 1s) * Two sequenced output mode selections (MIC2585 only) * 250mV supply tracking mode during turn-on/turn-off (MIC2585 only) * Overvoltage and undervoltage output monitoring (Overvoltage for MIC2585 only) * Undervoltage lockout protection * /FAULT status output * Power-On Reset and Power-Good status output (Power-Good for MIC2585 only)
Applications
* * * * * RAID systems Network servers Base stations Network switches Hot-board insertion
Ordering Information
Standard Part Number Pb-Free MIC2584-xYTS MIC2585-1xYTS MIC2585-2xYTS Output Sequencing N/A OUT2 follows OUT1 OUT1 follows OUT2 Fast Circuit Breaker Threshold x = J, 100mV x = K, 150mV * x = L, 200mV * x = M, Off * Package 16-pin TSSOP 24-pin TSSOP
MIC2584-xBTS MIC2585-1xBTS MIC2585-2xBTS
* Contact Micrel for availability.
Micrel, Inc. * 2180 Fortune Drive * San Jose, CA 95131 * USA * tel + 1 (408) 944-0800 * fax + 1 (408) 474-1000 * http://www.micrel.com
March 2005
1
MIC2584/2585
MIC2584/2585
Micrel
Typical Application
BACKPLANE PCB EDGE CONNECTOR CONNECTOR VCC1 12V D1 **BZX84Cxx R1 10 C1 0.47F RSENSE2 0.020
1
RSENSE1 0.006
1 3 2 4
Q1 Si7892DP (PowerPAKTM SO-8) CLOAD1 330F R14 Q2 10.7k Si7892DP 1% (PowerPAKTM SO-8)
VOUT1 12V 6A
VCC2 3.3V D2
2 4
R2 10 C2 0.47F
3
CLOAD2 330F C3 0.01F
3
VOUT2 3.3V 1.5A
R3 47k R4 22k R5 22k
1
2
24
23
VCC2
SENSE2
VCC1
SENSE1
GATE2
8
R12 105k 1%
ON
GATE1 OUT2 DIS2
22 5
6 7
R11 120
C4 0.01F R15 4.42k 1% R10 560 R13 14.7k 1%
/FAULT Signal R6 130k 1% *C5 R8 0.047F 30.9k 1%
14 12
/FAULT CDLY
MIC2585-1
FB2
FB1 OUT1
21 4
18 20
OV1 OV2
DIS1 PG1 PG2 /POR TRK
9
19 17 16 15
R7 13k 1%
DOWNSTREAM CONTROLLER(S) Downstream Control Signals
R9 8.06k 1%
CPOR
10
GND
13
CFILTER
11
C6 0.02F
C7 0.033F
GND Undervoltage (Output1) = 10.5V Undervoltage (Output2) = 2.95V Overvoltage (Input1) = 13.2V Overvoltage (Input2) = 3.65V START-UP Delay = 2.5ms POR Delay = 10ms Circuit Breaker Response Time = 16ms *C5 (optional) is used to set the delay for VOUT2 with respect to VOUT1 VOUT2 Delay = 9.5ms **D1 is BZX84C18 and D2 is BZX84C8V2 Resistor tolerances are 5% unless specified otherwise.
Figure 1. Typical Application Circuit
MIC2584/2585
2
March 2005
MIC2584/2585
Micrel
VCC2 1 SENSE2 2 GATE2 3 OV2 4 24 VCC1 23 SENSE1 22 GATE1 21 OV1 20 OUT1 19 DIS1 18 FB1 17 PG1 16 PG2 15 /POR 14 /FAULT 13 GND
Pin Configuration
VCC2 1 SENSE2 2 GATE2 3 OUT2 4 FB2 5 ON 6 CPOR 7 CFILTER 8
16 VCC1 15 SENSE1 14 GATE1 13 OUT1 12 FB1 11 /POR 10 /FAULT 9 GND
OUT2 5 DIS2 6 FB2 7 ON 8 TRK 9 CPOR 10 CFILTER 11 CDLY 12
MIC2584 16-Pin TSSOP (TS)
MIC2585 24-Pin TSSOP (TS)
Pin Description
Pin Number MIC2584 16 Pin Number MIC2585 24 Pin Name VCC1 Pin Function Positive Supply (Input), Channel 1: This input is the main supply to the internal circuitry and must be in the range of 2.3V to 13.2V. The GATE1 pin is held low by an internal undervoltage lockout circuit until VCC1 and VCC2 exceed their respective undervoltage lockout threshold of 2.165V and 0.8V. This input is protected up to 20V. Positive Supply (Input), Channel 2: The GATE2 pin is held low by an internal undervoltage lockout circuit until VCC1 and VCC2 exceed their respective undervoltage lockout threshold of 2.165V and 0.8V. This input must be in the range of 1.0V to 13.2V and less than or equal to VCC1. This input is protected up to 20V. Circuit Breaker Sense (Inputs): A resistor between this pin and VCC1 and VCC2 sets the current limit threshold for each channel. Whenever the voltage across either sense resistor exceeds the slow trip current limit threshold (VTRIPSLOW), the GATE voltage is adjusted to ensure a constant load current. If VTRIPSLOW (50mV) is exceeded for longer than time period tOCSLOW, then the circuit breaker is tripped and both GATE outputs are immediately pulled low. If the voltage across either sense resistor exceeds the fast trip circuit breaker threshold, VTRIPFAST, at any point due to fast, high amplitude power supply faults, then both GATE outputs are immediately brought low without delay. To disable the circuit breaker for either channel, the SENSE and VCC pins can be tied together. The default VTRIPFAST for either device is 100mV. Other fast trip thresholds are available: 150mV, 200mV, or OFF (VTRIPFAST disabled). Please contact factory for availability of other options. Enable (Input): Active High. The ON pin, an input to a Schmitt-triggered comparator used to enable/disable the controller, is compared to a 1.235V reference with 25mV of hysteresis. When a logic high is applied to the ON pin (VON > 1.235V), a start-up sequence begins when the GATE1 and GATE2 pins begin ramping up towards their final operating voltage. When the ON pin receives a logic low signal (VON < 1.21V), the GATE pins are grounded and /FAULT remains high if both inputs are above their respective UVLO thresholds. The ON pin must be low for at least 20s in order to initiate a start-up sequence. Additionally, toggling the ON pin LOW to HIGH resets the circuit breaker.
1
1
VCC2
2, 15
2, 23
SENSE2, SENSE1
6
8
ON
March 2005
3
MIC2584/2585
MIC2584/2585
Pin Number MIC2584 3, 14 Pin Number MIC2585 3, 22 Pin Name GATE2, GATE1 Pin Function
Micrel
Gate Drive (Outputs): Connect each output to the gates of external N-Channel MOSFETs. When ON is asserted, a 14A current source is activated and begins to charge the gate of the N-Channel MOSFET connected to this pin. An internal clamp ensures that no more than 10V is applied between the GATE and Source when VCC1 or VCC2 is above 5V. When the circuit breaker trips or when an input undervoltage lockout condition is detected, the GATE1 and GATE2 pins are immediately brought low. Ground: Tie to analog ground. Power-On Reset Timer (Input): A capacitor connected between this pin and ground sets the start-up delay (tSTART) and the power-on reset interval (tPOR). Once the lagging supply rises above its UVLO threshold and ON asserts, the capacitor connected to CPOR begins to charge. When the voltage at CPOR crosses 0.3V, the start-up threshold (VSTART), a start cycle is initiated as the GATE outputs begin to ramp while capacitor CPOR is immediately discharged to ground. When the voltage at the lagging FB pin rises above its threshold (VFB), capacitor CPOR begins to charge again. When the voltage at CPOR rises above the power-on reset delay threshold (VPOR) of 1.235V, the timer resets by pulling CPOR to ground and /POR is deasserted. If CPOR = 0, then tSTART defaults to 20s. Current Limit Response Timer (Input): A capacitor connected to this pin defines the period of time, tOCSLOW, in which an overcurrent event must last to signal a fault condition and trip the circuit breaker. When an overcurrent condition occurs, a 2.5A current source begins to charge this capacitor. If the voltage at this pin reaches 1.235V, the circuit breaker is tripped, both GATE pins immediately shut off, and /FAULT is asserted. If CFILTER = 0, then tOCSLOW defaults to 20s. Power-Good Threshold Input (Undervoltage Detect): FB1 and FB2 are internally compared to 1.235V and 0.80V references with 25mV of hysteresis, respectively. External resistive divider networks may be used to set the voltage at these pins. If either FB input momentarily goes below its threshold, then /POR is activated for one timing cycle, tPOR, indicating an output undervoltage condition. The /POR signal deasserts one timing cycle after the FB pin exceeds its power-good threshold by 25mV. A 5s filter on these pins prevents glitches from inadvertently activating the /POR signal. Circuit Breaker Fault Status (Output): Active-Low, weak pull-up to VCC1 or open-drain. Asserted when the circuit breaker is tripped due to an overcurrent, undervoltage lockout, or overvoltage event. When deasserted, the MIC2585 will initiate a new start cycle by toggling the ON pin. Power-On Reset (Output): Active Low, weak pull-up to VCC1 or open drain. This pin remains asserted during start-up until a time period (tPOR) after the lagging FB pin threshold (VFB1 or VFB2) is exceeded. The timing capacitor CPOR determines tPOR. When the output voltage monitored at either FB pin falls below VFB, /POR is asserted for a minimum of one timing cycle (tPOR). Output Voltage Monitor (Inputs): For output tracking, connect these pins to their respective output to sense the output voltage. Output Sequence Delay Timer (Input): This pin is internally clamped to 6V. A capacitor connected to this pin sets a timer delay, tDLY, between VOUT1 and VOUT2 as shown in Figure 5. With this pin pulled up to VCC1 through a resistor, and if CGATE1 = CGATE2, both VOUT1 and VOUT2 ramp up and down with the same dv/dt as depicted in the Tracking Mode diagram while maintaining a maximum voltage differential between VOUT1 and VOUT2. Discharge Tracking Mode Pin (Input): Tie this pin to OUT1 or OUT2 to enable tracking during turn-off cycle. Ground this pin to disable tracking during turn-off. The TRK pin is not to be used as a digital input.
9 7
13 10
GND CPOR
8
11
CFILTER
5, 12
7, 18
FB2, FB1
10
14
/FAULT
11
15
/POR
4, 13 N/A
5, 20 12
OUT2, OUT1 CDLY
N/A
9
TRK
MIC2584/2585
4
March 2005
MIC2584/2585
Pin Number MIC2584 N/A Pin Number MIC2585 4, 21 Pin Name OV2, OV1 Pin Function
Micrel
Overvoltage Detect Inputs: Whenever the threshold voltage (VOV1, VOV2) on either input is exceeded, the circuit-breaker is tripped while /FAULT is asserted and the GATE1 and GATE2 outputs are immediately brought low. Discharge Outputs: When the ON pin receives a logic low signal (deasserts), these pins provide a low impedance path to ground in order to allow the discharging of any load capacitance. The DIS pins assert low if TRK is less than 0.3V once ON has been deasserted. The typical DIS pin resistance varies between 50 to 170 dependent upon input supply voltage (see Electrical Table). An external resistor is required. See "Fast Output Discharge for Capacitive Load" section in the Applications Information for more detail. Power-Good Outputs: Active-HIGH, weak pull-up to VCC1 or open-drain. These outputs are asserted whenever the FB1 and FB2 thresholds are exceeded and will not be asserted when FB1 and FB2 are below their thresholds.
N/A
6, 19
DIS2, DIS1
N/A
16, 17
PG2, PG1
March 2005
5
MIC2584/2585
MIC2584/2585
Micrel
Absolute Maximum Ratings (Note1)
All voltages are referred to GND) Supply Voltage (VCC1/VCC2) .......................... -0.3V to 20V SENSE1/SENSE2 pins .............................. -0.3V to VCC1/2 TRK, ON, DIS1, DIS2, OUT1, OUT2, /POR, /FAULT, PG1, PG2 pins .................. -0.3V to 15V GATE1/GATE2 pin ......................................... -0.3V to 25V All other input pins ........................................... -0.3V to 15V DIS1/DIS2 current .................................................... 25mA Junction Temperature ............................................... 125C ESD Rating Human body model ............................................... 1500V Machine model ........................................................ 100V
Operating Ratings (Note 2)
Supply Voltage VCC1 ......................................................................... 2.3V to 13.2V VCC2 ......................................................................... 1.0V to 13.2V Operating Temperature Range .................. -40C to +85C Package Thermal Resistance R(JA), 16-pin TSSOP ....................................... 99.1C/W R(JA), 24-pin TSSOP ....................................... 83.8C/W
Electrical Characteristics (Note 4)
2.3V VCC1 13.2V, 1.0V VCC2 13.2V, TA = 25C unless otherwise noted. Bold values indicate -40C TA 85C. Symbol VCC1 ICC1 VCC2 ICC2 VUV1 VUV1HYS VUV2 VUV2HYS VTRIPSLOW VTRIPHYS VTRIPFAST Parameter Supply Voltage Supply Current Supply Voltage Supply Current VCC1 Undervoltage Lockout Threshold VCC1 Undervoltage Lockout Hysteresis VCC2 Undervoltage Lockout Threshold VCC2 Undervoltage Lockout Hysteresis Slow Trip Overcurrent Threshold Slow Trip Overcurrent Hysteresis Fast Trip Overcurrent Threshold VCC1 = VCC2 = 5V VGATE IGATE IGATEOFF RDIS External Gate Drive (GATE1 and GATE2) GATE Pin Pull-up Current GATE Pin Sink Current Start cycle /FAULT asserted Turn off (ON deasserted) Discharge Pin Resistance ON deasserted TRK < 0.3V VCCx = 2.3V VCCx = 5.0V VCCx = 13.2V ITMR Overcurrent Timer Pin Charge Current Overcurrent Timer Pin Discharge Current VTMR Overcurrent Timer Pin Threshold VCCx - VSENSEx = 50mV VCCx - VSENSEx = 25mV -3.5 1.5 1.190 30 VGATEx - VCCx x=J x=K x=L VCC1 or VCC2 > 5V VCC1 or VCC2 < 5V 6 3.5 -25 90 VCCx - VSENSEx, VCC1 = VCC2 = 5V 42.5 0.7 2.050 VCC2 VCC1 1.0 0.05 2.165 200 0.8 30 50 2.5 100 150 200 8 4.5 -14 50 45 170 70 50 -2.5 2.5 1.235 -1.5 3.5 1.290 70 10 8 -8 110 57.5 0.9 Condition Min 2.3 1.7 Typ Max 13.2 3 13.2 0.15 2.275 Units V mA V mA V mV V mV mV mV mV mV mV V V A mA A A A V
MIC2584/2585
6
March 2005
MIC2584/2585
Symbol ICPOR VPOR VPORHYS VSTART VTRK VTRKOFF VFB1 VFB1HYS VFB2 VFB2HYS VOV1 VOV1HYS VOV2 VOV2HYS IDELAY VDELAY VDLYHYS VON VONHYS ION VOL Parameter Power-on Reset Current Condition VCC1 = 5V, CPOR = 0.5V Start-up cycle Charge current Sink current Power-on Reset Delay Threshold Power-on Reset Delay Threshold Hysteresis Start-up Threshold TRK Pin Threshold (MIC2585 only) TRK Pin Turn-off Voltage (MIC2585 only) FB1 Threshold FB1 Threshold Hysteresis FB2 Threshold FB2 Threshold Hysteresis OV1 Threshold (MIC2585 only) OV1 Threshold Hysteresis (MIC2585 only) OV2 Threshold (MIC2585 only) OV2 Threshold Hysteresis (MIC2585 only) Delay Timer Pin Current (MIC2585 only) Delay Timer Pin Threshold (MIC2585 only) Delay Timer Pin Threshold Hysteresis (MIC2585 only) ON Pin Input Threshold ON Pin Hysteresis ON Pin Input Current /FAULT , /POR , PG1, PG2 Output Low Voltage (PG1 and PG2 for MIC2585 only) /FAULT , /POR , PG1, PG2 Active Output Pull-up Current (PG1 and PG2 for MIC2585 only) GATE1 and GATE2 ON/OFF Voltage Window (Tracking enabled) Note 3 VON = VCCX IOUT = 1.6mA, VCC1 = 5V 1.190 VCC1 = VCC2 = 5V Timer charge current Timer discharge current 1.190 -9 0.75 1.190 0.75 Start-up cycle ON deasserted, IGATE > 10A VCC1 = VCC2 = 5V ON asserted, VSENSE2 - VOUT2 VCC1 = VCC2 = 5V 0.25 0.25 150 1.190 1.190 Min -3.5 Typ -2.5 2.5 1.235 25 0.30 0.30 250 1.235 25 0.80 25 1.235 25 0.80 25 -6 200 1.235 25 1.235 25 0.1 0.5 0.4 1.290 1.290 -3 0.85 1.290 0.85 0.35 0.35 400 1.290 1.290 Max -1.5
Micrel
Units A
V mV V V mV V mV V mV V mV V mV A
V mV V mV A V
IPULLUP
ON asserted, VFB1 > 1.25V, VFB2 > 0.8V /POR = VCC1 - 1V See Timing Diagram (Figure 2)
7
12
22
A
VGATEWIN
100
250
mV
AC Parameters tOCFAST tOCSLOW
Note 1. Note 2. Note 3. Note 4.
Fast Overcurrent Sense to GATE Low Trip Time Slow Overcurrent Sense to GATE Low Trip Time
VCCx - VSENSEx = 100mV, CGATE = 10nF See Timing Diagram (Figure 3) VCCx - VSENSEx = 50mV, CFILTER = 0
1 20
s s
Exceeding the absolute maximum rating may damage the device. The device is not guaranteed to function outside its operating rating. For the MIC2584, VGATEWIN is specified only when ON is asserted. Specification for packaged product only.
March 2005
7
MIC2584/2585
MIC2584/2585
Micrel
Timing Diagrams
GATE1 GATE2 ON
GATE1 ON GATE2 ON GATE1 ON GATE2 OFF
100mV
OFF ON
GATE1 OFF GATE2 ON
VOUT1 - VOUT2
ON Pin Asserted
GATE1 OFF GATE2 OFF GATE1 ON GATE2 OFF
100mV
OFF
GATE1 OFF GATE2 ON
VOUT1 - VOUT2
ON Pin Deasserted
Figure 2. Gate Voltage Window -- Tracking Mode
VTRIPFAST 50mV (VCCx - VSENSEx) tOCSLOW VGATEx 0.5V 0.5V tOCFAST
Figure 3. Current Limit Response
ON VSTART CPOR tSTART VOUT[1,2] VPG[1/2]
VPOR
PG[1/2]
tPOR
/POR
Figure 4. Start-Up Cycle Timing
VOUT1 V<0.25V VOUT2 Tracking Mode, TRK = VOUT1 or VOUT2 VOUT1,VOUT2 (-1) (-2) VFB VOUT2,VOUT1 (-1) (-2) V<0.25V V<0.25V
tDLY
Sequencing/Tracking Mode, TRK = VOUT1 or VOUT2 (-1) - VOUT2 follows VOUT1 (-2) - VOUT1 follows VOUT2
Figure 5. Sequencing Modes (MIC2585 only)
MIC2584/2585
8
March 2005
MIC2584/2585
Micrel
Typical Characteristics
VTRIPSLOW1+ vs. Temperature VTRIPSLOW1- vs. Temperature VTRIPSLOW2+
58 56
VTRIPSLOW2+ (mV)
vs. Temperature
58 56 VTRIPSLOW1+ (mV)
58 56
52 50 48
VCC1 = 5.0V
VTRIPSLOW1- (mV)
54 VCC1 = 13.2V
54 52 50 48 V CC1 = 5.0V 46 44
VCC1 = 13.2V
54 52 50 48 46 44 VCC2 = 1.0V VCC2 = 5.0V VCC2 = 13.2V VCC2 = 2.3V
46 VCC1 = 2.3V 44 42 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
VCC1 = 2.3V
42 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
42 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
58 56 VTRIPSLOW2- (mV)
VTRIPSLOW2- vs. Temperature
110 108 VTRIPFAST1 (mV) 106 104 102 100 98 96 94 92
VTRIPFAST1 vs. Temperature
VCC1 = 13.2V VTRIPFAST2 (mV)
110 108 106 104 102 100 98 96 94
VTRIPFAST2 vs. Temperature
54 52 50 48 46 44 VCC2 = 1.0V VCC2 = 5.0V VCC2 = 13.2V VCC2 = 2.3V
VCC2 = 13.2V
VCC1 = 5.0V
VCC1 = 2.3V
VCC2 = 5.0V
VCC2 = 2.3V
42 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
90 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
92 90 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
VGATE1
22.5 GATE VOLTAGE_1 (V) 20 17.5 15 12.5 10 7.5 5 -40 -20 0 20 40 60 80 100 TEMPERATURE (C) VCC1 = 2.3V VCC1 = 5.0V
vs. Temperature
VCC1 = 13.2V GATE VOLTAGE_2 (V)
VGATE2 vs. Temperature
22.5 VCC2 = 13.2V VCC2 = 5.0V 2.5
UVLO1 and UVLO2 vs. Temperature
UVLO1+
UVLO THRESHOLD (V)
20 17.5 15 12.5 10 7.5
2.25 2 1.75 1.5 1.25 1 0.75 UVLO2- 0.5 -40 -20 0 20 40 60 80 100 TEMPERATURE (C) UVLO2+ UVLO1-
VCC2 = 2.3V
5 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
1.26
OVERCURRENT TIMER (V)
Overcurrent Timer Threshold vs. Temperature
CPOR THRESHOLD1 (V)
0.32 0.31 0.3 0.29 0.28
CPOR Threshold1 (Start-Up) vs. Temperature
VCC1 = 13.2V CPOR THRESHOLD2 (V)
1.3 1.28 1.26
CPOR Threshold2 vs. Temperature
1.25 1.24 1.23
VCC = 13.2V VCC = 5.0V
VCC1 = 5.0V
VCC1 = 2.3V
VCC = 2.3V 1.22 1.21 1.2 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
VCC2 = 13.2V 1.24 1.22
VCC2 = 5.0V
VCC2 = 2.3V 1.2 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
0.27 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
March 2005
9
MIC2584/2585
MIC2584/2585
Micrel
1.25
OVERVOLTAGE1 (V)
Overvoltage1 vs. Temperature
VCC1 = 13.2V
0.85 OVERVOLTAGE2 (V) 0.83 0.81 0.79 0.77
Overvoltage2 vs. Temperature
1.25 FB1 THRESHOLD (V) 1.24 1.23 1.22 1.21
FB1 Threshold vs. Temperature
VCC1=13.2V FB1+ VCC1=2.3V
1.24
VCC2 = 13.2V
VCC1=5.0V VCC1=5.0V
1.23 VCC1 = 2.3V VCC1 = 5.0V
1.22
0.75 VCC2 = 5.0V 0.73
VCC2 = 2.3V
VCC1=13.2V FB1- VCC1=2.3V 1.2 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
1.21 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
0.71 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
0.81 FB2 THRESHOLD (V) 0.79 0.77 0.75
FB2 Threshold vs. Temperature
OUTPUT LOW VOLTAGE (V) VCC2=13.2V VCC2=5.0V FB2+ VCC2=2.3V VCC2=2.3V FB2-
0.4
Output Low Voltage vs. Temperature
24 GATE1 ON CURRENT (A) 22 20 18 16 14 12 10
Gate1 On Current vs. Temperature
0.3 VCC = 2.3V 0.2 VCC = 5.0V 0.1 VCC = 13.2V 0 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
VCC = 5.0V VCC = 13.2V
VCC2=13.2V VCC2=5.0V
0.73
VCC = 2.3V
0.71 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
8 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
OVERCURRENT TIMER CURRENT (A)
OVERCURRENT TIMER CURRENT (A)
2.8 2.7 2.6 2.5 2.4 2.3
VCC = 13.2V
-2.9 -2.8 -2.7 -2.6 -2.5 -2.4 -2.3 -2.2
POWER ON RESET CURRENT (A)
Overcurrent Timer Discharge Current vs. Temperature
Overcurrent Timer Charge Current vs. Temperature
VCC = 13.2V
2.8
Power On Reset Current vs. Temperature
VCC = 13.2V VCC = 5.0V
2.7
VCC = 5.0V VCC = 2.3V
VCC = 5.0V VCC = 2.3V
2.6 2.5 VCC = 2.3V
2.2 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
-2.1 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
2.4 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
ACTIVE OUTPUT PULL-UP CURRENT (A)
2.8
Active Output Pull-Up Current vs. Temperature
SUPPLY CURRENT_1 (mA)
3 2.5 2 1.5 1 0.5
Supply Current_1 vs. Temperature
120
Supply Current_2 vs. Temperature
VCC1 = 13.2V VCC1 = 5.0V
SUPPLY CURRENT_2 (A)
VCC = 13.2V 2.7 VCC = 5.0V
110 100 90 80 70 60 50 40 30
VCC2 = 13.2V
2.6 VCC = 2.3V
VCC2 = 5.0V
VCC1 = 2.3V
2.5
VCC2 = 2.3V
2.4 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
0 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
20 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
MIC2584/2585
10
March 2005
MIC2584/2585
Micrel
Test Circuit
IIN VINx+
3
RSENSEx 0.005
1
2 4
IRF7822 (SO-8)
IOUT VOUTx+ RLOAD
CINx 4.7F VINx-
33k VCCx ON MIC2585 OUTx CDLY FBx CPOR GND 0.1F R2 SENSEx GA TEx 0.01F R1
CLOAD VOUTx-
CDLY (optional)
CFILTER 8200pF
(Not all pins shown for simplicity)
March 2005
11
MIC2584/2585
MIC2584/2585
Micrel
Functional Characteristics
Turn-On, Staggered Mode (MIC2585-1BTS)
VCC1 = 5V VCC2 = 3.3V CDLY = 47nF RL1 = RL2 = OPEN
Turn-On (No Delay)
VOUT1 VOUT2 2V/div
/POR 5V/div
TIME (5ms/div.)
/POR 5V/div
VOUT1 VOUT2 2V/div
ON 2V/div
VCC1 = 5V VCC2 = 3.3V RL1 = 3.5 RL2 = 1 CL1 = CL2 = 220F
ON 5V/div
TIME (10ms/div.)
Turn-On (Channel 2)
Turn-On (Channel 1)
ON 5V/div
/FAULT 5V/div
IIN1 VOUT1 2A/div 2V/div
VCC1 = 5V VCC2 = 3.3V RL2 =1 CL2 = 220F
VOUT2 1V/div
/FAULT 5V/div
ON 5V/div
VCC1 = 5V VCC2 = 3.3V RL1 =1 CL1 = 220F TIME (2.5ms/div.)
IIN2 1A/div
TIME (5ms/div.)
Turn-Off (Tracking Off)
VCC1 = 5V VCC2 = 3.3V RL1 = 1 RL2 = 3 CL1 = 2200F CL2 = 220F
Turn-Off (Tracking On)
VCC1 = 5V VCC2 = 3.3V RL1 = 1 RL2 = 3 CL1 = 2200F CL2 = 220F
ON 2V/div
VOUT1 /POR VOUT2 5V/div 2V/div
TIME (500s/div.)
/POR 5V/div
VOUT1 VOUT2 2V/div
ON 2V/div
TIME (1ms/div.)
MIC2584/2585
12
March 2005
MIC2584/2585
Micrel
Turn-On Response (Hot Insert)
VCC1 = 5V VCC2 = 3.3V CL = 250F RL = 5
Power-On Reset Response
FAULT 5V/div
VCC1 2V/div
VOUT1 2V/div
ON 5V/div
IIN1 VOUT1 500mA/div 2V/div
22.5ms /POR PG1 2V/div 2V/div
VCC1 = 5V VCC2 = 3.3V RL1 =3.5 CL1 = 220F CPOR = 47nF
TIME (5ms/div.)
TIME (5ms/div.)
Short-Circuit Crowbar Channel 1 (SCR enabled through a PNP from DIS pin-MIC2585-1BTS)
FAULT VOUT1 5V/div 5V/div
Short-Circuit Crowbar Channel 2 (SCR enabled through a PNP from DIS pin-MIC2585-1BTS)
/FAULT VOUT2 5V/div 2V/div
4.5A peak VCC1 = 5V VCC2 = 3.3V RL1 = 3.5 RL2 = 1 CL1 = CL2 = 220F
3.88A peak
VCC1 = 5V VCC2 = 3.3V RL1 = 3.5 RL2 = 1 CL1 = CL2 = 220F
IIN1 1A/div
TIME (25s/div.)
IIN2 1A/div
TIME (10s/div.)
Short-Circuit Response
VCC1 = 5V VCC2 = 3.3V RL1 = 1 RL2 = open CL1 = 2200F CL2 = 220F
FAULT VGATE1 VOUT1 10V/div 10V/div 2V/div
6.04A peak
IIN1 2A/div
TIME (25s/div.)
March 2005
13
MIC2584/2585
MIC2584/2585
Micrel
Functional Diagram
MIC2585-J
Charge Pump 1 SENSE1 VCC1 SENSE2 VCC2
23 (15) 24 (16) 22 (14)
GATE1
21V + - 50mV + - 50mV + - 100mV + - 100mV 2.5A ITMR + UVLO2 0.8V UVLO1 2.165V VCC1 20A
14 (10)
10V
Charge Pump 2 21V
3 (3)
GATE2
2 (2) 1 (1)
10V
Up & Down Tracking
20 (13) 5 (4) 19
OUT1 OUT2 DIS1
VCC1
6
DIS2
CFILTER
11 (8)
VREF 2.5A
+ - Logic
/FAULT
VCC1 20A
15 (11)
/POR
GND FB1
13 (9) 18 (12)
VCC1 VREF + - Glitch Filter VCC1 0.8V + - Glitch Filter 20A
16
20A
17
PG1
FB2
7 (5)
PG2
CDLY
12
VCC1 2.5A CPOR
10 (7)
VREF ICPOR 0.3V
+ -
9
+ - + -
+ - + - + -
TRK
0.3V
21
VREF
OV1
VREF
4
ON
8 (6)
OV2
VREF
+ - 1.235V Reference Pin numbers for MIC2584 are in parenthesis ( ) where applicable
0.8V
MIC2584/2585
14
March 2005
MIC2584/2585
Micrel
This second timing cycle (tPOR) begins when the lagging voltage exceeds its FB pin threshold (VFB). See Figure 4 in the "Timing Diagrams". When the power supply is already present (i.e., not a "hot swapping" condition) and the MIC2584/ 85 device is enabled by applying a logic high signal at the ON pin, the GATE outputs begin ramping immediately as the first CPOR timing cycle is bypassed. Active current regulation is employed to limit the inrush current transient response during start-up by regulating the load current at the programmed current limit value (See "Current Limiting and Dual-Level Circuit Breaker" section). The following equation is used to determine the nominal current limit value:
Functional Description
Hot Swap Insertion When circuit boards are inserted into live system backplanes and supply voltages, high inrush currents can result due to the charging of bulk capacitance that resides across the supply pins of the circuit board. This inrush current, although transient in nature, may be high enough to cause permanent damage to on-board components or may cause the system's supply voltages to go out of regulation during the transient period which may result in system failures. The MIC2584 and MIC2585 act as a controller for external N-Channel MOSFET devices in which the gate drive is controlled to provide inrush current limiting and output voltage slew rate control during hot swap insertions. Power Supply VCC1 is the main supply input to the MIC2584/85 controller with a voltage range of 2.3V to 13.2V. The VCC2 supply input ranges from 1.0V to 13.2V and must be less than or equal to VCC1 for operation. Both inputs can withstand transient spikes up to 20V. In order to ensure stability of the supplies, a minimum 1F capacitor from each VCC to ground is recommended. Alternatively, a low pass filter, shown in the typical application circuit, can be used to eliminate high frequency oscillations as well as help suppress transient spikes. Also, due to the existence of undetermined parasitic inductance in the absence of bulk capacitance, placing a Zener diode at each VCC of the controller to ground in order to provide external supply transient protection is strongly recommended. See the typical application circuit in Figure 1. Start-Up Cycle
Supply Contact Delay
ILIM =
VTRIPSLOW RSENSE
=
50mV RSENSE
(2)
where VTRIPSLOW is the current limit slow trip threshold found in the electrical table and RSENSE is the selected value that will set the desired current limit. There are two basic start-up modes for the MIC2584/85: 1)Start-up dominated by load capacitance and 2)start-up dominated by total gate capacitance. The magnitude of the inrush current delivered to the load will determine the dominant mode. If the inrush current is greater than the programmed current limit (ILIM), then load capacitance is dominant. Otherwise, gate capacitance is dominant. The expected inrush current may be calculated using the following equation:
INRUSH IGATE x
CLOAD CGATE
14A x
CLOAD CGATE
(3)
where IGATE is the GATE pin pull-up current, CLOAD is the load capacitance, and CGATE is the total GATE capacitance (CISS of the external MOSFET and any external capacitor connected from the MIC2584/85 GATE pin to ground).
Load Capacitance Dominated Start-Up
During a hot insert of a PC board into a backplane or when the main supply (VCC1) is powered up from a cold start, as the voltage at the ON pin rises above its threshold (1.235V typical), the MIC2584/85 first checks that both supply voltages are above their respective UVLO thresholds. If so, then the device is enabled and an internal 2.5A current source begins charging capacitor CPOR to 0.3V to initiate a start-up sequence. Once the start-up delay (tSTART) elapses, the CPOR pin is pulled immediately to ground and a separate 14A current source begins charging each GATE output to drive the external MOSFET that switches VIN to VOUT. The programmed contact start-up delay is calculated using the following equation:
In this case, the load capacitance (CLOAD) is large enough to cause the inrush current to exceed the programmed current limit but is less than the fast-trip threshold (or the fast-trip threshold is disabled, `M' option). During start-up under this condition, the load current is regulated at the programmed current limit value (ILIM) and held constant until the output voltage rises to its final value. The output slew rate and equivalent GATE voltage slew rate is computed by the following equation:
Output Voltage Slew Rate, dVOUT /dt =
ILIM CLOAD
(4)
t START = CPOR x
VSTART ICPOR
0.12 x CPOR (F) (1)
where the start-up delay timer threshold (VSTART) is 0.3V, and the Power-On Reset timer current (ICPOR) is 2.5A. See Table 2 for some typical supply contact start-up delays using several standard value capacitors. As each GATE voltage continues ramping toward its final value (VCC + VGS) at a defined slew rate (See Load Capacitance/Gate Capacitance Dominated Start-Up sections), a second CPOR timing cycle begins if: 1)/FAULT is high and 2)CFILTER is low (i.e., not an overvoltage, undervoltage lockout, or overcurrent state). March 2005 15
where ILIM is the programmed current limit value. Consequently, the value of CFILTER must be selected to ensure that the overcurrent response time, tOCSLOW, exceeds the time needed for the output to reach its final value. For example, given a MOSFET with an input capacitance CISS = CGATE = 2000pF, CLOAD is 1000F, and ILIM is set to 5A with a 12V input, then the load capacitance dominates as determined by the calculated INRUSH > ILIM. Therefore, the output voltage slew rate determined from Equation 4 is:
Output Voltage Slew Rate, (dVOUT /dt) =
5A V =5 100F ms
MIC2584/2585
MIC2584/2585
and the resulting tOCSLOW needed to achieve a 12V output is approximately 2.5ms. (See "Power-On Reset, Overcurrent Timer, and Sequenced Output Delays" section to calculate tOCSLOW).
GATE Capacitance Dominated Start-Up
Micrel
GATE outputs shut down immediately, bypassing the overcurrent timer period. To disable current limit and circuit breaker operation, tie each channel's SENSE and VCC pins together and the CFILTER pin to ground. Output Undervoltage Detection The MIC2584/85 employ output undervoltage detection by monitoring the output voltage through a resistive divider connected at the FB pins. During turn on, while the voltage at either FB pin is below its threshold (VFB), the /POR pin is asserted low. Once both FB pin voltages cross their respective threshold (VFB), a 2.5A current source charges capacitor CPOR. Once the CPOR pin voltage reaches 1.235V, the time period tPOR elapses as pin CPOR is pulled to ground and the /POR pin goes HIGH. If the voltage at either FB drops below VFB for more than 10s, the /POR pin resets for at least one timing cycle defined by tPOR (See "Applications Information" for an example). Input/Output Overvoltage Protection The MIC2585 monitors and detects overvoltage conditions in the event of excessive supply transients at the MIC2585 input(s)/output(s). Whenever the voltage threshold is exceeded at either OV1 or OV2 of the MIC2585, the circuit breaker is tripped and both GATE outputs are immediately brought low. Power-On Reset, Overcurrent Timer, and Sequenced Output Delays The Power-On Reset delay, tPOR, is the time period for the /POR pin to go HIGH once the lagging voltage exceeds the power-good threshold (VFB) monitored at the FB pin. A capacitor connected to CPOR sets the interval and is determined by using Equation 1 with VPOR substituted for VSTART. The resulting equation becomes:
In this case, the value of the load capacitance relative to the GATE capacitance is small enough such that during start-up the output current never exceeds the current limit threshold as determined by Equation 3. The minimum value of CGATE that will ensure that the current limit is never exceeded is given by the equation below:
I CGATE (Min) = GATE x CLOAD ILIMIT
Where CGATE is the summation of the MOSFET input capacitance (CISS) specification and the value of the capacitor connected to the GATE pin of the MIC2584/85 (and MOSFET) to ground. Once CGATE is determined, use the following equation to determine the output slew rate dVOUT/dt for gate capacitance dominated start-up:
dVOUT /dt =
IGATE CGATE
Table 1 depicts the output slew rate for various values of CGATE.
IGATE = 14A CGATE 0.001F 0.01F 0.1F 1F dVOUT/dt 14V/ms 1.4V/ms 0.14V/ms 0.014V/ms
Table 1. Output Slew Rate Selection for GATE Capacitance Dominated Start-Up Current Limiting and Dual-Level Circuit Breaker Many applications will require that the inrush and steady state supply current be limited at a specific value in order to protect critical components within the system. Connecting a sense resistor between the VCC and SENSE pins of each channel sets the nominal current limit value for each channel of the MIC2584/85 and the current limit is calculated using Equation 2. The MIC2584/85 also features a dual-level circuit breaker triggered via 50mV and 100mV current limit thresholds sensed across the VCC and SENSE pins. The first level of the circuit breaker functions as follows. For the MIC2584/85, once the voltage sensed across these two pins exceeds 50mV on either channel, the overcurrent timer, its duration set by capacitor CFILTER, starts to ramp the voltage at CFILTER using a 2.5A constant current source. If the voltage at CFILTER reaches the overcurrent timer threshold (VTMR) of 1.235V, then CFILTER immediately returns to ground as the circuit breaker trips and both GATE outputs are immediately shut down. For the second level, if the voltage sensed across VCC and SENSE of either channel exceeds 100mV (-J option) at any time, the circuit breaker trips and both
tPOR = CPOR x
VPOR ICPOR
0.5 x CPOR (F)
(7)
where the Power-On Reset threshold (VPOR) and timer current (ICPOR) are typically 1.235V and 2.5A, respectively. For the MIC2584/85, a capacitor connected to CFILTER is used to set the timer which activates the circuit breaker during overcurrent conditions. When the voltage across either sense resistor exceeds the slow trip current limit threshold of 50mV, the overcurrent timer begins to charge for a period, tOCSLOW, determined by CFILTER. If tOCSLOW elapses, then the circuit breaker is activated and both GATE outputs are immediately pulled to ground. The following equation is used to determine the overcurrent timer period, tOCSLOW.
V t OCSLOW = CFILTER x TMR 0.5 x CFILTER (F) (8) ITMR
where VTMR, the overcurrent timer threshold, is 1.235V and ITMR, the overcurrent timer current, is 2.5A. If no capacitor for CFILTER is used, then tOCSLOW defaults to 20s.
MIC2584/2585
16
March 2005
MIC2584/2585
The sequenced output feature is enabled for the MIC2585 by placing a capacitor from CDLY to ground. The -1 option allows for VOUT2 to follow VOUT1 and the -2 option allows for VOUT1 to follow VOUT2 during start-up (See "Timing Diagrams, Figure 5"). The sequenced output delay time is determined using the following equation:
V tDLY CDLY x DELAY 0.2 x CDLY (F) IDELAY
Micrel
CFILTER 220pF 680pF 1000pF 3300pF 0.01F 0.047F 0.1F 0.33F tOCSLOW 110s 340s 500s 1.6ms 5ms 23.5ms 50ms 165ms
(9)
where VDELAY, the CDLY pin threshold, is typically 1.235V, IDELAY, the CDLY pin charge current, is typically 6A, and CDLY is the capacitor connected to CDLY. Tables 2, 3, and 4 provide a quick reference for several timer calculations using select standard value capacitors. Undervoltage Lockout Internal circuitry keeps both GATE output charge pumps off until VCC1 and VCC2 exceed 2.165V and 0.8V, respectively. CPOR 0.01F 0.033F 0.05F 0.1F 0.33F 0.47F 1F tSTART 1.2ms 4ms 6ms 12ms 40ms 56ms 120ms tPOR 5ms 16.5ms 25ms 50ms 165ms 235ms 500ms
Table 3. Selected Overcurrent Timer Delays CDLY 4700pF 0.01F 0.047F 0.1F 0.33F 0.82F 1F 2.2F tDLY 950s 2ms 9.5ms 20ms 66ms 165ms 200ms 440ms
Table 4. Selected Sequenced Output Delays
Table 2. Selected Power-On Reset and Start-Up Delays
March 2005
17
MIC2584/2585
MIC2584/2585
Micrel
up and power-down independent of the load capacitance of each supply. See "Figure 2" of the "Timing Diagrams". Wiring the TRK pin to either OUT1 or OUT2 of the MIC2585 enables the tracking feature. The OUT1 and OUT2 pins provide output track sensing and are wired directly to the output (source) of the external MOSFET for Channel 1 and Channel 2, respectively. The MIC2584/85 can also be used in systems that support more than two supplies. Figure 7 illustrates the generic use of two separate controllers configured to support four independent supply rails with an associated output timing response. The PG (or /POR) output of the first controller is used to enable the second controller. As configured, a fault condition on either VOUT1 or VOUT2 will result in all channels being shut down. For systems with multiple power sequencing requirements, the controllers' output tracking and sequencing features can be implemented in order to meet the system's timing demands.
Applications Information
Output Tracking and Sequencing The MIC2585 is equipped with optional supply settings: Tracking or Sequencing. There are many applications that require two supplies to track one another within a specified maximum potential difference (or time) during powerup and power-down, such as in switching a processor on and off. In many other systems and applications, supply sequencing during turn-on may be essential such as when a specific circuit block (e.g., a system clock) requires available power before another block of system circuitry. For either supply configuration, the MIC2585 requires only one additional component and can be used as an integrated solution to traditional, and most often complex, discrete circuit solutions. Additionally, the two optional supply settings may be combined to provide supply sequencing during start-up and supply tracking during turn-off (see Figure 6 below). The MIC2585 guarantees supply tracking within 250mV for power-
VIN1 5V
3
RSENSE1 0.007 1 5%
4
**Q1 Si4922DY (2) (SO-8) CLOAD1 1500F RSENSE2 0.015 5% 2 1
3 4
VOUT1 5V@5A
*D1 (8V)
C1 1F
VIN2 1.8V *D2 (6V) R1 47k C2 1F
24 23
**Q2 Si4922DY (1) (SO-8)
R4 8.06k 1% CLOAD2 100F
VOUT2 1.8V@2A
1
2
C4 0.022F
3
VCC1
SENSE1
VCC2
SENSE2
GATE2
8
R2 39.2k 1%
ON OUT2 TRK
5
9 7
11
CFILTER
C5 0.01F
MIC2585-1
FB2
R5 10.5k 1% GATE1
22
12
CDLY OUT1 FB1 GND
13 20 18
C3 0.022F
C6 0.1F
R3 15.8k 1%
Undervoltage (OUT1) = 4.4V Undervoltage (OUT2) = 1.5V Circuit Breaker Response Time = 5ms Sequenced Output Delay = 20ms *Diodes are BZX84C(x)V(x) **Si4922DY is a dual Power MOSFET Additional pins omitted for clarity
Figure 6. Output Sequencing/Tracking Combination
MIC2584/2585
18
March 2005
MIC2584/2585
Fast Output Discharge for Capacitive Loads In many applications where a switch controller is turned off by either removing the PCB from the backplane or the ON pin is reset, capacitive loading will cause the output to retain voltage unless a `bleed' (low impedance) path is in place in order to discharge the capacitance. The MIC2585 is equipped with an internal MOSFET that allows the discharging of any load capacitance to ground through a 50 to 170 path. The discharge feature is configured by wiring the DIS pin to the output (source) of the external MOSFET and is enabled if the TRK pin is below 0.3V after the controller has been disabled by a logic low signal received at the ON pin of Figure 1. See the "Typical Application" circuit of Figure 1. A series resistor is required from DIS to VOUT so that the maximum current of 25mA for the DIS pin is not exceeded.
Micrel
Output Turn-Off Sequencing - No Tracking There are many applications where it is necessary or desirable for the supply rails to sequence during turn-on and turnoff, as is the case with some microprocessor requirements. The MIC2585 can be configured to allow one output to shut off first, followed by the other output. Figure 8 illustrates an example circuit that sequences OUT1 and OUT2 in a first on- last off application. During start-up, capacitor CDLY allows for VOUT1 to turn on followed by VOUT2 20ms later. Once the ON pin receives a low signal by removing the PCB from the backplane, or by an external processor signal, DIS1 and DIS2 will assert low. The external crowbar circuit connected from the DIS2 pin will immediately bring VOUT2 to ground while VOUT1 will discharge to ground through the 750 (680 external, 70 internal) series path.
VIN1
MIC2585 GATE1
EN
ON
OUT1
VOUT1 VIN2
ON VOUT1/VOUT2 Short Circuit on VOUT1
/FAULT GATE2 PG OUT2
VOUT2
PG
VIN3
MIC2585 GATE1 ON OUT1
/FAULT
VOUT3 VIN4
VOUT3/VOUT4 System Timing
GATE2 /FAULT OUT2
VOUT4
Figure 7. Supporting More Than Two Supplies
March 2005
19
MIC2584/2585
MIC2584/2585
RSENSE1 0.012 1 5% 2
3 4
Micrel
Q1 IRF7822 (SO-8) CLOAD1 220F RSENSE2 0.012 5% 2 1
3 4
VIN1 5V *D1 (8V) C1 1F
VOUT1 5V@2.5A
VIN2 3.3V *D2 (8V) C2 1F
24 23
Q2 IRF7822 (SO-8) CLOAD2 220F R5 20.5k 1%
3
VOUT2 3.3V@2.5A
1
2
VCC1 R1 33k
SENSE1
VCC2
SENSE2
GATE2 FB2
8
C4 0.022F
7
ON OUT2
5
R6 8.66k 1%
R9 3.6k
R3 39.2k 1%
R2 47k MIC2585-1
11
CFILTER
DIS2
6
R8 1.5k
Q3 ZTX788A
C5 0.01F
C7 0.033F
Q4 TCR22-4 R10 360
GATE1
12
22
CDLY DIS1 OUT1 GND
13 19 20 18
C6 0.1F TRK
9
R7 680
C3 0.022F
FB1
Undervoltage (OUT1) = 4.4V Undervoltage (OUT2) = 2.85V Circuit Breaker Response Time = 5ms Sequenced Output Delay (Turn-On) = 20ms *Dual package Diode is AZ23C8V2 Resistors are 5% unless specified otherwise Additional pins omitted for clarity
R4 15.8k 1%
Figure 8. First On--Last Off Application Circuit Output Undervoltage Detection For output undervoltage detection, the first consideration is to establish the output voltage level that indicates "power is good." For this example, the output value for which a 12V supply will signal "good" is 10.5V. Next, consider the tolerances of the input supply and FB threshold (VFB). For this example, given a 12V 5% supply for Channel 1, the resulting output voltage may be as low as 11.4V and as high as 12.6V. Additionally, the FB1 threshold has 50mV tolerance and may be as low as 1.19V and as high as 1.29V. Thus, to determine the values of the resistive divider network (R12 and R13) at the FB1 pin, shown in the typical application circuit on page 1, use the following iterative design procedure. 1) Choose R13 so as to limit the current through the divider to approximately 100A or less. 2) Next, determine R12 using the output "good" voltage of 10.5V and the following equation: (R12 + R13) VOUT1(Good) = VFB1(MAX) R13 (10)
Using some basic algebra and simplifying Equation 10 to isolate R12, yields:
V OUT1(Good) R12 = R13 - 1 VFB1(MAX)
(10.1)
1.29V 12.9k . 100A 100A R13 is chosen as 14.7k 1%. R13
VFB1(MAX)
where VFB1(MAX) = 1.29V, VOUT1(Good) = 10.5V, and R13 is 14.7k. Substituting these values into Equation 10.1 now yields R12 = 104.95k. A standard 105k 1% is selected. Now, consider the 11.4V minimum output voltage, the lower tolerance for R13 and higher tolerance for R12, 14.55k and 106.05k, respectively. With only 11.4V available, the voltage sensed at the FB1 pin exceeds VFB1(MAX), thus the /POR and PG1 (MIC2585) signals will transition from LOW to HIGH, indicating "power is good" given the worse case tolerances of this example. A similar approach should be used for Channel 2. 20 March 2005
MIC2584/2585
MIC2584/2585
Input Overvoltage Protection A similar design approach as the previous Undervoltage Detection example is recommended for the overvoltage protection circuitry, resistors R6 and R7 for OV1, in Figure 1. For input overvoltage protection, the first consideration is to establish the input voltage level that indicates an overvoltage triggering a system (output voltage) shut down. For our example, the input value for which the Channel 1 12V supply will signal an "output shutdown" is 13.2V (+10%). Similarly, from the previous example: 1) Choose R7 to satisfy 100A condition.
Micrel
the voltage sensed at the OV1 pin is below VOV1(MIN), and the MIC2584/85 will not indicate an overvoltage condition until VCC1 exceeds approximately 13.2V considering the given tolerances. A similar approach should be used for Channel 2. PCB Connection Sense There are several configuration options for the MIC2584/85's ON pin to detect if the PCB has been fully seated in the backplane before initiating a start-up cycle. In Figure 1, the MIC2584/85 is mounted on the PCB with a resistive divider network connected to the ON pin. R4 is connected to a short pin on the PCB edge connector. Until the connectors mate, the ON pin is held low which keeps the GATE output charge pump off. Once the connectors mate, the resistor network is pulled up to the input supply, 12V in this example, and the ON pin voltage exceeds its threshold (VON) of 1.235V and the MIC2584/85 initiates a start-up cycle. In Figure 9, the connection sense consisting of a discrete logic-level MOSFET and a few resistors allows for interrupt control from the processor or other signal controller to shut off the output of the MIC2584/85. R4 pulls the GATE of Q2 to VIN and the ON pin is held low until the connectors are fully mated. Once the connectors fully mate, a logic LOW at the /ON_OFF signal turns Q2 off and allows the ON pin to pull up above its threshold and initiate a start-up cycle. Applying a logic HIGH at the /ON_OFF signal will turn Q2 on and short the ON pin of the MIC2584/85 to ground which turns off the GATE output charge pump.
1.19V 11.9k 100A 100A R7 is chosen as 13.0k 1% 2) Thus, following the previous example and substituting R6 and R7 for R12 and R13, respectively, VOV1(MIN) for VFB1(MAX), and 13.2V overvoltage for 10.5V output "good," the same formula yields R6 of 131.2k. The nearest standard 1% value is 130k. Now, consider the 12.6V maximum input voltage (VCC1 +5%), the higher tolerance for R7 and lower tolerance for R6, 13.13k and 128.7k, respectively. With 12.6V input, R7
VOV1(MIN)
Backplane PCB Edge Connector Connector
VIN1 5V
Long Pin
3
RSENSE1 0.005 1 5% 2 C1 1F
4
Q1 Si7892DP (PowerPAKTM SO-8)
VOUT1 5V@7A
CLOAD1 1000F
R5 10 R4 20k
6 16 15
VCC1 ON
SENSE1 GATE1
14
R1 33k
/ON_OFF
R3 33
R2 *Q2 33k
13 12
C2 0.01F
R6 27.4k 1%
MIC2584 Short Pin PCB Connection Sense
OUT1 FB1
/FAULT
Medium or Short Pin
10
/FAULT CPOR
7
/POR GND
9
11
Downstream Signal
R7 10.5k 1%
CFILTER
8
GND
Long Pin
C3 0.033F
C4 0.01F
Undervoltage (Output) = 4.45V /POR Delay = 16.5ms START-UP Delay = 4ms Circuit Breaker Response Time = 5ms *Q2 is TN0201T (SOT-23) Channel 2 and additional pins omitted for clarity.
Figure 9. PCB Connection Sense with ON/OFF Control March 2005 21 MIC2584/2585
MIC2584/2585
Higher UVLO Setting Once a PCB is inserted into a backplane (power supply), the internal UVLO circuit of the MIC2584/85 holds the GATE output charge pump off until VCC1 exceeds 2.165V and VCC2 exceeds 0.8V. If VCC1 falls below 1.935V or VCC2 falls below 0.77V, the UVLO circuit pulls the GATE output to ground and clears the overvoltage and/or current limit faults. For a higher UVLO threshold, the circuit in Figure 10 can be used to delay the output MOSFET from switching on until the desired input voltage is achieved. The circuit allows the charge pumps to remain off until V IN1 exceeds R1 x 1.235V provided that VCC2 has exceeded its 1+ R2 threshold. Both GATE drive outputs will be shut down when R1 x 1.21V . In the example circuit , the VIN1 falls below 1 + R2 rising UVLO threshold is set at approximately 9.0V and the falling UVLO threshold is established as 8.9V. The circuit consists of an external resistor divider at the ON pin that keeps both GATE output charge pumps off until the voltage at the ON pin exceeds its threshold (VON) and after the startup timer elapses. Hot Swap Power Control for DSPs In designing power supplies for dual supply logic devices, such as a DSP, consideration should be given to the system timing requirements of the core and I/O voltages for powerup and power-down operations. When power is provided to the core and I/O circuit blocks in an unpredictable manner, the effects can be detrimental to the life cycle of the DSP or logic device by allowing unexpected current to flow in the core and I/O isolation structures. Additionally, bus contention is one of the critical system-level issues supporting the need for power supply sequencing. Since the core supplies logic control for the bus, powering up the I/O before the core may result in both the DSP and an attached peripheral device
VIN1 12V D1 (18V) R1 154k 1% C1 1F
3
Micrel
being simultaneously configured as outputs. In this case, the output drivers of each device contend for control over sending data along the bus which may cause excessive current to flow in one of the paths (I1 or I2) shown in the bidirectional port of Figure 11. Upon powering down the system, the core voltage supply should turn off after the I/O as the bus control signal(s) may enter an indeterminate state if the core is powered down first. Thus, for power sequencing of a dual supply voltage DSP implementing the MIC2585 (if VCORE VI/O), a circuit similar to Figure 8 is recommended with the core voltage supplied through Channel 1 and the I/O voltage supplied through Channel 2. For systems with VCORE < VI/O, the MIC2585-2 option with the I/O voltage through Channel 1 and core through Channel 2 is used to implement the first on-last off application. Sense Resistor Selection The MIC2584 and MIC2585 use a low-value sense resistor to measure the current flowing through the MOSFET switch (and therefore the load). This sense resistor is nominally set at 50mV/ILOAD(CONT). To accommodate worst-case tolerances for both the sense resistor (allow 3% over time and temperature for a resistor with 1% initial tolerance) and still supply the maximum required steady-state load current, a slightly more detailed calculation must be used. The current limit threshold voltage (i.e., the "trip point") for the MIC2584/85 may be as low as 42.5mV, which would equate to a sense resistor value of 42.5mV/ILOAD(CONT). Carrying the numbers through for the case where the value of the sense resistor is 3% high yields:
RSENSE(MAX) =
(1.03)(ILOAD(CONT) )
42.5mV
=
41.3mV ILOAD(CONT) (11)
Once the value of RSENSE has been chosen in this manner, it is good practice to check the maximum ILOAD(CONT) which the circuit may let through in the case of tolerance build-up in
Q1 IRF7822 (SO-8)
RSENSE1 0.010 1 5% 2
4
VOUT1 12V@4A CLOAD1 1000F
16
15
R3 10 GATE1
14
VCC1
SENSE1
R4 133k 1%
6
C2 0.01F ON MIC2584 FB1 GND
9 12
R2 24.3k 1%
R5 16.2k 1%
Undervoltage Lockout Threshold (rising) = 9.0V Undervoltage Lockout Threshold (falling) = 8.9V Undervoltage (Output) = 11.4V Channel 2 and additional pins omitted for clarity.
Figure 10. Higher UVLO Setting MIC2584/2585 22 March 2005
MIC2584/2585
the opposite direction. Here, the worst-case maximum current is found using a 57.5mV trip voltage and a sense resistor that is 3% low in value. The resulting equation is:
ILOAD(CONT,MAX) =
Micrel
MOSFET Voltage Requirements The first voltage requirement for the MOSFET is easily stated: the drain-source breakdown voltage of the MOSFET must be greater than VIN(MAX). For instance, a 12V input may reasonably be expected to see high-frequency transients as high as 18V. Therefore, the drain-source breakdown voltage of the MOSFET must be at least 19V. For ample safety margin and standard availability, the closest minimum value will be 20V. The second breakdown voltage criterion that must be met is a bit subtler than simple drain-source breakdown voltage, but is not hard to meet. In MIC2584/85 applications, the gate of the external MOSFET is driven up to approximately 20V by the internal output MOSFET (again, assuming 12V operation). At the same time, if the output of the external MOSFET (its source) is suddenly subjected to a short, the gate-source voltage will go to (20V - 0V) = 20V. This means that the external MOSFET must be chosen to have a gate-source breakdown voltage of 20V or more, which is an available standard maximum value. However, if operation is above 12V, the 20V gate-source maximum will likely be exceeded. As a result, an external Zener diode clamp should be used to prevent breakdown of the external MOSFET when operating at voltages above 10V. A Zener diode with 10V rating is recommended as shown in Figure 12. At the present time, most power MOSFETs with a 20V gate-source voltage rating have a 30V drain-source breakdown rating or higher. As a general tip, choose surface-mount devices with a drain-source rating of 30V as a starting point. Finally, the external gate drive of the MIC2584/85 requires a low-voltage logic level MOSFET when operating at voltages lower than 3V. There are 2.5V logic level MOSFETs available. See Table 5, "MOSFET and Sense Resistor Vendors" for suggested manufacturers.
(0.97)(RSENSE(NOM) )
57.5mV
=
59.3mV RSENSE(NOM) (12)
As an example, if an output must carry a continuous 6A without nuisance trips occurring, Equation 11 yields: RSENSE(MAX) = 41.3mV = 6.88m . The next lowest 6A standard value is 6m. At the other set of tolerance extremes for the output in question, 59.3mV = 9.88A . Knowing this final da6.0m tum, we can determine the necessary wattage of the sense resistor using P = I2R, where I will be ILOAD(CONT, MAX), and R will be (0.97)(RSENSE(NOM)). These numbers yield the following: PMAX = (9.88A)2 (5.82m) = 0.568W. In this example, a 1W sense resistor is sufficient. MOSFET Selection ILOAD(CONT,MAX) = Selecting the proper external MOSFET for use with the MIC2584/85 involves three straightforward tasks: * Choice of a MOSFET which meets minimum voltage requirements. * Selection of a device to handle the maximum continuous current (steady-state thermal issues). * Verify the selected part's ability to withstand any peak currents (transient thermal issues).
CORE SUPPLY (VCC)
I/O SUPPLY (VDD)
VDD
VDD
Data In I1 OE OUTPUT DRIVER CIRCUIT BLOCK I2 OUTPUT DRIVER CIRCUIT BLOCK
Data In
OE
Data Out
Data Out
External Bus Control CORE I/O Dual Supply DSP
TX_/RX
Peripheral
Figure 11. Bidirectional Port Bus Contention March 2005 23 MIC2584/2585
MIC2584/2585
MOSFET Steady-State Thermal Issues The selection of a MOSFET to meet the maximum continuous current is a fairly straightforward exercise. First, arm yourself with the following data: * The value of ILOAD(CONT, MAX.) for the output in question (see "Sense Resistor Selection"). * The manufacturer's data sheet for the candidate MOSFET. * The maximum ambient temperature in which the device will be required to operate. * Any knowledge you can get about the heat sinking available to the device (e.g., can heat be dissipated into the ground plane or power plane, if using a surface-mount part? Is any airflow available?). The data sheet will almost always give a value of on resistance given for the MOSFET at a gate-source voltage of 4.5V, and another value at a gate-source voltage of 10V. As a first approximation, add the two values together and divide by two to get the on-resistance of the part with 8V of enhancement. Call this value RON. Since a heavily enhanced MOSFET acts as an ohmic (resistive) device, almost all that's required to determine steady-state power dissipation is to calculate I2R. The one addendum to this is that MOSFETs have a slight increase in RON with increasing die temperature. A good approximation for this value is 0.5% increase in RON per C rise in junction temperature above the point at which RON was initially specified by the manufacturer. For instance, if the selected MOSFET has a calculated RON of 10m at a TJ = 25C, and the actual junction temperature ends up at 110C, a good first cut at the operating value for RON would be:
Micrel
RON 10m[1 + (110 - 25)(0.005)] 14.3m The final step is to make sure that the heat sinking available to the MOSFET is capable of dissipating at least as much power (rated in C/W) as that with which the MOSFET's performance was specified by the manufacturer. Here are a few practical tips: 1. The heat from a surface-mount device such as an SO-8 MOSFET flows almost entirely out of the drain leads. If the drain leads can be soldered down to one square inch or more, the copper will act as the heat sink for the part. This copper must be on the same layer of the board as the MOSFET drain. 2. Airflow works. Even a few LFM (linear feet per minute) of air will cool a MOSFET down substantially. If you can, position the MOSFET(s) near the inlet of a power supply's fan, or the outlet of a processor's cooling fan. 3. The best test of a surface-mount MOSFET for an application (assuming the above tips show it to be a likely fit) is an empirical one. Check the MOSFET's temperature in the actual layout of the expected final circuit, at full operating current. The use of a thermocouple on the drain leads, or infrared pyrometer on the package, will then give a reasonable idea of the device's junction temperature. MOSFET Transient Thermal Issues Having chosen a MOSFET that will withstand the imposed voltage stresses, and the worse case continuous I2R power dissipation which it will see, it remains only to verify the MOSFET's ability to handle short-term overload power dissipation without overheating. A MOSFET can handle a much
Q1 IRF7822 (SO-8)
4
VIN 12V D1 (18V) R1 33k
3
RSENSE1 0.006 1 5% 2 C1 1F
*D2 1N5240B 10V CLOAD1 220F
VOUT 12V@6A
16
15
VCC1
SENSE1 GATE1
R3 10
14
R4 100k 1%
6
C2 0.01F ON MIC2584 FB1
12
R2 33k /POR CPOR
7
11
DOWNSTREAM SIGNAL
R5 13.3k 1%
GND
9
C3 0.05F Undervoltage (Output) = 11.0V /POR Delay = 25ms START-UP Delay = 6ms *Recommended for MOSFETs with gate-source breakdown of 20V or less for catastrophic output short circuit protection. (IRF7822 VGS(MAX) = 12V) Channel 2 and additional pins omitted for clarity.
Figure 12. Zener Clamped MOSFET Gate MIC2584/2585 24 March 2005
MIC2584/2585
higher pulsed power without damage than its continuous dissipation ratings would imply. The reason for this is that, like everything else, thermal devices (silicon die, lead frames, etc.) have thermal inertia. In terms related directly to the specification and use of power MOSFETs, this is known as "transient thermal impedance," or Z(J-A). Almost all power MOSFET data sheets give a Transient Thermal Impedance Curve. For example, take the following case: VIN = 12V, tOCSLOW has been set to 100msec, ILOAD(CONT. MAX) is 1.2A, the slow-trip threshold is 50mV nominal, and the fast-trip threshold is 100mV. If the output is accidentally connected to a 6 load, the output current from the MOSFET will be regulated to 1.2A for 100ms (tOCSLOW) before the part trips. During that time, the dissipation in the MOSFET is given by: P = E x I EMOSFET = [12V-(1.2A)(6)] = 4.8V PMOSFET = (4.8V x 1.2A) = 5.76W for 100msec. At first glance, it would appear that a really hefty MOSFET is required to withstand this sort of fault condition. This is where the transient thermal impedance curves become very useful. Figure 13 shows the curve for the Vishay (Siliconix) Si4410DY, a commonly used SO-8 power MOSFET. Taking the simplest case first, we'll assume that once a fault event such as the one in question occurs, it will be a long time, 10 minutes or more, before the fault is isolated and the channel is reset. In such a case, we can approximate this as a "single pulse" event, that is to say, there's no significant duty cycle. Then, reading up from the X-axis at the point where "Square Wave Pulse Duration" is equal to 0.1sec (=100msec), we see that the Z(J-A) of this MOSFET to a highly infrequent event of this duration is only 8% of its continuous R(J-A). This particular part is specified as having an R(J-A) of 50C/W for intervals of 10 seconds or less. Thus: Assume TA = 55C maximum, 1 square inch of copper at the drain leads, no airflow.
Micrel
Recalling from our previous approximation hint, the part has an RON of (0.0335/2) = 17m at 25C. Assume it has been carrying just about 1.2A for some time. When performing this calculation, be sure to use the highest anticipated ambient temperature (TA(MAX)) in which the MOSFET will be operating as the starting temperature, and find the operating junction temperature increase (TJ) from that point. Then, as shown next, the final junction temperature is found by adding TA(MAX) and TJ. Since this is not a closedform equation, getting a close approximation may take one or two iterations, But it's not a hard calculation to perform, and tends to converge quickly. Then the starting (steady-state)TJ is: TJ TA(MAX) + TJ TA(MAX) + [RON + (TA(MAX) - TA)(0.005/C)(RON)] x I2 x R(J-A) TJ 55C + [17m + (55C-25C)(0.005)(17m)] x (1.2A)2 x (50C/W) TJ (55C + (0.02815W)(50C/W) 54.6C Iterate the calculation once to see if this value is within a few percent of the expected final value. For this iteration we will start with TJ equal to the already calculated value of 54.6C: TJ TA + [17m + (54.6C-25C)(0.005)(17m)] x (1.2A)2 x (50C/W) TJ ( 55C + (0.02832W)(50C/W) 56.42C So our original approximation of 56.4C was very close to the correct value. We will use TJ = 56C. Finally, add (5.76W)(50C/W)(0.08) = 23C to the steady-state TJ to get TJ(TRANSIENT MAX.) = 79C. This is an acceptable maximum junction temperature for this part.
2
Normalized Thermal Transient Impedance, Junction-to-Ambient
Normalized Effective Transient Thermal Impedance
1 Duty Cycle = 0.5
0.2
Notes:
0.1 0.1 0.05
PDM t1 t2 t1 1. Duty Cycle, D = t2 2. Per Unit Base = RthJA = 50 C/W
0.02 Single Pulse 0.01 10--4 10--3 10--2 10--1 1
3. TJM --TA = PDMZthJA(t) 4. Surface Mounted
10
30
Square Wave Pulse Duration (sec)
Figure 13. Transient Thermal Impedance
March 2005
25
MIC2584/2585
MIC2584/2585
PCB Layout Considerations Because of the low values of the sense resistors used with the MIC2584/85 controllers, special attention to the layout must be used in order for the device's circuit breaker function to operate properly. Specifically, the use of a 4-wire Kelvin connection to accurately measure the voltage across RSENSE is highly recommended. Kelvin sensing is simply a means of making sure that any voltage drops in the power traces connecting to the resistors does not get picked up by the traces themselves. Additionally, these Kelvin connections should be isolated from all other signal traces to avoid introducing noise onto these sensitive nodes. Figure 14 illustrates a recommended, multi-layer layout for the RSENSE, Power MOSFET, timer(s), and feedback network connections. The feedback network resistor values are selected for
Micrel
a 12V application. Many hot swap applications will require load currents of several amperes. Therefore, the power (VCC and Return) trace widths (W) need to be wide enough to allow the current to flow while the rise in temperature for a given copper plate (e.g., 1oz. or 2oz.) is kept to a maximum of 10C ~ 25C. Also, these traces should be as short as possible in order to minimize the IR drops between the input and the load. For a starting point, there are many trace width calculation tools available on the web such as the following link: http://www.aracnet.com/cgi-usr/gpatrick/trace.pl Finally, the use of plated-through vias will be needed to make circuit connections to power and ground planes when utilizing multi-layer PC boards.
Current Flow to the Load *SENSE RESISTOR (2512)
D D
Current Flow to the Load *POWER MOSFET (SO-8)
G S S S
W
D D
W
**RGATE **CGATE
Via to GND plane
16
15
14
13
12
11
10
9
SENSE1
VCC1
OUT1
GATE1
/POR
W
DRAWING IS NOT TO SCALE Similar considerations should be used for Channel 2. *See Table 5 for part numbers and vendors. **Optional components. Trace width (W) guidelines given in "PCB Layout Recommendations" section of the datasheet.
Figure 14. Recommended PCB Layout for Sense Resistor, Power MOSFET and Feedback Network
MIC2584/2585
MIC2584
Current Flow from the Load
26
/FAULT
GND
FB1
12.4k 1% Via to GND plane
93.1k 1%
March 2005
MIC2584/2585
MOSFET and Sense Resistor Vendors Device types and manufacturer contact information for power MOSFETs and sense resistors is provided in Table 5. Some of the recommended MOSFETs include a metal heat sink on the bottom side of the package that is connected to the drain
Micrel
leads. The recommended trace for the MOSFET gate of Figure 14 must be redirected when using MOSFETs packaged in this style. Contact the device manufacturer for package information.
MOSFET Vendors Vishay (Siliconix)
Key MOSFET Type(s) Si4420DY (SO-8 package) Si4442DY (SO-8 package) Si3442DV (SO-8 package) Si7860DP (PowerPAKTM SO-8) Si7892DP (PowerPAKTM SO-8) Si7884DP (PowerPAKTM SO-8) SUB60N06-18 (TO-263) SUB70N04-10 (TO-263) IRF7413 (SO-8 package) IRF7457 (SO-8 package) IRF7822 (SO-8 package) IRLBA1304 (Super220TM) FDS6680A (SO-8 package) FDS6690A (SO-8 package) PH3230 (SOT669-LFPAK) HAT2099H (LFPAK)
*Applications IOUT 10A IOUT = 10A-15A, VCC 5V IOUT 3A, VCC 5V IOUT 12A IOUT 15A IOUT 15A IOUT 20A, VCC 5V IOUT 20A, VCC 5V IOUT 10A IOUT 10A IOUT = 10A-15A, VCC 5V IOUT 20A, VCC 5V IOUT 10A IOUT 10A, VCC 5V IOUT 20A IOUT 20A
Contact Information www.siliconix.com (203) 452-5664
International Rectifier
www.irf.com (310) 322-3331
Fairchild Semiconductor Philips Hitachi
www.fairchildsemi.com (207) 775-8100 www.philips.com www.halsp.hitachi.com (408) 433-1990
* These devices are not limited to these conditions in many cases, but these conditions are provided as a helpful reference for customer applications.
Resistor Vendors Vishay (Dale) IRC
Contact Information www.vishay.com/docswsl_30100.pdf (203) 452-5664 "OARS" Series www.irctt.com/pdf_files/OARS.pdf "LR" Series www.irctt.com/pdf_files/LRC.pdf (second source to "WSL") (828) 264-8861 Table 5. MOSFET and Sense Resistor Vendors
Sense Resistors "WSL" Series
March 2005
27
MIC2584/2585
MIC2584/2585
Micrel
Package Information
Rev. 01
16-Pin TSSOP (TS)
4.50 (0.177) 6.4 BSC (0.252) 4.30 (0.169)
DIMENSIONS: MM (INCH)
0.30 (0.012) 0.19 (0.007) 7.90 (0.311) 7.70 (0.303)
1.10 MAX (0.043)
0.20 (0.008) 0.09 (0.003)
0.65 BSC (0.026)
0.15 (0.006) 0.05 (0.002)
8 0
1.00 (0.039) REF 0.70 (0.028) 0.50 (0.020)
24-Pin TSSOP (TS)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
USA
+ 1 (408) 944-0800
FAX
+ 1 (408) 474-1000
WEB
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated.
MIC2584/2585
28
March 2005

▲Up To Search▲

Price & Availability of MIC2584

	To Download MIC2584 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .