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N-CHANNEL 60V - 0.060 - 24A DPAK/IPAK STripFETTM II POWER MOSFET Table 1: General Features TYPE STD16NF06L STD16NF06L Figure 1:Package RDS(on) < 0.070 ID 24 A VDSS 60 V TYPICAL RDS(on) = 0.060 LOGIC LEVEL DEVICE THROUGH-HOLE IPAK (TO-251) POWER PACKAGE IN TUBE (SUFFIX "-1") SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX "T4") 3 2 1 IPAK TO-251 (Suffix "-1") DPAK TO-252 (Suffix "T4") 3 1 DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility APPLICATIONS SWITCHING APPLICATIONS Figure 2: Internal Schematic Diagram Table 2: Order Codes SALES TYPE STD16NF06LT4 STD16NF06L-1 MARKING D16NF06L D16NF06L PACKAGE TO-252 TO-251 PACKAGING TAPE & REEL TUBE Table 3: ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM(*) Ptot dv/dt (1) EAS (2) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Storage Temperature Operating Junction Temperature Value 60 60 18 24 17 96 40 0.27 11.5 200 -55 to 175 (1) ISD 16A, di/dt 200A/s, VDD V(BR)DSS, Tj TJMAX (2) Starting Tj = 25 oC, ID = 20A, VDD= 48V Unit V V V A A A W W/C V/ns mJ C (*) Pulse width limited by safe operating area. March 2005 Rev. 3.0 1/11 STD16NF06L Table 4: THERMAL DATA Rthj-case Rthj-pcb Tl Thermal Resistance Junction-case (*)Thermal Resistance Junction-PCB Maximum Lead Temperature For Soldering Purpose (1.6 mm from case, for 10 sec) Max Max 3.75 62 275 C/W C/W C (*) When Mounted on 1 inch2 FR-4 board, 2 oz of Cu ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) Table 5: OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating TC = 125C VGS = 18V Min. 60 1 10 100 Typ. Max. Unit V A A nA Table 6: ON (5) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS VGS = 10 V VGS = 5 V ID = 250 A ID = 8 A ID = 8 A Min. 1 0.060 0.070 0.070 0.085 Typ. Max. Unit V Table 7: DYNAMIC Symbol gfs (*) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 15 V ID = 12 A Min. Typ. 12 370 69 30 Max. Unit S pF pF pF VDS = 25V f = 1 MHz VGS = 0 2/11 STD16NF06L ELECTRICAL CHARACTERISTICS (continued) Table 8: SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 30 V ID = 8 A VGS = 5 V RG = 4.7 (Resistive Load, Figure 17) VDD= 30 V ID= 16 A VGS= 5 V Min. Typ. 12 30 7.5 2.5 4.2 Max. Unit ns ns nC nC nC Table 9: SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions VDD = 30 V ID = 8 A VGS = 5 V RG = 4.7, (Resistive Load, Figure 17) Min. Typ. 20 6 Max. Unit ns ns Table 10: SOURCE DRAIN DIODE Symbol ISD ISDM (*) VSD (*) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current 1.5 %. Test Conditions Min. Typ. Max. 16 64 Unit A A V ns C A ISD = 64 A VGS = 0 53 85 3.2 1.5 ISD =16 A di/dt = 100A/s Tj = 150C VDD = 25 V (see test circuit, Figure 19) (1 )Pulse width limited by safe operating area. (2) Pulsed: Pulse duration = 300 s, duty cycle Figure 3: Safe Operating Area Figure 4: Thermal Impedance 3/11 STD16NF06L Figure 5: Output Characteristics Figure 6: Transfer Characteristics Figure 7: Transconductance Figure 8: Static Drain-source On Resistance Figure 9: Gate Charge vs Gate-source Voltage Figure 10: Capacitance Variations 4/11 STD16NF06L Figure 11: Normalized Gate Threshold Voltage vs Temperature Figure 12: Normalized on Resistance vs Temperature Figure 13: Source-drain Diode Forward Characteristics Figure 14: Normalized Breakdown Voltage vs Temperature. . . 5/11 STD16NF06L Figure 15: Unclamped Inductive Load Test Circuit Figure 16: Unclamped Inductive Waveform Figure 17: Switching Times Test Circuits For Resistive Load Figure 18: Gate Charge test Circuit Figure 19: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/11 STD16NF06L TO-252 (DPAK) MECHANICAL DATA mm MIN. A A1 A2 B B2 C C2 D E G H L2 L4 0.6 2.2 0.9 0.03 0.64 5.2 0.45 0.48 6 6.4 4.4 9.35 0.8 1 0.023 TYP. MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 6.6 4.6 10.1 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.252 0.173 0.368 0.031 0.039 inch TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 0.260 0.181 0.397 DIM. H A C2 C DETAIL "A" A1 L2 D DETAIL "A" B = = 3 B2 = = G E 2 L4 1 = = A2 0068772-B 7/11 STD16NF06L TO-251 (IPAK) MECHANICAL DATA DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033 H C A C2 L2 D B3 B6 A1 L = = 3 B5 B A3 = B2 = G = E L1 1 2 = 0068771-E 8/11 STD16NF06L *on sales type 9/11 STD16NF06L Table 11:Revision History Date March 2005 Revision 3.0 Description of Changes ADDED PACKAGE TO-251 10/11 STD16NF06L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics All other names are the property of their respective owners. (c) 2005 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco -Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America. www.st.com 11/11 |
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