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3.3 V, 50 Mbps to 4.25 Gbps Single-Loop Laser Diode Driver ADN2871
FEATURES
SFP/SFF and SFF-8472 MSA-compliant SFP reference design available 50 Mbps to 4.25 Gbps operation Automatic average power control Typical rise/fall time 60ps Supports VCSEL, DFB, and FP lasers Bias current range 2 mA to 100 mA Modulation current range 5 mA to 90 mA Laser fail alarm and automatic laser shutdown (ALS) Bias and modulation current monitoring 3.3 V operation 4 mm x 4 mm LFCSP Voltage setpoint control Resistor setpoint control Pin-compatible with ADN2870
GENERAL DESCRIPTION
The ADN2871 laser diode driver is designed for advanced SFP and SFF modules, using SFF-8472 digital diagnostics. The ADN2871 supports operation from 50 Mbps to 4.25 Gbps. Average power and extinction ratio can be set with a voltage provided by a microcontroller DAC or by a trimmable resistor or digital potentiometer. The average power control loop is implemented using feedback from a monitor photodiode. The part provides bias and modulation current monitoring as well as fail alarms and automatic laser shutdown. The device interfaces easily with the ADI ADuC70xx family of microconverters and with the ADN289x family of limiting amplifiers to make a complete SFP/SFF transceiver solution. An SFP reference design is available. The product is pin-compatible with the ADN2870 dual-loop LDD, allowing one PC board layout to work with either device. For dual-loop applications, refer to the ADN2870 data sheet. The product is available in a space-saving 4 mm x 4 mm LFCSP specified over the -40C to +85C temperature range. Figure 1 shows an application diagram of the voltage setpoint control with single-ended laser interface. Figure 36 shows a differential laser interface.
APPLICATIONS
1x/2x/4x Fibre Channel SFP/SFF modules Multirate OC3 to OC48-FEC SFP/SFF modules LX-4 modules DWDM/CWDM SFP modules 1GE SFP/SFF transceiver modules VCSEL, DFB, and FP transmitters
VCC VCC VCC VCC L VCC MPD FAIL ALS IMODN R IMODP DATAP ADI MICROCONTROLLER DAC ADC 1k DAC GND ERREF ERSET 1k GND IBMON VCC GND IMMON PAVCAP GND
05228-001
Tx_DISABLE Tx_FAULT
LASER
PAVSET PAVREF RPAV x100 IMOD CONTROL 100 IBIAS
DATAN
CCBIAS
ADN2871
NC
1k GND
470 GND
Figure 1. Application Diagram of Voltage Setpoint Control with Single-Ended Laser Interface Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c) 2005 Analog Devices, Inc. All rights reserved.
ADN2871 TABLE OF CONTENTS
Specifications..................................................................................... 3 SFP Timing Specifications............................................................... 5 Absolute Maximum Ratings............................................................ 6 Temperature Specifications ......................................................... 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Optical Waveforms ........................................................................... 8 Multirate Performance Using Low Cost Fabry Perot Tosa NEC NX7315UA .......................................................................... 8 Performance Over Temperature Using DFB Tosa SUMITOMO SLT2486................................................................. 8 Typical Performance Characteristics ............................................. 9 Single-Ended Output ................................................................... 9 Differential Output..................................................................... 10 Performance Characteristics..................................................... 11 Theory of Operation ...................................................................... 13 Laser Control .............................................................................. 13 Control Methods ........................................................................ 13 Voltage Setpoint Calibration..................................................... 13 Resistor Setpoint Calibration.................................................... 15 IMPD Monitoring ...................................................................... 15 Loop Bandwidth Selection........................................................ 16 Power Consumption .................................................................. 16 Automatic Laser Shutdown (TX_Disable) .............................. 16 Bias and Modulation Monitor Currents.................................. 16 Data Inputs.................................................................................. 17 Laser Diode Interfacing............................................................. 17 Alarms.......................................................................................... 18 Outline Dimensions ....................................................................... 19 Ordering Guide .......................................................................... 19
REVISION HISTORY
6/05--Revision 0: Initial Version
Rev. 0 | Page 2 of 20
ADN2871 SPECIFICATIONS
VCC = 3.0 V to 3.6 V. All specifications TMIN to TMAX1, unless otherwise noted. Typical values as specified at 25C. Table 1.
Parameter LASER BIAS CURRENT (IBIAS) Output Current IBIAS Compliance Voltage IBIAS when ALS is High MODULATION CURRENT (IMODP, IMODN)2 Output Current IMOD Compliance Voltage IMOD when ALS is High Rise Time Single-Ended Output2, 3 Fall Time Single-Ended Output2, 3 Random Jitter Single-Ended Output2, 3 Deterministic Jitter Single-Ended Output3, 4 Pulse-Width Distortion2, 3 Single-Ended Output Rise Time Differential Output3, 5 Fall Time Differential Output3, 5 Random Jitter Differential Output3, 5 Deterministic Jitter Differential Output3, 6 Pulse-Width Distortion Differential Output3, 5 Rise Time Differential Output3, 5 Fall Time Differential Output3, 5 Random Jitter Differential Output3, 5 Deterministic Jitter Differential Output3, 7 Pulse Width Distortion Differential Output3, 5 AVERAGE POWER SET (PAVSET) Pin Capacitance Voltage Photodiode Monitor Current (Average Current) EXTINCTION RATIO SET INPUT (ERSET) Resistance Range Resistance Range AVERAGE POWER REFERENCE VOLTAGE INPUT (PAVREF) Voltage Range Photodiode Monitor Current (Average Current) EXTINCTION RATIO REFERENCE VOLTAGE INPUT (ERREF) Voltage Range ERREF Voltage to IMOD Gain DATA INPUTS (DATAP, DATAN)8 V p-p (Differential) Input Impedance (Single-Ended) LOGIC INPUTS (ALS) VIH VIL Min 2 1.2 Typ Max 100 VCC 0.1 90 VCC 0.1 60 60 0.8 19 21 47.1 46 0.64 12 2.1 56 55 0.61 17 1.6 80 1.3 1200 25 1.01 1 1000 104 96 1.1 35 30 Unit mA V mA mA V mA ps ps ps (rms) ps ps ps ps ps (rms) ps ps ps ps ps (rms) ps ps pF V A k k V A Conditions/Comments
5 1.5
5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 20 mA < IMOD < 90 mA 20 mA < IMOD < 90 mA 5 mA < IMOD < 30 mA 5 mA < IMOD < 30 mA 5 mA < IMOD < 30 mA 5 mA < IMOD < 30 mA 5 mA < IMOD < 30 mA 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA
1.1 50 1.5 0.99 0.07 70
1.2
Resistor setpoint mode Resistor setpoint mode Voltage setpoint mode Voltage setpoint mode (RPAV fixed at 1 k) Voltage setpoint mode (RPAV fixed at 1 k) Voltage setpoint mode (RERSET fixed at 1 k)
1
0.05 100 0.4 50 2
0.9
V mA/V
2.4
V V V
AC-coupled
0.8
Rev. 0 | Page 3 of 20
ADN2871
Parameter ALARM OUTPUT (FAIL)9 VOFF Min Typ >1.8 Max Unit V Conditions/Comments Voltage required at FAIL for IBIAS and IMOD to turn off when FAIL asserted Voltage required at FAIL for IBIAS and IMOD to stay on when FAIL asserted 2 mA < IBIAS < 11 mA 11 mA < IBIAS < 50 mA 50 mA < IBIAS < 100 mA 10 mA < IBIAS < 100 mA
VON
<1.3
V
IBMON, IMMON DIVISION RATIO IBIAS/IBMON3 IBIAS/IBMON3 IBIAS/IBMON3 IBIAS/IBMON STABILITY3, 10 IMOD/IMMON IBMON Compliance Voltage SUPPLY ICC11 VCC (with respect to GND)12
1 2
76 85 92
94 100 100 42
112 115 108 5 1.3
0 32 3.3
A/A A/A A/A % A/A V mA V
When IBIAS = IMOD = 0
3.0
3.6
Temperature range: -40C to +85C. Measured into a single-ended 15 load (22 resistor in parallel with digital scope 50 input) using a 1111111100000000 pattern at 2.5 Gbps, shown in Figure 2. 3 Guaranteed by design and characterization. Not production tested. 4 Measured into a single-ended 15 load using a K28.5 pattern at 2.5 Gbps, shown in Figure 2. 5 Measured into a differential 30 (43 differential resistor in parallel with a digital scope of 50 input) load using a 1111111100000000 pattern at 4.25 Gbps, as shown in Figure 3. 6 Measured into a differential 30 load using a K28.5 pattern at 4.25 Gbps, as shown in Figure 3. 7 Measured into a differential 30 load using a K28.5 pattern at 2.7Gbps, as shown in Figure 3. 8 When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows in the IMODP pin. 9 Guaranteed by design. Not production tested. 10 IBIAS/IBMON ratio stability is defined in SFF-8472 Revision 9 over temperature and supply variation. 11 See the ICC minimum for power calculation in the Power Consumption section. 12 All VCC pins should be shorted together.
VCC
VCC L C BIAS TEE 80kHz 27GHz
ADN2871
IMODP
R 22
Figure 2. High Speed Electrical Test Single-Ended Output Circuit
BIAS TEE 80kHz 27GHz VCC
L C IMODN R 43 IMODP L C TO HIGH SPEED DIGITAL OSCILLOSCOPE 50 DIFFERENTIAL INPUT
ADN2871
VCC BIAS TEE 80kHz 27GHz
05228-040
Figure 3. High Speed Electrical Test Differential Output Circuit
Rev. 0 | Page 4 of 20
05228-002
TO HIGH SPEED DIGITAL OSCILLOSCOPE 50 INPUT
ADN2871 SFP TIMING SPECIFICATIONS
Table 2.
Parameter ALS Assert Time ALS Negate Time1 Time to Initialize, Including Reset of FAIL1 FAIL Assert Time ALS to Reset Time
1
Symbol t_off t_on t_init t_fault t_reset
Min
Typ 1 0.15 25
Max 5 0.4 275 100 5
Unit s ms ms s s
Conditions/Comments Time for the rising edge of ALS (TX_DISABLE) to when the bias current falls below 10% of nominal. Time for the falling edge of ALS to when the modulation current rises above 90% of nominal. From power-on or negation of FAIL using ALS. Time to fault to FAIL on. Time Tx_DISABLE must be held high to reset Tx_FAULT.
Guaranteed by design and characterization. Not production tested.
VSE DATAP DATAN
DATAP-DATAN 0V
05228-003
V p-p DIFF = 2 x VSE
Figure 4. Signal Level Definition
SFP MODULE
1H VCC_Tx 0.1F 0.1F 10F
05228-004
3.3V
SFP HOST BOARD
Figure 5. Recommended SFP Supply
Rev. 0 | Page 5 of 20
ADN2871 ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter VCC to GND IMODN, IMODP All Other Pins Junction Temperature Rating 4. 2 V -0.3 V to +4.8 V -0.3 to 3.9 V 150C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
TEMPERATURE SPECIFICATIONS
Table 4.
Parameter Operating Temperature Range Industrial Storage Temperature Range Junction Temperature (TJ max) LFCSP Power Dissipation1 JA Thermal Impedance2 JCThermal Impedance Lead Temperature (Soldering 10 sec)
1
Rating -40C to +85C -65C to +150C 125C (TJ max - TA)/JA W 30C/W 29.5C/W 300C
2
Power consumption equations are provided in the Power Consumption section. JA is defined when part is soldered on a 4-layer board.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 6 of 20
ADN2871 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IMMON ERREF
18 19
ERSET RPAV
IBMON
FAIL
VCC
13 12
GND VCC IMODP IMODN GND IBIAS
24
ALS DATAN DATAP
ADN2871
GND PAVCAP NC
7
PAVSET
1
PAVREF
GND
CCBIAS
VCC
6
05228-005
NC = NO CONNECT
Figure 6. Pin Configuration--Top View
Note: The LFCSP has an exposed paddle that must be connected to ground. Table 5. Pin Function Descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Mnemonic CCBIAS PAVSET GND VCC PAVREF RPAV NC PAVCAP GND DATAP DATAN ALS ERSET IMMON ERREF VCC IBMON FAIL GND VCC IMODP IMODN GND IBIAS Description Connect to IBIAS, Pin 24 Average Optical Power Set Pin Supply Ground Supply Voltage Reference Voltage Input for Average Optical Power Control Average Power Resistor when Using PAVREF No Connect Average Power Loop Capacitor Supply Ground Data, Positive Differential Input Data, Negative Differential Input Automatic Laser Shutdown Extinction Ratio Set Pin Modulation Current Monitor Current Source Reference Voltage Input for Extinction Ratio Control Supply Voltage Bias Current Monitor Current Source FAIL Alarm Output Supply Ground Supply Voltage Modulation Current Positive Output; connect to laser diode Modulation Current Negative Output Supply Ground Laser Diode Bias (Current Sink to Ground)
Rev. 0 | Page 7 of 20
ADN2871 OPTICAL WAVEFORMS
VCC = 3.3 V and TA = 25C, unless otherwise noted.
MULTIRATE PERFORMANCE USING LOW COST FABRY PEROT TOSA NEC NX7315UA
Note: No change to PAVCAP and ERCAP values.
(ACQ LIMIT TEST) WAVEFORMS 1000
PERFORMANCE OVER TEMPERATURE USING DFB TOSA SUMITOMO SLT2486
(ACQ LIMIT TEST) WAVEFORMS 1001
Figure 7. Optical Eye 2.488 Gbps,65 ps/div, PRBS 231-1 PAV = -4.5 dBm, ER = 9 dB, Mask Margin 25%
(ACQ LIMIT TEST) WAVEFORMS 1000
05228-006
Figure 10. Optical Eye 2.488 Gbps, 65 ps/div, PRBS 231-1 PAV = 0 dBm, ER = 9 dB, Mask Margin 22%, TA = 25C
(ACQ LIMIT TEST) WAVEFORMS 1001
05228-007
Figure 8. Optical Eye 622 Mbps, 264 ps/div, PRBS 231-1 PAV = -4.5 dBm, ER = 9 dB, Mask Margin 50%
(ACQ LIMIT TEST) WAVEFORMS 1000
Figure 11. Optical Eye 2.488 Gbps, 65 ps/div, PRBS 231-1 PAV = -0.2 dBm, ER = 8.96 dB, Mask Margin 21%, TA = 85C
Figure 9. Optical Eye 155 Mbps,1.078 ns/div, PRBS 231-1 PAV = -4.5 dBm, ER = 9 dB, Mask Margin 50%
05228-008
Rev. 0 | Page 8 of 20
05228-039
05228-038
ADN2871 TYPICAL PERFORMANCE CHARACTERISTICS
SINGLE-ENDED OUTPUT
These performance characteristics were measured using the high speed electrical single-ended output circuit shown in Figure 2.
90 1.2
1.0
60
0.8
RISE TIME (ps)
JITTER (rms)
30
05228-011
0.6
0.4
0.2
05228-014
0 0 20 40 60 MODULATION CURRENT (mA) 80
0 0 20 40 60 MODULATION CURRENT (mA) 80
100
100
Figure 12. Rise Time vs. Modulation Current, IBIAS = 20 mA
80
Figure 14. Random Jitter vs. Modulation Current, IBIAS = 20 mA
45 40
60
DETERMINISTIC JITTER (ps)
05228-012
35 30 25 20 15 10 5 0 20
05228-013
FALL TIME (ps)
40
20
0 0 20 40 60 MODULATION CURRENT (mA) 80
100
40 60 80 MODULATION CURRENT (mA)
100
Figure 13. Fall Time vs. Modulation Current, IBIAS = 20 mA
Figure 15. Deterministic Jitter at 2.488 Gbps vs. Modulation Current, IBIAS = 20 mA
Rev. 0 | Page 9 of 20
ADN2871
DIFFERENTIAL OUTPUT
These performance characteristics were measured using the high speed electrical differential output circuit shown in Figure 3.
90 1.2
1.0
RISE TIME (ps)
60
0.8
JITTER (rms)
30
05228-032
0.6
0.4
0.2
05228-034
0 0 20 40 60 80 MODULATION CURRENT (mA)
0 0 20 40 60 80 MODULATION CURRENT (mA)
100
100
Figure 16. Rise Time vs. Modulation Current, IBIAS = 20 mA
Figure 18. Random Jitter vs. Modulation Current, IBIAS = 20 mA
80
40 35
60
DETERMINISTIC JITTER (ps)
05228-033
30 25 20 15 10
05228-035
FALL TIME (ps)
40
20
5 0 0 20 40 60 80 MODULATION CURRENT (mA)
0 0 20 40 60 80 MODULATION CURRENT (mA)
100
100
Figure 17. Fall Time vs. Modulation Current, IBIAS = 20 mA
Figure 19. Deterministic Jitter at 4.25 Gbps vs. Modulation Current, IBIAS = 20 mA
Rev. 0 | Page 10 of 20
ADN2871
PERFORMANCE CHARACTERISTICS
250 220
60 55
TOTAL SUPPLY CURRENT (mA)
IBIAS = 80mA 190 160 IBIAS = 40mA
SUPPLY CURRENT (mA)
05228-015
50 45 40 35 30
05228-016
130 IBIAS = 20mA 100 IBIAS = 10mA
70
25 20 -50
40 0 20 40 60 MODULATION CURRENT (mA) 80
100
-30
-10
10 30 50 TEMPERATURE (C)
70
90
110
Figure 20. Total Supply Current vs. Modulation Current Total Supply Current = ICC + IBIAS + IMOD
120
Figure 23. Supply Current (ICC) vs. Temperature with ALS Asserted, IBIAS = 20 mA
55
115 110
50
MOD/IMMON RATIO
05228-017
IBIAS/IBMON RATIO
105 100 95 90 85 80 -50
45
40
35
05228-036
-30
-10
10 30 50 TEMPERATURE (C)
70
90
110
30 -50
-30
-10
10
30
50
70
90
110
TEMPERATURE (C)
Figure 21. IBIAS/IBMON Gain vs. Temperature, IBIAS = 20 mA
Figure 24. IMOD/IMMON Gain vs. Temperature, IMOD = 30 mA
OC48 PRBS31 DATA TRANSMISSION
t_OFF LESS THAN 1s
TRANSMISSION
ALS
05228-018
ALS
t_ON
05228-037
Figure 22. ALS Assert Time, 5 s/div
Figure 25. ALS Negate Time, 50 s/div
Rev. 0 | Page 11 of 20
ADN2871
TRANSMISSION ON FAIL ASSERTED
FAULT FORCED ON PAVSET POWER SUPPLY TURN ON
05228-021 05228-022
Figure 26. FAIL Assert Time,1 s/div
Figure 27. Time to Initialize, Including Reset, 40 ms/div
Rev. 0 | Page 12 of 20
ADN2871 THEORY OF OPERATION
Laser diodes have a current-in to light-out transfer function, as shown in Figure 28. Two key characteristics of this transfer function are the threshold current, Ith, and the slope in the linear region beyond the threshold current, referred to as the slope efficiency, LI.
ER =
OPTICAL POWER
CONTROL METHODS
The ADN2871 has two methods for setting the average power (PAV) and extinction ratio (ER). The average power and extinction ratio can be voltage-set using the output of a microcontroller's voltage DACs to provide controlled reference voltages, PAVREF and ERREF. Alternatively, the average power and extinction ratio can be resistor-set using potentiometers at the PAVSET and ERSET pins, respectively.
P1
P1 PO P1 + PO PAV = 2
PAV
P I P LI = I
VOLTAGE SETPOINT CALIBRATION
The ADN2871 allows interface to a microcontroller for both control and monitoring (see Figure 29). The average power and extinction ratio can be set using the microcontroller DACs to provide controlled reference voltages PAVREF and ERREF.
PAVREF = PAV x RSP x RPAV (Volts)
ERREF = I MOD x R ERSET (Volts) 100
PO Ith CURRENT
Figure 28. Laser Transfer Function
LASER CONTROL
Typically laser threshold current and slope efficiency are both functions of temperature. For FP- and DFB-type lasers, the threshold current increases and the slope efficiency decreases with increasing temperature. In addition, these parameters vary as the laser ages. To maintain a constant optical average power and a constant optical extinction ratio over temperature and laser lifetime, it is necessary to vary the applied electrical bias current and modulation current to compensate for the changing LI characteristics of the laser.
05228-023
where:
RSP = is the optical responsivity (in amperes per watt). PAV is the average power required.
RPAV = RERSET = 1 k. IMOD = Modulation current
In voltage setpoint mode, RPAV and RERSET must be 1 k resistors with a 1% tolerance and a temperature coefficient of 50 ppm/C.
Average Power Control Loop (APCL)
The APCL compensates for changes in Ith and LI by varying IBIAS. Average power control is performed by measuring MPD current, Impd. This current is bandwidth-limited by the MPD. This is not a problem because the APCL is required to respond to the average current from the MPD.
Power-On Sequence in Voltage Setpoint Mode
Note that during power up, there is an internal sequence that allows 25 ms before enabling the alarms; therefore, the customer must ensure that the voltage for PAVREF and ERREF are active within 20 ms after ramp-up of the power supply. If the PARREF and ERREF voltages are supplied after 25 ms then the part alarms and FAIL is activated.
Extinction Ratio (ER) Control
ER control is implemented by adjusting the modulation current. Temperature calibration is required in order to adjust the modulation current to compensate for variations of the laser characteristics with temperature.
Rev. 0 | Page 13 of 20
ADN2871
VCC VCC VCC VCC L VCC MPD FAIL ALS IMODN R IMODP DATAP ADI MICROCONTROLLER DAC ADC 1k DAC GND ERREF ERSET 1k GND IBMON VCC GND IMMON PAVCAP GND
05228-001
Tx_DISABLE Tx_FAULT
LASER
PAVSET PAVREF RPAV x100 IMOD CONTROL 100 IBIAS
DATAN
CCBIAS
ADN2871
NC
1k GND
470 GND
Figure 29. ADN2871 Using Microconverter Voltage Setpoint Calibration and Monitoring
VCC
VCC
VCC L VCC LASER
FAIL VCC MPD RPAV PAVSET VCC PAVREF
ALS
IMODN
R IMODP
DATAP DATAN
CONTROL
100 IBIAS
GND
VCC ERREF VREF ERSET
x100 IMOD
CCBIAS
ADN2871
GND VCC GND IBMON 1k GND IMMON 470 GND PAVCAP GND NC
Figure 30. ADN2871 Using Resistor Setpoint Calibration of Average Power and Extinction Ratio
Rev. 0 | Page 14 of 20
05228-025
ADN2871
RESISTOR SETPOINT CALIBRATION
In resistor setpoint calibration. PAVREF, ERREF, and RPAV must all be tied to VCC. The average power and extinction ratio can be set using the PAVSET and ERSET pins, respectively. A resistor is placed between the pin and GND to set the current flowing in each pin as shown in Figure 30. The ADN2871 ensures that both PAVSET and ERSET are kept 1.23 V above GND. The PAVSET and ERSET resistors are given by
RPAVSET = 1. 2 V PAV x RSP
()
RERSET = where:
1.2 V x 100 IMOD
()
IMOD is the modulation current required. PAV is the average power required.
RSP = is the optical responsivity (in amperes per watt).
Method 2: Measuring IMPD Across a Sense Resistor The second method has the advantage of providing a valid IMPD reading at all times, but has the disadvantage of requiring a differential measurement across a sense resistor directly in series with the IMPD. As shown in Figure 32, a small resistor, Rx, is placed in series with the IMPD. If the laser used in the design has a pinout where the monitor photodiode cathode and the lasers anode are not connected, a sense resistor can be placed in series with the photodiode cathode and VCC, as shown in Figure 33. When choosing the value of the resistor, the user must take into account the expected IMPD value in normal operation. The resistor must be large enough to make a significant signal for the buffered ADC to read, but small enough not to cause a significant voltage reduction across the IMPD. The voltage across the sense resistor should not exceed 250 mV when the laser is in normal operation. It is recommended that a 10 pF capacitor be placed in parallel with the sense resistor.
VCC
IMPD MONITORING
IMPD monitoring can be implemented for voltage setpoint and resistor setpoint as described next.
PHOTODIODE
LD
Voltage Setpoint
In voltage setpoint calibration, two methods may be used for IMPD monitoring.
Method 1: Measuring Voltage at RPAV The IMPD current is equal to the voltage at RPAV divided by the value of RPAV (see Figure 31) as long as the laser is on and is being controlled by the control loop. This method does not provide a valid IMPD reading when the laser is in shutdown or fail mode. A microconverter buffered ADC input may be connected to RPAV to make this measurement. No decoupling or filter capacitors should be placed on the RPAV node because this can disturb the control loop.
VCC PHOTODIODE PAVSET
C ADC DIFFERENTIAL INPUT
200 RESISTOR PAVSET
10pF
ADN2871
Figure 32. Differential Measurement of IMPD Across a Sense Resistor
VCC
VCC
200 RESISTOR
C ADC
INPUT
LD
PHOTODIODE PAVSET
ADN2871
ADN2871
C ADC
INPUT R 1k RPAV
Figure 33. Single Measurement of IMPD Across a Sense Resistor
Figure 31. Single Measurement of IMPD RPAV in Voltage Setpoint Mode
05228-026
Rev. 0 | Page 15 of 20
05228-028
05228-027
ADN2871
Resistor Setpoint
In resistor setpoint calibration, the current through the resistor from PAVSET to ground is the IMPD current. The recommended method for measuring the IMPD current is to place a small resistor in series with the PAVSET resistor (or potentiometer) and measure the voltage across this resistor as shown in Figure 34. The IMPD current is then equal to this voltage divided by the value of resistor used. In resistor setpoint calibration, PAVSET is held to 1.2 V nominal; it is recommended that the sense resistor should be selected so that the voltage across the sense resistor does not exceed 250 mV.
VCC PHOTODIODE PAVSET
This capacitor is placed between the PAVCAP pin and ground. It is important that the capacitor is a low leakage, multilayer ceramic type with an insulation resistance greater than 100 G or a time constant of 1000 seconds, whichever is less. Pick a standard off-the-shelf capacitor value such that the actual capacitance is within 30% of the calculated value after the capacitor's own tolerance is taken into account.
POWER CONSUMPTION
The ADN2871 die temperature must be kept below 125C. The LFCSP has an exposed paddle, which should be connected so that it is at the same potential as the ADN2871 ground pins. Power consumption can be calculated as
ICC = ICC min + 0.3 IMOD P = VCC x ICC + (IBIAS x VBIAS_PIN) + IMOD (VMODP_PIN + VMODN_PIN)/2
ADN2871
C ADC
INPUT
05228-029
R
TDIE = TAMBIENT + JA x P
Figure 34. Single Measurement of IMPD Across a Sense Resistor in Resistor Setpoint IMPD Monitoring
Thus, the maximum combination of IBIAS + IMOD must be calculated where: ICC min = 30 mA, the typical value of ICC provided in Table 1 with IBIAS = IMOD = 0. TDIE is the die temperature. TAMBIENT is the ambient temperature. VBIAS_PIN is the voltage at the IBIAS pin. VMODP_PIN is the voltage at the IMODP pin. VMODN_PIN is the voltage at the IMODN pin.
LOOP BANDWIDTH SELECTION
To ensure that the ADN2871 control loop has sufficient bandwidth, the average power loop capacitor (PAVCAP) is calculated using the laser's slope efficiency (watts/amps) and the average power required. For resistor setpoint control:
PAVCAP = 3.2 E - 6 x
LI (Farad) PAV
For voltage setpoint control: LI PAVCAP = 1.28 E - 6 x (Farad) PAV where PAV is the average power required and LI (mW/mA) is the typical slope efficiency at 25C of a batch of lasers that are used in a design. LI can be calculated as
P1 - P0 (mW/mA) LI = I MOD
AUTOMATIC LASER SHUTDOWN (TX_DISABLE)
ALS (TX_DISABLE) is an input that is used to shut down the transmitter's optical output. The ALS pin is pulled up internally with a 6 k resistor, and conforms to SFP MSA specifications. When ALS is logic high or when open, both the bias and modulation currents are turned off. If an alarm has triggered and the bias and modulation currents are turned off, ALS can be brought high and then low to clear the alarm.
BIAS AND MODULATION MONITOR CURRENTS
IBMON and IMMON are current-controlled current sources that mirror a ratio of the bias and modulation current. The monitor bias current, IBMON, and the monitor modulation current, IMMON, both should be connected to ground through a resistor to provide a voltage proportional to the bias current and modulation current, respectively. When using a microcontroller, the voltage developed across these resistors can be connected to two of the ADC channels, making available a digital representation of the bias and modulation current.
where P1 is the optical power (mW) at the one level, and P0 is the optical power (mW) at the zero level. The capacitor value equation is used to get a centered value for the particular type of laser that is used in a design and an average power setting. The laser LI can vary by a factor of 7 between different physical lasers of the same type and across temperatures without the need to recalculate the PAVCAP value.
Rev. 0 | Page 16 of 20
ADN2871
DATA INPUTS
Data inputs should be ac-coupled (10 nF capacitors are recommended) and are terminated via a 100 internal resistor between the DATAP and DATAN pins. A high impedance circuit sets the common-mode voltage and is designed to allow maximum input voltage headroom over temperature. It is necessary to use ac-coupling to eliminate the need for matching between common-mode voltages. The 30 transmission line used is a compromise between drive current required and the total power consumed. Other transmission line values can be used, with some modification of the component values. In Figure 35, the R and C snubber values 24 and 2.2 pF, respectively, represent a starting point and must be tuned for the particular model of laser being used. RP, the pull-up resistor, is in series with a very small (0.5 nH) inductor. In some cases, an inductor is not required or can be accommodated with deliberate parasitic inductance, such as a thin trace or a via, placed on the PC board. Care should be taken to mount the laser as close as possible to the PC board, minimizing the exposed lead length between the laser can and the edge of the board. The axial lead of a coax laser is very inductive (approximately 1 nH per mm). Long exposed leads result in slower edge rates and reduced eye margin. Recommended component layouts and gerber files are available by contacting the factory. Note that the circuit in Figure 35 can supply up to 56 mA of modulation current to the laser, sufficient for most lasers available today. Higher currents can be accommodated by changing transmission lines and backmatch values; contact the factory for recommendations. This interface circuit is not recommended for butterfly-style lasers or other lasers with 25 characteristic impedance. Instead, a 25 transmission line and inductive (instead of resistive) pull-up is recommended. The ADN2871 single-ended application shown in Figure 35 is recommended for use up to 2.7 Gbps. From 2.7 Gbps to 4.25 Gbps, a differential drive is recommended when driving VCSELs or lasers that have slow fall times. Differential drive can be implemented by adding a few extra components. A possible implementation is shown in Figure 36. The bias and modulation currents that are programmed into the ADN2871 need to be larger that the bias and modulation current required at the laser, due to the laser ac coupling interface and because some modulation current flows in pull-up resistors R1 and R2.
LASER DIODE INTERFACING
Figure 35 shows the recommended circuit for interfacing the ADN2871 to most TO-Can or coax lasers. DFB and FP lasers typically have impedances of 5 to 7 , and have axial leads. The circuit shown works over the full range of data rates from 155 Mbps to 3.3Gbps , including multirate operation (with no change to PAVCAP and ERCAP values); see the Multirate
Performance Using Low Cost Fabry Perot Tosa NEC NX7315UA section for multirate performance examples. Coax
lasers have special characteristics that make them difficult to interface to. They tend to have higher inductance, and their impedance is not well controlled. The circuit in Figure 35 operates by deliberately misterminating the transmission line on the laser side, while providing a very high quality matching network on the driver side. The impedance of the driver side matching network is very flat in comparison to frequency and enables multirate operation. A series damping resistor should not be used.
VCC L (0.5nH) RP 24 IMODP C 100nF Tx LINE 30 R 24 C 2.2pF
05228-030
VCC
ADN2871
IBIAS
Tx LINE 30
L BLMI8HG60ISN1D
Figure 35. Recommended Interface for ADN2871 AC Coupling
VCC L1 = 0.5nH
L4 = BLM18HG601SN1
R1 = 15 IMODN
C1 = C2 = 100nF
L3 = 4.7nH
TOCAN/VCSEL
ADN2871
IMODP IBIAS
20 TRANMISSION LINES
R3
C3 SNUBBER
LIGHT
R2 = 15
L2 = 0.5nH VCC
L6 = BLM18HG601SN1
SNUBBER SETTINGS: 40 AND 1.5pF, NOT OPTIMIZED, OPTIMIZATION SHOULD CONSIDER PARASITIC.
Figure 36. Recommended Differential Drive Circuit
Rev. 0 | Page 17 of 20
05228-031
ADN2871
ALARMS
The ADN2871 has a latched, active high monitoring alarm (FAIL). The FAIL alarm output is an open drain in conformance to SFP MSA specification requirements. The ADN2871 has a three-fold alarm system that covers
* *
Use of a bias current higher than expected, probably as a result of laser aging. Out-of-bounds average voltage at the monitor photodiode (MPD) input, indicating an excessive amount of laser power or a broken loop. Undervoltage in the IBIAS node (laser diode cathode) that would increase the laser power.
circuit in Figure 37 can be used to indicate that FAIL has been activated while allowing the bias and modulation currents to remain on. The transistor's VBE clamps the FAIL voltage to below 1.3 V disabling the automatic shutdown of bias and modulation currents. If an alarm has triggered and FAIL is activated ALS can be brought high and then low to clear the alarm.
VCC LED D1 R1 10k FAIL R2 330 Q1 NPN
*
ADN2871
The bias current alarm trip point is set by selecting the value of resistor on the IBMON pin to GND. The alarm is triggered when the voltage on the IBMON pin goes above 1.2 V. FAIL is activated when the single-point faults in Table 6 occur. The
Figure 37. FAIL Indication Circuit
Table 6. ADN2871 Single-Point Alarms
Alarm Type Bias Current MPD Current Crucial Nodes Pin Name IBMON PAVSET ERREF IBIAS Over Voltage or Short to VCC Condition Alarm if >1.2 V typical (+/-10% tolerance) Alarm if >threshold (typical threshold 1.5 V to 2.1 V) Alarm if shorted to VCC Ignore Under Voltage or Short to GND Condition Ignore Alarm if < threshold (typical threshold (0.6 V to 1.1 V) Ignore Alarm if shorted to GND
Table 7. ADN2871 Response to Various Single-Point Faults in AC-Coupled Configuration (as shown in Figure 35)
Pin CCBIAS PAVSET PAVREF RPAV Short to VCC Fault state occurs Fault state occurs Voltage mode: Fault state occurs Resistor mode: Tied to VCC Voltage mode: Fault state occurs Resistor mode: Tied to VCC Fault state occurs Does not increase laser average power Does not increase laser average power Output currents shut off Does not increase laser average power Does not affect laser power Voltage mode: Fault state occurs Resistor mode: Tied to VCC Fault state occurs Fault state occurs Does not increase laser average power Does not increase laser average power Fault state occurs Short to GND Fault state occurs Fault state occurs Fault state occurs Fault state occurs Open Does not increase laser average power Fault state occurs Fault state occurs Voltage mode: Fault state occurs Resistor mode: Does not increase average power Fault state occurs Does not increase laser average power Does not increase laser average power Output currents shut off Does not increase laser average power Does not increase laser average power Does not increase laser average power
PAVCAP DATAP DATAN ALS ERSET IMMON ERREF
IBMON FAIL IMODP IMODN IBIAS
Fault state occurs Does not increase laser average power Does not increase laser average power Normal currents Does not increase laser average power Does not increase laser average power Voltage mode: Does not increase average power Resistor mode: Fault state occurs Does not increase laser average power Does not increase laser average power Does not increase laser average power Does not increase laser average power Fault state occurs
Does not increase laser average power Does not increase laser average power Does not increase laser average power Does not increase laser power Fault state occurs
Rev. 0 | Page 18 of 20
05228-041
ADN2871 OUTLINE DIMENSIONS
4.00 BSC SQ
0.60 MAX 0.60 MAX
19 18 24 1
PIN 1 INDICATOR 2.25 2.10 SQ 1.95
6
PIN 1 INDICATOR
TOP VIEW
3.75 BSC SQ
0.50 BSC 0.50 0.40 0.30
BOTTOM VIEW
13 12 7
0.25 MIN 2.50 REF
1.00 0.85 0.80
12 MAX
0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.30 0.23 0.18 0.20 REF COPLANARITY 0.08
SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-2
Figure 38. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm x 4 mm Body, Very Thin Quad (CP-24-3) Dimensions shown in millimeters
Note: The LFCSP has an exposed paddle that must be connected to ground.
ORDERING GUIDE
Model ADN2871ACPZ1 ADN2871ACPZ-RL1 ADN2871ACPZ-RL71
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C
Package Description 24-Lead Lead Frame Chip Scale Package (LFCSP_VQ) 24-Lead Lead Frame Chip Scale Package (LFCSP_VQ) 24-Lead Lead Frame Chip Scale Package (LFCSP_VQ)
Package Option CP-24-3 CP-24-3 CP-24-3
Z = Pb-free part.
Rev. 0 | Page 19 of 20
ADN2871 NOTES
(c) 2005 Analog Devices, Inc. All rights reserved. Trade marks and registered trade marks are the property of their respective owners. D05228-0-6/05(0)
Rev. 0 | Page 20 of 20

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