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PD - 95376A
SMPS MOSFET
Applications High frequency DC-DC converters l Lead-Free
l
HEXFET(R) Power MOSFET
IRFR9N20DPBF IRFU9N20DPbF ID
9.4A
VDSS
200V
RDS(on) max
0.38
Benefits Low Gate-to-Drain Charge to Reduce Switching Losses l Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) l Fully Characterized Avalanche Voltage and Current
l
D-Pak IRFR9N20D
I-Pak IRFU9N20D
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
9.4 6.7 38 86 0.57 30 5.0 -55 to + 175 300 (1.6mm from case )
Units
A W W/C V V/ns C
Typical SMPS Topologies
l
Telecom 48V input Forward Converter
Notes through are on page 10
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1
12/06/04
IRFR/U9N20DPbF
Static @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units Conditions 200 --- --- V VGS = 0V, ID = 250A --- 0.23 --- V/C Reference to 25C, ID = 1mA --- --- 0.38 VGS = 10V, ID = 5.6A 3.0 --- 5.5 V VDS = VGS, ID = 250A --- --- 25 VDS = 200V, VGS = 0V A --- --- 250 VDS = 160V, VGS = 0V, TJ = 150C --- --- 100 VGS = 30V nA --- --- -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 4.3 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- 18 4.7 9.0 7.5 16 13 9.3 560 97 29 670 40 74 Max. Units Conditions --- S VDS = 50V, ID = 5.6A 27 ID = 5.6A 7.1 nC VDS = 160V 14 VGS = 10V, --- VDD = 100V --- ID = 5.6A ns --- RG = 11 --- VGS = 10V --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz --- VGS = 0V, V DS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 160V, = 1.0MHz --- VGS = 0V, VDS = 0V to 160V
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
100 5.6 8.6
Units
mJ A mJ
Thermal Resistance
Parameter
RJC RJA RJA Junction-to-Case Junction-to-Ambient (PCB mount)* Junction-to-Ambient Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Typ.
--- --- --- Min. Typ. Max. Units
Max.
1.75 50 110
Units
C/W
Diode Characteristics
IS
ISM
VSD trr Qrr ton
Conditions D MOSFET symbol --- --- 9.4 showing the A G integral reverse --- --- 38 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 5.6A, VGS = 0V --- 130 --- ns TJ = 25C, I F = 5.6A --- 560 --- nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFR/U9N20DPbF
100
VGS 15V 12V 10V 8.0V 7.0V 6.5V 6.0V BOTTOM 5.5V TOP
100
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 12V 10V 8.0V 7.0V 6.5V 6.0V BOTTOM 5.5V TOP
10
10
5.5V
1
1
5.5V
20s PULSE WIDTH TJ = 25 C
1 10 100
0.1 0.1
0.1 0.1
20s PULSE WIDTH TJ = 175 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.0
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 9.4A
I D , Drain-to-Source Current (A)
2.5
10
TJ = 175 C
2.0
1.5
TJ = 25 C
1
1.0
0.5
0.1 4 6 8
V DS = 50V 20s PULSE WIDTH 10 12
0.0 -60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFR/U9N20DPbF
10000
20
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ Ciss = C + Cgd , C gs ds SHORTED Crss = C gd Coss = Cds + Cgd
ID = 5.6A VDS = 160V VDS = 100V VDS = 40V
16
C, Capacitance(pF)
1000
Ciss
12
100
Coss
8
Crss
10 1 10 100 1000
4
VDS , Drain-to-Source Voltage (V)
0 0 5 10 15
FOR TEST CIRCUIT SEE FIGURE 13
20 25 30
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
10
ID , Drain Current (A)
100 10us 10 100us 1ms 1 10ms
TJ = 175 C
1
TJ = 25 C V GS = 0 V
0.4 0.6 0.8 1.0 1.2 1.4
0.1 0.2
0.1 1
TC = 25 C TJ = 175 C Single Pulse
10 100 1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFR/U9N20DPbF
10.0
V DS VGS
RD
8.0
ID , Drain Current (A)
RG VGS
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
6.0
4.0
Fig 10a. Switching Time Test Circuit
2.0
VDS 90%
0.0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1 D = 0.50 0.20 0.10 0.05 0.1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFR/U9N20DPbF
15V
EAS , Single Pulse Avalanche Energy (mJ)
200
TOP
160
VDS
L
DRIVER
BOTTOM
ID 2.3A 4.0A 5.6A
RG
20V
D.U.T
IAS tp
+ V - DD
120
A
0.01
80
Fig 12a. Unclamped Inductive Test Circuit
40
V(BR)DSS tp
0 25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
QG
12V .2F
50K .3F
QGS VG
QGD
D.U.T. VGS
3mA
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFR/U9N20DPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRFR/U9N20DPbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFR120 WIT H AS SEMBLY LOT CODE 1234 ASS EMBLED ON WW 16, 1999 IN T HE ASS EMBLY LINE "A" Note: "P" in ass embly line pos ition indicates "Lead-F ree" PART NUMBER INTERNAT IONAL RECT IF IER LOGO
IRFU120 12 916A 34
ASS EMBLY LOT CODE
DAT E CODE YEAR 9 = 1999 WEEK 16 LINE A
OR
PART NUMBER INT ERNAT IONAL RECTIF IER LOGO
IRFU120 12 34
DAT E CODE P = DESIGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YEAR 9 = 1999 WEEK 16 A = AS SEMBLY S ITE CODE
AS SEMBLY LOT CODE
8
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IRFR/U9N20DPbF
I-Pak (TO-251AA) Package Outline
(Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: THIS IS AN IRFU120 WIT H ASSEMBLY LOT CODE 5678 ASSE MBLED ON WW 19, 1999 IN T HE ASSE MBLY LINE "A" Note: "P" in as s embly line position indicates "Lead-F ree" PART NUMBER INT ERNAT IONAL RECTIF IER LOGO
IRFU120 919A 56 78
AS SEMBLY LOT CODE
DAT E CODE YEAR 9 = 1999 WEE K 19 LINE A
OR
INT ERNAT IONAL RECT IF IER LOGO PART NUMBER
IRF U120 56 78
ASS EMBLY LOT CODE
DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YEAR 9 = 1999 WEEK 19 A = ASS EMBLY S ITE CODE
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IRFR/U9N20DPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
16.3 ( .641 ) 15.7 ( .619 )
16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Starting TJ = 25C, L = 6.4mH
RG = 25, IAS = 5.6A.
ISD 5.6A, di/dt 110A/s, VDD V(BR)DSS,
TJ 175C * When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 12/04
10
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