View ISL84582_710789.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(R)
ISL84582
Data Sheet January 27, 2006 FN6213.1
Low-Voltage, Single and Dual Supply, Differential 4 to 1 Multiplexer
The Intersil ISL84582 device is made of precision, bidirectional, analog switches configured as a differential 4 channel multiplexer/demultiplexer. It is designed to operate from a single +2V to +12V supply or from a 2V to 6V dual supplies. The device has an inhibit pin to simultaneously open all signal paths. ON resistance of 39 with a 5V supply and 125 with a single +3.3V supply. Each switch can handle rail to rail analog signals. The off-leakage current is only 0.1nA at +25C or 2.5nA at +85C. All digital inputs have 0.8V to 2.4V logic thresholds, ensuring TTL/CMOS logic compatibility when using a single 3.3V or +5V supply or dual 5V supplies. The ISL84582 is a differential 4 to 1 multiplexer device. Table 1 summarizes the performance of this part.
TABLE 1. FEATURES AT A GLANCE Configuration 5V RON 5V tON/tOFF 12V RON 12V tON/tOFF 5V RON 5V tON/tOFF 3.3V RON 3.3V tON/tOFF Package Diff 4:1 Mux 39 32ns/18ns 32 23ns/15ns 65 43ns/20ns 125 70ns/32ns 16 Ld TSSOP
Features
* Pb-Free Plus Anneal Available (RoHS Compliant) * Fully Specified at 3.3V, 5V, 5V, and 12V Supplies for 10% Tolerances * ON Resistance (RON), VS = 4.5V. . . . . . . . . . . . . . . 44 * ON Resistance (RON), VS = +2.7V . . . . . . . . . . . . . 135 * RON Matching Between Channels, VS = 5V . . . . . . . . <2 * Low Charge Injection, VS = 5V . . . . . . . . . . . . . 1pC (Max) * Single Supply Operation. . . . . . . . . . . . . . . . . . . +2V to +12V * Dual Supply Operation . . . . . . . . . . . . . . . . . . . . . 2V to 6V * Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . . .<3W * Fast Switching Action (VS = +5V) - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns * Guaranteed Max Off-Leakage . . . . . . . . . . . . . . . . . . . 2.5nA * Guaranteed Break-Before-Make * TTL, CMOS Compatible
Applications
* Battery Powered, Handheld, and Portable Equipment * Communications Systems - Radios - Telecom Infrastructure - ADSL, VDSL Modems * Test Equipment - Medical Ultrasound - Magnetic Resonance Image - CT and PET Scanners (MRI) - ATE - Electrocardiograph * Audio and Video Signal Routing * Various Circuits - +3V/+5V DACs and ADCs - Sample and Hold Circuits - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing - Integrator Reset Circuits
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * Application Note AN557 "Recommended Test Procedures for Analog Switches" * Application Note AN520 "CMOS Analog Multiplexers and Switches; Specifications and Application Considerations." * Application Note AN1034 "Analog Switch and Multiplexer Applications"
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL84582 Pinout
ISL84582 (TSSOP) TOP VIEW
B0 1 B1 2 COMB 3 B3 4 B2 5 INH 6 V- 7 GND 8 LOGIC 16 V+ 15 A1 14 A2 13 COMA 12 A0 11 A3 10 ADDB 9 ADDA
Truth Table
ISL84582 INH 1 0 0 0 0 ADDB X 0 0 1 1 ADDA X 0 1 0 1 SWITCH ON NONE A0, B0 A1, B1 A2, B2 A3, B3
Pin Descriptions
PIN V+ VGND INH COMx Ax, Bx ADDx FUNCTION Positive Power Supply Pin Negative Power Supply Pin. Connect to GND for Single Supply Configurations. Ground Connection Digital Control Input. Connect to GND for Normal Operation. Connect to V+ to turn all switches off. Analog Mux Common Pin Analog Mux Signal Pin Address Input Pin
NOTE: Logic "0" 0.8V. Logic "1" 2.4V, with V+ between 2.7V and 10V. X = Don't Care.
Ordering Information
PART NO. (Note) ISL84582IVZ PART TEMP. MARKING RANGE (C) 84582IVZ -40 to 85 -40 to 85 PACKAGE (Pb-Free) PKG. DWG. #
16 Ld TSSOP M16.173 16 Ld TSSOP M16.173 Tape and Reel
ISL84582IVZ-T 84582IVZ
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2
FN6213.1 January 27, 2006
ISL84582
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15V V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15V V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V Input Voltages INH, NO, NC, ADD (Note 1) . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Output Voltages COM (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . 30mA Peak Current NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . 100mA ESD Rating HBM (Per Mil-STD-883, Method 3015.7) . . . . . . . . . . . . . . . >2kV
Thermal Information
Thermal Resistance (Typical, Note 2) JA (C/W) 16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 150 Maximum Junction Temperature (Plastic Package). . . . . . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300C (Lead Tips Only)
Operating Conditions
Temperature Range ISL84582IV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 85C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Signals on NC, NO, COM, ADD, INH exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings. 2. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications: 5V Supply
Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified TEST CONDITIONS TEMP (C) (NOTE 4) MIN TYP (NOTE 4) MAX UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON)
Full VS = 4.5V, ICOM = 2mA, VNO or VNC = 3V, (See Figure 5) VS = 4.5V, ICOM = 2mA, VNO or VNC = 3V, (Note 5) VS = 4.5V, ICOM = 2mA, VNO or VNC = 3V, 0V, (Note 6) VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V, (Note 7) VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V, (Note 7) VS = 5.5V, VCOM = VNO or VNC = 4.5V, (Note 7) 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full
V-0.1 -2.5 -0.1 -2.5 -0.1 -2.5
44 1.3 7.5 0.002 0.002 0.002 -
V+ 60 80 4 6 9 12 0.1 2.5 0.1 2.5 0.1 2.5
V nA nA nA nA nA nA
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINHH, VADDH Input Voltage Low, VINHL, VADDL Input Current, IADDH, IADDL, IINHH, VS = 5.5V, VINH, VADD = 0V or V+ IINHL DYNAMIC CHARACTERISTICS Inhibit Turn-ON Time, tON Inhibit Turn-OFF Time, tOFF VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3, (See Figure 1, Note 9) VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3, (See Figure 1, Note 9) 25 Full 25 Full 35 22 50 60 35 40 ns ns ns ns Full Full Full 2.4 -0.5 0.03 0.8 0.5 V V A
3
FN6213.1 January 27, 2006
ISL84582
Electrical Specifications: 5V Supply
Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified (Continued) TEST CONDITIONS VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3, (See Figure 1, Note 9) VS = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 3, Note 9) CL = 1.0nF, VG = 0V, RG = 0, (See Figure 2, Note 9) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7) RL = 50, CL = 15pF, f = 100kHz, VNOx = 1VRMS, (See Figures 4, 6 and 19) TEMP (C) 25 Full Full 25 25 25 25 25 25 25 (NOTE 4) MIN 2 TYP 43 7 0.3 3 12 18 92 110 -105 (NOTE 4) MAX UNITS 60 70 1 ns ns ns pC pF pF pF dB dB dB
PARAMETER Address Transition Time, tTRANS Break-Before-Make Time, tBBM Charge Injection, Q NO/NC OFF Capacitance, COFF COM OFF Capacitance, COFF COM ON Capacitance, CCOM(ON) OFF Isolation Crosstalk, (Note 8) All Hostile Crosstalk, (Note 8) POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ Negative Supply Current, INOTES:
Full VS = 5.5V, VINH, VADD = 0V or V+, Switch On or Off Full Full
2 -1 -1
-
6 1 1
V A A
3. VIN = Input logic voltage to configure the device in a given state. 4. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 5. RON = RON (MAX) - RON (MIN). 6. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range. 7. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25C. 8. Between any two switches. 9. Guaranteed but not tested.
Electrical Specifications: 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 3), Unless Otherwise Specified TEST CONDITIONS TEMP (C) (NOTE 4) MIN TYP (NOTE 4) MAX UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V, (See Figure 5) V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V, (Note 5) V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V, (Note 6) V+ = 13.2V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V, (Note 7) V+ = 13.2V, VCOM = 12V, 1V, VNO or VNC = 1V, 12V, (Note 7) V+ = 13.2V, VCOM = 1V, 12V, VNO or VNC = 1V, 12V, or floating, (Note 7) 25 Full Full Full 25 Full 25 Full 25 Full
0 -0.1 -2.5 -0.1 -2.5 -0.1 -2.5
37 47 1.2 5 0.002 0.002 0.002 -
V+ 0.1 2.5 0.1 2.5 0.1 2.5
V nA nA nA nA nA nA
RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON)
4
FN6213.1 January 27, 2006
ISL84582
Electrical Specifications: 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 3), Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (C) (NOTE 4) MIN TYP (NOTE 4) MAX UNITS
PARAMETER DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINHH, VADDH Input Voltage Low, VINHL, VADDL
Full Full Full
3.7 -0.5
3.3 2.7 -
0.8 0.5
V V A
Input Current, IADDH, IADDL, IINHH, V+ = 13.2V, VINH, VADD = 0V or V+ IINHL DYNAMIC CHARACTERISTICS Inhibit Turn-ON Time, tON V+ = 10.8V, VNO or VNC = 10V, RL = 300, CL = 35pF, VIN = 0 to 4, (See Figure 1, Note 9) V+ = 10.8V, VNO or VNC = 10V, RL = 300, CL = 35pF, VIN = 0 to 4, (See Figure 1, Note 9) V+ = 10.8V, VNO or VNC = 10V, RL = 300, CL = 35pF, VIN = 0 to 4, (See Figure 1, Note 9) V+ = 13.2V, RL = 300, CL = 35pF, VNO or VNC = 10V, VIN = 0 to 4, (See Figure 3, Note 9) CL = 1.0nF, VG = 0V, RG = 0, (See Figure 2, Note 9) RL = 50, CL = 15pF, f = 100kHz, (See Figure 4,6 and 19)
25 Full 25 Full 25 Full Full 25 25 25 25 25 25 25
2 -
24 15 27 5 2.7 92 110 -105 3 12 18
40 45 30 35 50 55 5 -
ns ns ns ns ns ns ns pC dB dB dB pF pF pF
Inhibit Turn-OFF Time, tOFF
Address Transition Time, tTRANS
Break-Before-Make Time Delay, tD Charge Injection, Q OFF Isolation Crosstalk, (Note 8) All Hostile Crosstalk, (Note 8)
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7) COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 7)
POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ V+ = 13.2V, VINH, VADD = 0V or V+, all channels on or off Full Full 2 -1 12 1 V A
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified TEST CONDITIONS TEMP (C) MIN (NOTE 4) TYP MAX (NOTE 4) UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V, (See Figure 5) V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3V, (Note 5) 25 Full 25 Full V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 1V, 2V, 3V, (Note 6) Full
0 -
81 2.2 11.5
V+ 100 120 4 6 -
V
RON Matching Between Channels, RON RON Flatness, RFLAT(ON)
5
FN6213.1 January 27, 2006
ISL84582
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (C) MIN (NOTE 4) TYP MAX (NOTE 4) UNITS
PARAMETER DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINHH, VADDH Input Voltage Low, VINHL, VADDL
Full Full Full
2.4 -0.5
-
0.8 0.5
V V A
Input Current, IADDH, IADDL, IINHH, V+ = 5.5V, VINH, VADD = 0V or V+ IINHL DYNAMIC CHARACTERISTICS Inhibit Turn-ON Time, tON V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1, Note 9) V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1, Note 9) V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1, Note 9) V+ = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 3, Note 9) CL = 1.0nF, VG = 0V, RG = 0, (See Figure 2, Note 9) RL = 50, CL = 15pF, f = 100kHz, VNOx = 1VRMS, (See Figures 4, 6 and 19)
25 Full 25 Full 25 Full Full 25 25 25 25
2 -
43 20 51 9 0.6 92 110 -105
60 70 35 40 70 85 1.5 -
ns ns ns ns ns ns ns pC dB dB dB
Inhibit Turn-OFF Time, tOFF
Address Transition Time, tTRANS
Break-Before-Make Time, tBBM Charge Injection, Q OFF Isolation Crosstalk, (Note 8) All Hostile Crosstalk, (Note 8)
POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ V+ = 5.5V, V- = 0V, VINH, VADD = 0V or V+, Switch On or Off Full Full 2 -1 12 1 V A
Electrical Specifications: 3.3V Supply
Test Conditions: V+ = +2.7V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified TEST CONDITIONS TEMP (C) MIN (NOTE 4) TYP MAX (NOTE 4) UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full V+ = 2.7V, ICOM = 1.0mA, VNO or VNC = 1.5V (See Figure 5) V+ = 2.7V, ICOM = 1.0mA, VNO or VNC = 1.5V, (Note 5) 25 Full 25 Full V+ = 2.7V, ICOM = 1.0mA, VNO or VNC = 0.5V, 1V, 2V, (Note 6) Full
0 -
175 3.4 55
V+ 180 200 8 10 -
V
RON Matching Between Channels, RON RON Flatness, RFLAT(ON)
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINHH, VADDH Input Voltage Low, VINHL, VADDL Input Current, IADDH, IADDL, IINHH, V+ = 3.6V, VINH, VADD = 0V or V+ IINHL Full Full Full 2.4 -0.5 0.8 0.5 V V A
6
FN6213.1 January 27, 2006
ISL84582
Electrical Specifications: 3.3V Supply
Test Conditions: V+ = +2.7V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 3), Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (C) MIN (NOTE 4) TYP MAX (NOTE 4) UNITS
PARAMETER DYNAMIC CHARACTERISTICS Inhibit Turn-ON Time, tON
V+ = 3.0V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1, Note 9) V+ = 3.0V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1, Note 9) V+ = 3.0V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 1, Note 9) V+ = 3.6V, VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V, (See Figure 3, Note 9) CL = 1.0nF, VG = 0V, RG = 0, (See Figure 2, Note 9) RL = 50, CL = 15pF, f = 100kHz, VNO or VNC = 1VRMS, (See Figures 4, 6 and 19)
25 Full 25 Full 25 Full Full 25 25 25 25
3 -
82 37 96 13 0.3 92 110 -105
100 120 50 60 120 145 1 -
ns ns ns ns ns ns ns pC dB dB dB
Inhibit Turn-OFF Time, tOFF
Address Transition Time, tTRANS
Break-Before-Make Time, tBBM Charge Injection, Q OFF Isolation Crosstalk, (Note 8) All Hostile Crosstalk, (Note 8)
POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ V+ = 3.6V, V- = 0V, VINH, VADD = 0V or V+, Switch On or Off Full Full 2 -1 12 1 V A
Test Circuits and Waveforms
V+ 3V LOGIC INPUT 50% 0V tON V+ NO0x NO1x-NO3x VNO0 SWITCH OUTPUT 0V tOFF 90% VOUT INH 90% LOGIC INPUT tr < 20ns tf < 20ns C C VC
ISL84582 COMx VOUT
GND ADDA-B
RL 300
CL 35pF
Logic input waveform is inverted for switches that have the opposite logic sense.
Repeat test for other switches. CL includes fixture and stray capacitance. RL V OUT = V (NO or NC) -----------------------------R L + R ( ON ) FIGURE 1B. INHIBIT tON/tOFF TEST CIRCUIT
FIGURE 1A. INHIBIT tON/tOFF MEASUREMENT POINTS
7
FN6213.1 January 27, 2006
ISL84582 Test Circuits and Waveforms (Continued)
3V LOGIC INPUT 50% 0V tTRANS V+ VNO0 SWITCH OUTPUT VOUT V90% C NO0x NO3x NO1x-NO2x ADDA-B 10% LOGIC INPUT GND ISL84582 COMx EN RL 300 VOUT tr < 20ns tf < 20ns C
V+
C
V-
C
0V
CL 35pF
VNOX tTRANS
Logic input waveform is inverted for switches that have the opposite logic sense.
Repeat test for other switches. CL includes fixture and stray capacitance. RL -----------------------------V OUT = V (NO or NC) R + R L ( ON ) FIGURE 1D. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1C. ADDRESS tTRANS MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
V+
C
V-
C
3V LOGIC INPUT OFF ON 0V 0 SWITCH OUTPUT VOUT Q = VOUT x CL ADDX VOUT VG GND INH LOGIC INPUT OFF RG NO or NC COM
VOUT
CL 1nF
FIGURE 2A. Q MEASUREMENT POINTS
Repeat test for other switches. FIGURE 2B. Q TEST CIRCUIT FIGURE 2. CHARGE INJECTION
V+ V-
C
C
3V LOGIC INPUT 0V
tr < 20ns tf < 20ns V+
C VOUT COMx NO0x-NO3x ISL84582 ADDA-B RL 300 CL 35pF
SWITCH OUTPUT VOUT 0V tBBM
80%
LOGIC INPUT
GND
INH
Repeat test for other switches. CL includes fixture and stray capacitance. FIGURE 3B. tBBM TEST CIRCUIT
FIGURE 3A. tBBM MEASUREMENT POINTS
FIGURE 3. BREAK-BEFORE-MAKE TIME
8
FN6213.1 January 27, 2006
ISL84582 Test Circuits and Waveforms (Continued)
V+
C
V-
C
V+
C
V-
C
SIGNAL GENERATOR
NO or NC
RON = V1/1mA NO or NC VNX 0V or V+ ADDX 0V or V+
COM
1mA
V1
0V or V+ ADDX
ANALYZER RL
GND
INH
COM
GND
INH
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5. RON TEST CIRCUIT
V+
C
V-
C
V+
C
V-
C
SIGNAL GENERATOR
50 NOA or NCA COMA NO or NC ADDX 0V or V+ NOB or NCB ISL84582 IMPEDANCE ANALYZER N.C. COM GND INH GND INH ADDX 0V or V+
ANALYZER RL
COMB
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
9
FN6213.1 January 27, 2006
ISL84582 Detailed Description
The ISL84582 multiplexer offers precise switching capability from a bipolar 2V to 6V or a single 2V to 12V supply with low on-resistance (39) and high speed operation (tON = 38ns, tOFF = 19ns) with dual 5V supplies. The device is especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2V), low power consumption (3W), low leakage currents (2.5nA max). High frequency applications also benefit from the wide bandwidth, and the very high off isolation and crosstalk rejection.
Power-Supply Considerations
The ISL84582 construction is typical of most CMOS analog switches, in that they have three supply pins: V+, V-, and GND. V+ and V- drive the internal CMOS switches and set their analog voltage limits, so there are no connections between the analog signal path and GND. Unlike switches with a 13V maximum supply voltage, the ISL84582 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies (6V or 12V single supply), as well as room for overshoot and noise spikes. The ISL84582 performs equally well when operated with bipolar or single voltage supplies. The minimum recommended supply voltage is 2V or 2V. It is important to note that the input signal range, switching times, and onresistance degrade at lower supply voltages. Refer to the electrical specification tables and Typical Performance curves for details. V+ and GND power the internal logic (thus setting the digital switching point) and level shifters. The level shifters convert the logic levels to switched V+ and V- signals to drive the analog switch gate terminals.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to V- (see Figure 8). To prevent forward biasing these diodes, V+ and V- must be applied before any input signals, and input signal voltages must remain between V+ and V-. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. This method is not applicable for the signal path inputs. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 8). These additional diodes limit the analog signal from 1V below V+ to 1V above V-. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages.
OPTIONAL PROTECTION RESISTOR FOR LOGIC INPUTS V+ 1k
Logic-Level Thresholds
V+ and GND power the internal logic stages, so V- has no affect on logic thresholds. This ISL84582 is TTL compatible (0.8V and 2.4V) over a V+ supply range of 2.7V to 10V. At 12V the VIH level is about 3.3V. This is still below the CMOS guaranteed high output minimum level of 4V, but noise margin is reduced. For best results with a 12V supply, use a logic family that provides a VOH greater than 4V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation.
High-Frequency Performance
In 50 systems, signal response is reasonably flat even past 100MHz (see Figures 17 and 18). Figures 17 and 18 also illustrates that the frequency response is very consistent over varying analog signal levels. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feed through from a switch's input to its output. Off Isolation is the resistance to this feed through, while Crosstalk indicates the amount of feed through from one switch to another. Figure 19 details the high Off Isolation and Crosstalk rejection provided by this family. At 10MHz, Off Isolation is about 55dB in 50 systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease Off Isolation and Crosstalk rejection due to the voltage divider action of the switch OFF impedance and the load impedance.
OPTIONAL PROTECTION DIODE
LOGIC VNO or NC VCOM
VOPTIONAL PROTECTION DIODE
FIGURE 8. INPUT OVERVOLTAGE PROTECTION
10
FN6213.1 January 27, 2006
ISL84582
Leakage Considerations
Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and V-. One of these diodes conducts if any analog signal exceeds V+ or V-. Virtually all the analog leakage current comes from the ESD diodes to V+ or V-. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and GND.
Typical Performance Curves TA = 25C, Unless Otherwise Specified
70 60 50 40 30 RON () 20 400 V- = 0V 300 200 85C 100 -40C 0 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 25C V- = -5V VCOM = (V+) - 1V ICOM = 1mA 85C 25C -40C RON () 120 110 100 90 80 70 60 50 90 80 70 60 50 40 30 60 50 40 30 20 -5 -40C -4 -3 -2 -1 1 0 VCOM (V) 2 3 4 5 ICOM = 1mA 85C 25C -40C VS = 3V 85C 25C -40C VS = 5V VS = 2V
25C
85C
FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
225 200 175 150 125 100 75 160 140 120 100 80 60 100 90 80 70 60 50 40 85C 25C -40C
ICOM = 1mA
60 55 50 ICOM = 1mA V+ = 12V V- = 0V
V+ = 2.7V V- = 0V RON ()
45 40 35 30 25C 85C
RON ()
85C 25C -40C V+ = 5V V- = 0V V+ = 3.3V V- = 0V
85C 25C
25 -40C -40C 20 5
0
1
2 VCOM (V)
3
4
0
2
4
6 VCOM (V)
8
10
12
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 12. ON RESISTANCE vs SWITCH VOLTAGE
11
FN6213.1 January 27, 2006
ISL84582 Typical Performance Curves TA = 25C, Unless Otherwise Specified (Continued)
500 400 300 200 100 tON (ns) 0 250 200 150 100 50 0 2 -40C 3 4 5 6 7 V+ (V) 8 9 10 11 12 85C 25C -40C V- = 0V V- = -5V -40C 25C 25C 85C tOFF (ns) VCOM = (V+) - 1V 200 150 100 25C 50 0 100 80 60 40 20 0 2 -40C 3 4 5 6 7 V+ (V) 8 9 10 11 12 -40C V- = 0V 85C 25C 85C -40C 25C V- = -5V VCOM = (V+) - 1V
FIGURE 13. INHIBIT TURN - ON TIME vs SUPPLY VOLTAGE
300
FIGURE 14. INHIBIT TURN - OFF TIME vs SUPPLY VOLTAGE
250 VCOM = (V+) - 1V 200
VCOM = (V+) - 1V V- = 0V
250
200 tRANS (ns) tRANS (ns) 150
150
100
100 25C 50 -40C 0 2 3 4 5 6 7 8 9 10 11 12 13 0 2 3 85C 50
25C 85C -40C 4 V (V) 5 6
V+ (V)
FIGURE 15. ADDRESS TRANS TIME vs SINGLE SUPPLY VOLTAGE
FIGURE 16. ADDRESS TRANS TIME vs DUAL SUPPLY VOLTAGE
NORMALIZED GAIN (dB)
VS = 5V 3 GAIN 0 -3
NORMALIZED GAIN (dB)
VIN = 0.2VP-P to 5VP-P
VS = 3V 3 GAIN 0 -3
VIN = 0.2VP-P to 4VP-P
PHASE (DEGREES)
45 90 135 180 RL = 50 1 10 100 FREQUENCY (MHz) 600
45 90 135 180 RL = 50 1 10 100 FREQUENCY (MHz) 600
FIGURE 17. FREQUENCY RESPONSE
FIGURE 18. FREQUENCY RESPONSE
12
FN6213.1 January 27, 2006
PHASE (DEGREES)
PHASE
0
PHASE
0
ISL84582 Typical Performance Curves TA = 25C, Unless Otherwise Specified (Continued)
-10 V+ = 3V to 12V or -20 VS = 2V to 5V RL = 50 -30 -40 CROSSTALK (dB) -50 -60 ISOLATION -70 -80 -90 -100 ALL HOSTILE CROSSTALK -110 1k 10k 100k 1M 10M 110 100M 500M CROSSTALK 70 80 90 100 -4 -5 -2.5 0 2.5 VCOM (V) 5 7.5 10 12 10 20 30 1 OFF ISOLATION (dB) 40 50 60 0 -1 -2 -3 V+ = 5V V- = 0V VS = 5V 3 2 V+ = 3.3V V- = 0V V+ = 12V V- = 0V
FREQUENCY (Hz)
Q (pC)
FIGURE 19. CROSSTALK AND OFF ISOLATION
FIGURE 20. CHARGE INJECTION vs SWITCH VOLTAGE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: ISL84582: 193 PROCESS: Si Gate CMOS
13
FN6213.1 January 27, 2006
ISL84582 Thin Shrink Small Outline Plastic Packages (TSSOP)
N INDEX AREA E E1 -B1 2 3 L 0.05(0.002) -AD -CSEATING PLANE A 0.25 0.010 GAUGE PLANE 0.25(0.010) M BM
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 b c D MIN 0.002 0.033 0.0075 0.0035 0.193 0.169 MAX 0.043 0.006 0.037 0.012 0.008 0.201 0.177 MILLIMETERS MIN 0.05 0.85 0.19 0.09 4.90 4.30 MAX 1.10 0.15 0.95 0.30 0.20 5.10 4.50 NOTES 9 3 4 6 7 8o Rev. 1 2/02
A1 0.10(0.004) A2 c
E1 e E L N
e
b 0.10(0.004) M C AM BS
0.026 BSC 0.246 0.020 16 0o 8o 0.256 0.028
0.65 BSC 6.25 0.50 16 0o 6.50 0.70
NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AB, Issue E. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E1" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 14
FN6213.1 January 27, 2006

▲Up To Search▲

Price & Availability of ISL84582

	To Download ISL84582 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .