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| STD70N02L STD70N02L-1 N-channel 24V - 0.0068 - 60A - DPAK - IPAK STripFETTM III Power MOSFET General features Type STD70N02L STD70N02L-1 VDSS 24V 24V RDS(on) <0.008 <0.008 ID 60A 60A 3 1 RDS(ON) * Qg industry's benchmark Conduction losses reduced Switching losses reduced Low threshold device 3 2 1 DPAK IPAK Description This series of products utilizes the latest advanced design rules of ST's proprietary STripFETTM technology. This is suitable for the most demanding DC-DC converter application where high efficiency is to be achieved. Internal schematic diagram Applications Switching application Order codes Part number STD70N02L-1 STD70N02L Marking D70N02L D70N02L Package IPAK DPAK Packaging Tube Tape & reel May 2006 Rev 4 1/17 www.st.com 17 Contents STD70N02L - STD70N02L-1 Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 4 5 6 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 STD70N02L - STD70N02L-1 Electrical ratings 1 Electrical ratings Table 1. Symbol Vspike (1) VDS VDGR VGS ID (2) ID IDM (3) PTOT Absolute maximum ratings Parameter Drain-source voltage rating Drain-source voltage (VGS = 0) Drain-gate voltage (R GS = 20k) Gate-source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC = 100C Drain current (pulsed) Total dissipation at T C = 25C Derating factor Value 30 24 24 20 60 42 240 60 0.4 280 -55 to 175 Unit V V V V A A A W W/C mJ C EAS (4) Tj Tstg Single pulse avalanche energy Operating junction temperature Storage temperature 1. Guaranted when external Rg=4.7 and Tf Symbol Thermal data Parameter Value 2.5 100 275 Unit C/W C/W C Rthj-case Thermal resistance junction-case Max Rthj-amb Thermal resistance junction-amb Max Tl Maximum lead temperature for soldering purpose 3/17 Electrical characteristics STD70N02L - STD70N02L-1 2 Electrical characteristics (Tcase =25C unless otherwise specified) Table 3. Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) On /off states Parameter Test conditions Min. 24 1 10 100 Typ. Max. Unit V A A nA V Drain-source breakdown ID = 25mA, V GS= 0 voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance VDS = 20V, VDS = 20V,Tc = 125C VGS = 20V VDS= VGS, ID = 250A VGS= 10V, ID= 30A VGS= 5V, ID= 15A 1 1.8 0.0068 0.008 0.090 0.014 Table 4. Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd RG QOSS(2) 1. Dynamic Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test conditions VDS =15V, ID = 30A Min. Typ. 27 1400 400 55 24 5 3.4 32 Max. Unit S pF pF pF nC nC nC VDS =16V, f=1MHz, VGS=0 VDD=10V, ID = 60A VGS =10V (see Figure 15) f=1MHz Gate DC Bias =0 test signal level =20mV open drain VDS =16V, VGS =0V Gate input resistance 0.5 1.5 3 Output charge 9.4 nC Pulsed: pulse duration = 300s, duty cycle 1.5% 2. Qoss.= Coss * D Vin, Coss = Cgd + Cgd. (see Appendix A) 4/17 STD70N02L - STD70N02L-1 Electrical characteristics Table 5. Symbol td(on) tr td(off) tf Switching times Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD=10V, ID=30A, RG=4.7, VGS=10V (see Figure 17) Min. Typ. 10 130 27 16 Max Unit ns ns ns ns 21.6 Table 6. Symbol ISD ISDM VSD (1) trr Qrr IRRM Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD=30A, V GS=0 ISD=60A, di/dt = 100A/s, VDD=20V, Tj=150C (see Figure 20) 36 36 2 Test conditions Min. Typ. Max. Unit 50 200 1.3 A A V ns nC A 1. Pulsed: pulse duration = 300s, duty cycle 1.5% 5/17 Electrical characteristics STD70N02L - STD70N02L-1 2.1 Figure 1. Electrical characteristics (curves) Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/17 STD70N02L - STD70N02L-1 Figure 7. Gate charge vs gate-source voltage Figure 8. Electrical characteristics Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on resistance vs temperature Figure 11. Source-drain diode forward characteristics Figure 12. Normalized BVDSS vs temperature 7/17 Electrical characteristics STD70N02L - STD70N02L-1 Figure 13. Allowable IAV vs time in avalanche The previous curve gives the single pulse safe operating area for unclamped inductive loads, under the following conditions: PD(AVE) =0.5*(1.3*BVDSS *IAV ) EAS(AR) =PD(AVE) *tAV Where: IAV is the allowable current in avalanche PD(AVE) is the average power dissipation in avalanche (single pulse) tAV is the time in avalanche 8/17 STD70N02L - STD70N02L-1 Appendix A Figure 14. Synchronous buck converter The power losses associated with the FETs in a Synchronous Buck converter can be estimated using the equations shown in the table below. The formulas give a good approximation, for the sake of performance comparison, of how different pairs of devices affect the converter efficiency. However a very important parameter, the wotking temperature, is not considered. The real device behavior is really dependent on how the heat generated inside the devices is removed to allow for a safer working junction temperature. The low side (SW2) device requires: Very low RDS(on) to reduce conduction losses Small Qgls to reduce the gate charge losses Small Coss to reduce losses due to output capacitance Small Qrr to reduce losses on SW1 during its turn-on The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source voltage to avoid the cross conduction phenomenon. The high side (SW1) device requires: Small Rg and Lg to allow higher gate current peak and to limit the voltage feedback on the gate Small Qg to have a faster commutation and to reduce gate charge losses Low RDS(on) to reduce the conduction losses 9/17 STD70N02L - STD70N02L-1 Table 7. Power losses High side switch (SW1) Low side switch (SW2) R DS ( on ) * I L * ( 1 - ) 2 Pconduction R DS ( on ) * I L * 2 Pswitching IL V in * ( Q gsth ( SW1 ) + Q gd ( SW1 ) ) * f * --Ig recovery Not applicable Zero voltage switching 1 Vin * Q rr ( SW2 ) * f Pdiode conduction Not applicable V f ( SW2 ) * I L * t deadtime * f Q gls ( SW2) * V gg * f V in * Q oss ( SW2 ) * f -----------------------------------------------2 Pgate(Qg) Q g ( SW1) * V gg * f V in * Q oss ( SW1 ) * f -----------------------------------------------2 PQoss Table 8. Power losses parameters Meaning Duty-cycle Post threshold gate charge Third quadrant gate charge On state losses On-off transition losses Conduction and reverse recovery diode losses Gate driver losses Output capacitance losses Paramter d Qgsth Qgls Pconduction Pswitching Pdiode Pgate PQoss 10/17 STD70N02L - STD70N02L-1 Test circuits 3 Test circuits Figure 16. Gate charge test circuit Figure 15. Switching times test circuit for resistive load Figure 17. Test circuit for inductive load Figure 18. Unclamped inductive load test switching and diode recovery times circuit Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform 11/17 Package mechanical data STD70N02L - STD70N02L-1 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at : www.st.com 12/17 STD70N02L - STD70N02L-1 Package mechanical data TO-251 (IPAK) MECHANICAL DATA DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033 H C A C2 L2 D B3 B6 A1 L = = 3 B5 B A3 = B2 = G = E L1 1 2 = 0068771-E 13/17 Package mechanical data STD70N02L - STD70N02L-1 DPAK MECHANICAL DATA mm. DIM. MIN. A A1 A2 B b4 C C2 D D1 E E1 e e1 H L (L1) L2 L4 R V2 2.2 0.9 0.03 0.64 5.2 0.45 0.48 6 5.1 6.4 4.7 2.28 4.4 9.35 1 2.8 0.8 0.6 0.2 0 8 0 1 0.023 0.008 8 4.6 10.1 0.173 0.368 0.039 0.110 0.031 0.039 6.6 0.252 0.185 0.090 0.181 0.397 TYP MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.200 0.260 TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 inch 0068772-F 14/17 STD70N02L - STD70N02L-1 Package mechanical data 5 Package mechanical data DPAK FOOTPRINT All dimensions are in millimeters TAPE AND REEL SHIPMENT REEL MECHANICAL DATA DIM. A B C D G N T 1.5 12.8 20.2 16.4 50 22.4 18.4 13.2 mm MIN. MAX. 330 0.059 0.504 0.520 0.795 0.645 0.724 1.968 0.881 BULK QTY 2500 inch MIN. MAX. 12.992 TAPE MECHANICAL DATA DIM. A0 B0 B1 D D1 E F K0 P0 P1 P2 R W BASE QTY 2500 mm MIN. 6.8 10.4 1.5 1.5 1.65 7.4 2.55 3.9 7.9 1.9 40 15.7 16.3 inch MIN. MAX. 7 0.267 0.275 0.409 0.417 0.476 0.059 0.063 0.059 0.065 0.073 0.291 0.299 0.100 0.108 0.153 0.161 0.311 0.319 0.075 0.082 1.574 0.618 0.641 MAX. 10.6 12.1 1.6 1.85 7.6 2.75 4.1 8.1 2.1 15/17 Revision history STD70N02L - STD70N02L-1 6 Revision history Table 9. Date 29-Aug-2005 02-Dec-2005 07-Apr-2006 03-May-2006 Revision history Revision 1 2 3 4 First release Modified Appendix A New template New value in Table 3, new curve (see Figure 13) Changes 16/17 STD70N02L - STD70N02L-1 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZE REPRESENTATIVE OF ST, ST PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS, WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 17/17 |
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