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| CMOS Low Power Consumption 2 Voltage Detectors Built-in Detect Voltage Accuracy : 2% Detect Voltage Range : 1.5V ~ 5.0V SOT-25 Package APPLICATIONS Microprocessor reset circuitry Memory battery back-up circuits Power-on reset circuits Power failure detection System battery life and charge voltage monitors Delay circuitry GENERAL DESCRIPTION The XC612 series consist of 2 voltage detectors, in 1 mini-molded, SOT-25 package. The series provides accuracy and low power consumption through CMOS processing and laser trimming and consists of a highly accurate voltage reference source, 2 comparators, hysteresis and output driver circuits. The input (VIN1) for voltage detector 1 (VD1) dually functions as the power supply pin for both detector 1 (VD1) and detector 2 (VD2). FEATURES Highly Accurate :Setting voltage accuracy 2% Low Power Consumption :2.0A(TYP.) (VIN1=VIN2=2.0V, Static state) Detect Voltage :1.5V ~ 5.0V programmable in 100mV steps. Detector's voltages can be set-up independently Conditionaly; XC612N : VDET1>VDET2 XC612D, XC612E : VDET1>VDET2, VDET1 TYPICAL PERFORMANCE CHARACTERISTICS XC612 ETR0204_001.doc 143 XC612 Series PIN CONFIGURATION PIN ASSIGNMENT PIN NUMBER 1 2 3 4 5 PIN NAME VDET1 VIN1 VSS VIN2 VDET2 FUNCTION Voltage Detector 1 Output Detector 1 Input, Power Supply Ground Voltage Detector 2 Input Voltage Detector 2 Output PRODUCT CLASSIFICATION Selection Guide TYPE XC612N XC612D XC612E VDET1 N-ch Open Drain N-ch Open Drain CMOS VDET2 N-ch Open Drain CMOS N-ch Open Drain Ordering Information XC612 DESIGNATOR DESCRIPTION Output Configuration Detect Voltage 1 (VDET1) Detect Voltage 2 (VDET2) Package Device Orientation SYMBOL N D E 1550 1550 M R L DESCRIPTION : VDET1/VDET2: N-ch open drain : VDET1: N-ch open drain, VDET2: CMOS : VDET1: CMOS, VDET2: N-ch open drain : VDET1: 2.5V25 : VDET2: 3.3V33 : SOT-25 (SOT-23-5) : Embossed tape, standard feed : Embossed tape, reverse feed 144 XC612 Series PACKAGING INFORMATION SOT-25 MARKING RULE SOT-25 Represents output configuration MARK CONFIGURATION VDET1 VDET2 N-ch Open Drain N-ch Open Drain N-ch Open Drain CMOS CMOS N-ch Open Drain PRODUCT SERIES XC612NxxxxMx XC612DxxxxMx XC612ExxxxMx 5 4 N D E 1 2 3 , Represents sequence number Represents production lot number 0 to 9, A to Z repeated. (G, I, J, O, Q, W excepted.) 145 XC612 Series BLOCK DIAGRAMS XC612N Series XC612D Series XC612E Series XC612E Series 146 XC612 Series ABSOLUTE MAXIMUM RATINGS PARAMETER VD 1 Input Voltage VD 2 VD 1 (N-ch open drain) VD 1 (CMOS) Output Voltage VD 2 (N-ch open drain) VD 2 (CMOS) VD 1 Output Current VD 2 Power Dissipation Operating Temperature Range Storage Temperature Range SYMBOL VIN1 VIN2 VVDET1 VVDET2 IVDET1 IVDET2 Pd Topr Tstg RATINGS 12.0 12.0 VSS - 0.3 ~ 12.0 VSS - 0.3 ~ VIN1 + 0.3 VSS - 0.3 ~ 12.0 VSS - 0.3 ~ VIN1 + 0.3 50 50 150 - 30 ~ + 80 - 40 ~ + 125 Ta = 25 UNITS V V V V V V mA mA mW 147 XC612 Series ELECTRICAL CHARACTERISTICS Ta=25 PARAMETER Detect Voltage (VDET1) (*1) Detect Voltage (VDET2) (*1) Hysteresis Range 1 Hysteresis Range 2 SYMBOL VDF1 VDF2 VHYS1 VHYS2 MIN. VDF1 x 0.98 Voltage when VDET2 changes from VDF2 H to L following a reduction of VIN2 x 0.98 Voltage (VDR1) - VDF1 when VDET1 changes VDF1(T) from L to H following an increase of VIN1 x 0.02 Voltage (VDR2) - VDF2 when VDET2 changes VDF2(T) from L to H following an increase of VIN2 x 0.02 VIN1 = 1.5V VIN1 = 2.0V 1.0 0.3 3.0 5.0 6.0 7.0 VIN1 = 3.0V VIN1 = 4.0V VIN1 = 5.0V VIN2 = 1.5V VIN2 = 2.0V VIN2 = 3.0V VIN2 = 4.0V VIN2 = 5.0V VDF(T) = 1.5V to 6.0V VIN1 = 1.0V VIN1 = 2.0V N-ch, VDS=0.5V VIN1 = 3.0V VIN1 = 4.0V VIN1 = 5.0V P-ch (CMOS) VDS=-2.1V VIN1 = 8.0V -30 Topr 80 (VDRVOUT inversion) CONDITIONS Voltage when VDET1 changes from H to L following a reduction of VIN1 TYP. VDF1 VDF2 VDF1(T) x 0.05 VDF2(T) x 0.05 1.35 1.50 1.95 2.40 3.00 0.45 0.50 0.65 0.80 1.00 2.2 7.7 10.1 11.5 13.0 -10.0 100 - MAX. UNITS CIRCUITS VDF1 V 1 x 1.02 VDF2 V 1 x 1.02 VDF1(T) V 1 x 0.08 VDF2(T) V 1 x 0.08 3.90 4.50 5.10 5.70 6.30 1.30 1.50 1.70 1.90 2.10 10 -2.0 0.2 A 2 Supply Current (VIN1 Input Current) ISS VIN2 Input Current IIN2 A 2 Operating Voltage VIN1 V Output Current (*3) IVDET mA 3 Temperature VDF Characteristics (*3) ToprVDF Delay Time (*3) tDLY (Release Voltage Output inversion) ppm/ ms 5 NOTE: *1 : VDF1(T), VDF2(T) : User specified detect voltage. *2 : Release voltage (VDR) = VDF +VHYS *3 : Those parameters marked with an asterisk apply to both VDET1 and VDET2. *4 : Input Voltage : please ensure that VIN1 > VIN2 (Input voltage of XC612D and XC612E series : please ensure that VIN1 > VIN2, VIN1 < VIN2.) *5 : VIN1 pin serve both ISS and power supply pin so that VIN2 operates VIN1 as a power supply source. For normal operation of VIN2, operating voltage higher than the minimum is needed to be applied to power supply pin VIN1. *6 : For CMOS output products, high level output voltage which is generated when the transient response is released becomes input voltage of VIN. 148 XC612 Series OPERATONAL EXPLANATION Timing Chart (Pull up voltage =Input voltage VIN1) Operational Notes (N-ch Open drain) Timing Chart A (VIN1=voltages above release voltage, VIN2=sweep voltage) Because a voltage higher than the minimum operating voltage is applied to the voltage input pin (VIN), ground voltage will be output at the output pin (VDET) during stage 3. (Stages 1, 2, 4, 5 are the same as in B below). Timing Chart B (VIN1=VIN2) When a voltage greater than the release voltage (VDR) is applied to the voltage input pin (VIN1, VIN2), input voltage (VIN1, VIN2) will gradually fall. When a voltage greater than the detect voltage (VDF) is applied to the voltage input pin (VIN1, VIN2), a state of high impedance will exist at the output pin (VDET1, VDET2), so should the pin be pulled up, voltage will be equal to pull up voltage. When input voltage (VIN1, VIN2) falls below detect voltage (VDF), output voltage (VDET1, VDET2) will be equal to ground level (VSS). Should input voltage (VIN1, VIN2) fall below the minimum operational voltage (VMIN), output will become unstable. Should VIN2 fall below VMIN, voltage at the output pin (VDET2) will be equal to ground level (VSS) if the power supply (VIN1) is within the operating voltage range. *In general the output pin is pulled up so output will be equal to pull up voltage. Should input voltage (VIN1, VIN2) rise above ground voltage (VSS), output voltage (VDET1, VDET2) will equal ground level until the release voltage level (VDR) is reached. When input voltage (VIN1, VIN2) rises above release voltage, the output pin's (VDET1, VDET2) voltage will be equal to the voltage dependent on pull up. Note : The difference between release voltage (VDR) and detect voltage (VDF) is the Hysteresis Range . 149 XC612 Series NOTES ON USE 1. Please use this IC within the specified maximum absolute ratings. 2. Please ensure that input voltage VIN2 is less than VIN1 + 0.3V. (refer to N.B. 1 below) 3. With a resistor connected between the VIN1 pin and the input, oscillation is liable to occur as a result of through current at the time of release. (refer to N.B. 2 below) 4. With a resistor connected between the VIN1 pin and the input, detect and release voltage will rise as a result of the IC's supply current flowing through the VIN1 pin. 5. In order to stabilize the IC's operations, please ensure that the VIN1 pin's input frequency's rise and fall times are more than 5 msec/V. 6. Should the power supply voltage VIN1 exceed 6V, voltage detector 2's detect voltage (VDF2) and the release voltage (VDR2) will shift somewhat. 7. For CMOS output products, high level output voltage which is generated when the transient response is released becomes input voltage of VIN. N.B. 1. Voltage detector 2's input voltage (VIN2) An input protect diode is connected from input detector 2's input (VIN2) to input detector 1's input. Therefore, should the voltage applied to VIN2 exceed VIN1, current will flow through VIN1 via the diode. (refer to diagram1) 2. Oscillation as a result of through current Since the XC612 series are CMOS ICs, through current will flow when the IC's internal circuit switching operates (during release and detect operations). Consequently, oscillation is liable to occur as a result of drops in voltage at the through current's resistor (RIN) during release voltage operations. (refer to diagram 2) Since hysteresis exists during detect operations, oscillation is unlikely to occur. Diagram 1. Voltage detector 2's input voltage VIN2 Diagram 2. Through current oscillation 150 XC612 Series TEST CIRCUITS Circuit 1 * A resistor is not needed for CMOS output type. Circuit 2 Circuit 3 XC612N Series XC612D Series 151 XC612 Series TEST CIRCUITS (Continued) Circuit 3 (Continued) XC612E Series Circuit 4 152 XC612 Series TYPICAL PERFORMANCE CHARACTERISTICS Ambient Temperature Topr () Ambient Temperature Topr () Note: Unless otherwise stated, pull up resistance = 100kwith N-ch open drain output type. 153 XC612 Series TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 154 XC612 Series APPLICATION CIRCUITS EXAMPLE *Example covers N-channel open drain product's circuits Window comparator circuit Detect voltages above respective established voltages circuit On resistors R1 and R2 equation (1) and (2) Detect voltage = { (R1 + R2) / R2} x VDF2 N.B. VDF2 = detect voltage VD2 Hysteresis (VHYS2) = { (R1 + R2) /R2 } x VHYS2 (1) (2) Note: Please ensure that input voltage 2 (VIN2) is less than VIN1 + 0.3V Detect voltage circuit with delay built-in Note: Delay operates at both times of release and detect operations. 155 |
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