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Dual 0.275% Comparators and Reference with Programmable Hysteresis ADCMP341/ADCMP343
FEATURES
400 mV 0.275% threshold User programmable hysteresis via resistor string Supply range: 1.7 V to 5.5 V Low quiescent current: 6.5 A typical Input range includes ground Low input bias current: 5 nA maximum Open-drain outputs Supports wired-AND connections Input polarities: ADCMP341 noninverting ADCMP343 inverting Small SOT-23 package
FUNCTIONAL BLOCK DIAGRAMS
VDD VINA R1 +INA_U R2 R3 400mV VINB +INB_U +INB_L
MUX
ADCMP341
MUX
+INA_L
OUTA
OUTB
APPLICATIONS
Portable applications Li-Ion monitoring Handheld instruments LED/relay driving Optoisolator driving Control systems
GND
Figure 1. ADCMP341
VDD
VINA R1 R2 R3 -INA_U -INA_L
ADCMP343
MUX
OUTA
GENERAL DESCRIPTION
The ADCMP341/ADCMP343 consist of two low power, high accuracy comparators with a 400 mV reference in an 8-lead SOT-23 package. Operating within a supply range of 1.7 V to 5.5 V, the devices only draw 6.5 A (typical), making them ideal for low voltage system monitoring and portable applications. Hysteresis is determined using three resistors in a string configuration with the upper and lower tap points connected to the INA_U and INA_L pins of each comparator, respectively. The state of the outputs of the comparators selects which pin is internally connected to the comparators input. Therefore, a change of state in the comparators output results in one of the inputs being switched in to the comparator and the other being switched out. This provides the user with a fully flexible and accurate method of setting the hysteresis. One input of each comparator is internally connected to the reference. The other input is available externally, via an internal mux, through pins INA_U or INA_L. The state of the output determines which of these pins is connected at any one time. The comparator outputs are open-drain with the output stage sinking capability guaranteed greater than 5 mA over temperature. The ADCMP341 has noninverting inputs and the ADCMP343 has inverting inputs. The devices are suitable for portable, commercial, industrial, and automotive applications.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
400mV VINB -INB_U -INB_L
MUX
OUTB
GND
Figure 2. ADCMP343
R1 = 22k R2 = 2.2k R3 = 6.2k
1
OUTA
VIN
2
06500-029
CH1 2.00V
CH2 500mV
M100ms
Figure 3. Hysteresis programmed to 513 mV @ VIN on ADCMP341
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2007 Analog Devices, Inc. All rights reserved.
06500-002
06500-001
ADCMP341/ADCMP343 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagrams............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 Thermal Characteristics .............................................................. 4 ESD Caution.................................................................................. 4 Pin Configurations and Function Descriptions ........................... 5 Typical Performance Characteristics ..............................................6 Application Information................................................................ 10 Comparators and Internal Reference ...................................... 10 Power Supply............................................................................... 10 Inputs ........................................................................................... 10 Outputs ........................................................................................ 10 Programming Hysteresis ........................................................... 10 Layout Recommendations ........................................................ 10 Outline Dimensions ....................................................................... 11 Ordering Guide .......................................................................... 11
REVISION HISTORY
2/07--Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADCMP341/ADCMP343 SPECIFICATIONS
VDD = 1.7 V to 5.5 V, -40C TA +125C, unless otherwise noted. Table 1.
Parameter THRESHOLDD1 Threshold Voltage Min 396.6 399.3 398.5 395.0 397.4 396.9 391.2 393.4 393.2 Typ 400.4 400.4 400.4 400.4 400.4 400.4 400.4 400.4 400.4 16 6.5 7.0 0.01 0.01 140 140 0.01 0.01 10 8 0.5 0.07 9 10 5 5 220 220 1 1 Max 404.3 401.5 402.2 405.8 403.4 403.7 407.7 405.6 405.8 0.275 Unit mV mV mV mV mV mV mV mV mV % ppm/C A A nA nA mV mV A A s s s s Test Conditions/Comments VDD = 1.7 V, TA = 25C VDD = 3.3 V, TA = 25C VDD = 5.5 V, TA = 25C VDD = 1.7 V, 0C TA 70C VDD = 3.3 V, 0C TA 70C VDD = 5.5 V, 0C TA 70C VDD = 1.7 V, -40C TA +125C VDD = 3.3 V, -40C TA +125C VDD = 5.5 V, -40C TA +125C TA = 25C, VDD = 3.3 V
Threshold Voltage Accuracy Threshold Voltage Temperature Coefficient POWER SUPPLY Supply Current INPUT CHARACTERISTICS Input Bias Current OPEN-DRAIN OUTPUTS Output Low Voltage 2 Output Leakage Current 3 DYNAMIC PERFORMANCE2, 4 High-to-Low Propagation Delay Low-to-High Propagation Delay Output Rise Time Output Fall Time
1 2
VDD = 1.7 V VDD = 5.5 V VDD = 1.7 V, VIN = VDD VDD = 1.7 V, VIN = 0.1 V VDD = 1.7 V, IOUT = 3 mA VDD = 5.5 V, IOUT = 5 mA VDD = 1.7 V, VOUT = VDD VDD = 1.7 V, VOUT = 5.5 V VDD = 5 V, VOL = 400 mV VDD = 5 V, VOH = 0.9 x VDD VDD = 5 V, VO = (0.1 to 0.9) x VDD VDD = 5 V, VO = (0.1 to 0.9) x VDD
RL = 100 k, VO = 2 V swing. 10 mV input overdrive. 3 VIN = 40 mV overdrive. 4 RL = 10 k.
Rev. 0 | Page 3 of 12
ADCMP341/ADCMP343 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter VDD INA_U, INA_L, INB_U, INB_L OUTA, OUTB Operating Temperature Range Storage Temperature Range Lead Temperature Soldering (10 sec) Vapor Phase (60 sec) Infrared (15 sec) Rating -0.3 V to +6 V -0.3 V to +6 V -0.3 V to +6 V -40C to +125C -65C to +150C 300C 215C 220C
THERMAL CHARACTERISTICS
JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance
Package Type 8-Lead SOT-23 JA 211.5 Unit C/W
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Rev. 0 | Page 4 of 12
ADCMP341/ADCMP343 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
OUTA +INA_U +INA_L GND
1 2 3 4 8
OUTB VDD +INB_U
06500-003
OUTA -INA_U -INA_L GND
1 2 3 4
8
OUTB VDD -INB_U -INB_L
06500-004
ADCMP341
TOP VIEW (Not to Scale)
7 6 5
ADCMP343
TOP VIEW (Not to Scale)
7 6 5
+INB_L
Figure 4. ADCMP341 Pin Configuration
Figure 5. ADCMP343 Pin Configuration
Table 4. Pin Function Descriptions
Pin No. 1 2 Mnemonic OUTA INA_U Description Open-Drain Output for Comparator A. Monitors Analog Input Voltage on Comparator A. Connect to the upper tap point of the resistor string. Connect internally to the noninverting input on the ADCMP341 or the inverting pin on the ADCMP343 via a mux controlled by the output level on Comparator A. The other input of Comparator A is connected to a 400 mV reference. Monitors Analog Input Voltage on Comparator A. Connect to the lower tap point of the resistor string. Connect internally to the noninverting input on the ADCMP341 or the inverting pin on the ADCMP343 via a mux controlled by the output level on Comparator A. The other input of Comparator A is connected to a 400 mV reference. Ground. Monitors Analog Input Voltage on Comparator B. Connect to the lower tap point of the resistor string. Connect internally to the noninverting input on the ADCMP341 or the inverting pin on the ADCMP343 via a mux controlled by the output level on Comparator B. The other input of Comparator B is connected to a 400 mV reference. Monitors Analog Input Voltage on Comparator B. Connect to the upper tap point of the resistor string. Connect internally to the noninverting input on the ADCMP341 or the inverting pin on the ADCMP343 via a mux controlled by the output level on Comparator B. The other input of Comparator B is connected to a 400 mV reference. Power Supply Pin. Open-Drain Output for Comparator B.
3
INA_L
4 5
GND INB_L
6
INB_U
7 8
VDD OUTB
Rev. 0 | Page 5 of 12
ADCMP341/ADCMP343 TYPICAL PERFORMANCE CHARACTERISTICS
60 50
PERCENT OF UNITS (%) RISING INPUT THRESHOLD VOLTAGE (mV)
VDD = 5V TA = 25C
404
402
1 2 3 4
FOUR TYPICAL PARTS VDD = 5V
40
30
400
20
398
10
06500-005
394 395 396 397 398 399 400 401 402 403 404 405 406 RISING INPUT THRESHOLD VOLTAGE (mV)
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
Figure 6. Distribution of Rising Input Threshold Voltage
401
Figure 9. Rising Input Threshold Voltage vs. Temperature
1
RISING INPUT THRESHOLD VOLTAGE (mV)
TA = -40C
400
0
THRESHOLD SHIFT (mV)
TA = +25C
399 TA = +85C 398
-1
-2
TA = -40C TA = +25C TA = +85C TA = +125C
397 TA = +125C 396
-3
-4
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 7. Rising Input Threshold Voltage vs. Supply Voltage
10
50
Figure 10. Minimum Supply Voltage
NO LOAD CURRENT
9
SUPPLY CURRENT (mA)
40 SUPPLY CURRENT (A)
8 TA = +85C 7
TA = +125C
30
TA = +25C 6 TA = -40C 5
20 TA = +25C TA = +85C TA = +125C TA = -40C 0 0.5 1.0 SUPPLY VOLTAGE (V) 1.5
06500-010
10
2.2
2.7
3.2
3.7
4.2
4.7
5.2
SUPPLY VOLTAGE (V)
Figure 8. Quiescent Supply Current vs. Supply Voltage
06500-008
4 1.7
0
Figure 11. Start-Up Supply Current
Rev. 0 | Page 6 of 12
06500-009
2.2
2.7
3.2
3.7
4.2
4.7
5.2
5.7
06500-007
395 1.7
-5 1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
06500-006
0
396 -40
ADCMP341/ADCMP343
1000 TA = -40C VDD VDD VDD VDD = 5.0V = 3.3V = 2.5V = 1.7V 1000 TA = 25C VDD VDD VDD VDD = 5.0V = 3.3V = 2.5V = 1.7V
SUPPLY CURRENT (A)
SUPPLY CURRENT (A)
100
100
10
10
06500-011
0.01
0.1
1
10
100
0.01
0.1
1
10
100
OUTPUT SINK CURRENT (mA)
OUTPUT SINK CURRENT (mA)
Figure 12. Supply Current vs. Output Sink Current
1000
10k
Figure 15. Supply Current vs. Output Sink Current
TA = 85C
100
INPUT BIAS CURRENT (nA)
VDD VDD VDD VDD
= 5.0V = 3.3V = 2.5V = 1.7V
TA = +125C 1k
CURRENT IS GOING OUT OF THE DEVICE. VDD = 5V -0.3V < VIB < 0V
SUPPLY CURRENT (A)
100 TA = +85C
10
TA = +25C
10
1
TA = -40C
06500-013
0.01
0.1
1
10
100
-0.2
-0.1
0
OUTPUT SINK CURRENT (mA)
INPUT VOLTAGE (V)
Figure 13. Supply Current vs. Output Sink Current
3
10
Figure 16. Below Ground Input Bias Current
1 INPUT BIAS CURRENT (nA) TA = +125C TA = +85C TA = +25C TA = -40C INPUT BIAS CURRENT (nA)
1
TA = +125C
-1
TA = +85C
-3
0.1
TA = +25C
TA = -40C
-5
06500-015
0
0.2
0.4
0.6
0.8
1.0
1
2
3 INPUT VOLTAGE (V)
4
5
INPUT VOLTAGE (V)
Figure 14. Low Level Input Bias Current
Figure 17. High Level Input Bias Current
Rev. 0 | Page 7 of 12
06500-016
-7
CURRENT IS POSITIVE GOING INTO THE DEVICE. VDD = 5V 0V < VIB < 1V
0.01
CURRENT IS GOING INTO THE DEVICE VDD = 5V VIB > 1V
06500-014
1 0.001
0.1 -0.3
06500-012
1 0.001
1 0.001
ADCMP341/ADCMP343
1000
OUTPUT SATURATION VOLTAGE (mV)
100
OUTPUT SATURATION VOLTAGE (mV)
TA = 25C VDD = 5.0V VDD = 3.3V VDD = 2.5V VDD = 1.8V
1000
TA = -40C VDD = 5.0V VDD = 3.3V VDD = 2.5V VDD = 1.8V
100
10
10
06500-017
0.01
0.1
1
10
0.01
0.1
1
10
OUTPUT SINK CURRENT (mA)
OUTPUT SINK CURRENT (mA)
Figure 18. Output Saturation Voltage vs. Output Sink Current
1000
Figure 21. Output Saturation Voltage vs. Output Sink Current
80 VDD = 5V 70
SHORT-CIRCUIT CURRENT (mA)
OUTPUT SATURATION VOLTAGE (mV)
TA = 85C VDD = 5.0V VDD = 3.3V VDD = 2.5V VDD = 1.8V
TA = +25C
TA = -40C
60 50 TA = +85C 40 30 20 10 TA = +125C
100
10
06500-019
0.01
0.1
1
10
0
2 OUTPUT VOLTAGE (V)
4
OUTPUT SINK CURRENT (mA)
Figure 19. Output Saturation Voltage vs. Output Sink Current
70 60
Figure 22. Short-Circuit Current vs. Output Voltage
10
TA = 25C
VDD = 5.0V
VDD = 5V TA = +125C
OUTPUT LEAKAGE CURRENT (nA)
SHORT-CIRCUIT CURRENT (mA)
50 40 30 20 10 0 VDD = 3.3V
1 TA = +85C TA = +25C 0.1 TA = -40C
VDD = 2.5V
VDD = 1.8V
0.01
06500-021
0
2 OUTPUT VOLTAGE (V)
4
0
1
2
3
4
5
OUTPUT VOLTAGE (V)
Figure 20. Short-Circuit Current vs. Output Voltage
Figure 23. Output Leakage Current vs. Output Voltage
Rev. 0 | Page 8 of 12
06500-022
0.001
06500-020
1 0.001
0
06500-018
1 0.001
1 0.001
ADCMP341/ADCMP343
60 TA = 25C LH NON INV LH INV HL NON INV HL INV 100 VDD = 5V CL = 20pF TA = 25C
50
PROPAGATION DELAY (s)
RISE AND FALL TIMES (s)
10 RISE 1
40
30
20
0.1 FALL 0.01 0.1
10
06500-023
0
20
40
60
80
100
1
10
100
1000
INPUT OVERDRIVE (mV)
OUTPUT PULL-UP RESISTOR (k)
Figure 24. Propagation Delay vs. Input Overdrive
Figure 26. Rise and Fall Times vs. Output Pull-Up Resistor
NON INV (OUTA)
R1 = 22k R2 = 2.2k R3 = 6.2k
2
INV (OUTB)
1
OUTA
3
VIN (+INA, -INB)
1
VIN
2
06500-026
CH1 50.0mV CH3 5.00V
CH2 5.00V
M20.0s
CH1
7mV
06500-024
CH1 2.00V
CH2 500mV
M100ms
Figure 25. Noninverting and Inverting Comparators Propagation Delay
Figure 27. Hysteresis Programmed to ~513 mV at Top of Input String (Hysteresis at ADCMP341 Pins 104 mV)
Rev. 0 | Page 9 of 12
06500-025
0
ADCMP341/ADCMP343 APPLICATION INFORMATION
The ADCMP341/ADCMP343 are dual, low power comparators with a built-in 400 mV reference that operates from 1.7 V to 5.5 V. The comparators are 0.275% accurate with fully programmable hysteresis, implemented using a new technique of a three-resistor string on the input. These open-drain outputs are capable of sinking up to 40 mA.
I R3 >> I BIAS
R3 is therefore
R3 = VREF I R3
Now R2 can be calculated from the following:
COMPARATORS AND INTERNAL REFERENCE
Each of the comparators has one input available externally; the other comparator inputs are connected internally to the 400 mV reference. The ADCMP341 has two noninverting comparators and the ADCMP343 has two inverting comparators. There are two input pins available to each comparator. However, these two input pins (INx_U, INx_L) connect to the same input leg of the comparator via a muxing system. This is to provide fully programmable rising and falling trip points. The output of the comparator determines which pin is connected to the input of the same comparator. Using Figure 28 as an example, when OUTA is high, +INA_U is connected to the comparator input. When the input voltage drops and passes below the 400 mV reference, the output goes low. This in turn disconnects +INA_U from the comparator and connects +INA_L. This leg of the string is at a lower voltage and thus instantaneously the effect of hysteresis is applied. Therefore, using a resistor string on the input as shown in Figure 28, the voltages for the rising and falling trip points can be programmed by selecting the appropriate resistors in the string.
R2 =
R3 (VRISING - VFALLING ) VFALLING
R1 can then be calculated using the following equation:
V R1 = R3 x RISING - 1 - R2 V REF
where: VREF is the specified on chip reference. IBIAS is the maximum specified input bias current. R1, R2, and R3 are the three resistors as shown in Figure 28. IR3 is the current flowing through R3. VFALLING is the desired falling trip voltage and lower of the two. VRISING is the desired rising trip voltage and higher of the two.
VDD
VINA R1 R2 R3 +INA_U +INA_L
ADCMP341
MUX
OUTA
06500-027
POWER SUPPLY
The ADCMP341/ADCMP343 are designed to operate from 1.7 V to 5.5 V. A 0.1 F decoupling capacitor is recommended between VDD and GND.
400mV
Figure 28. Programming Hysteresis Example
LAYOUT RECOMMENDATIONS
Correct layout is very important to increase noise immunity. Long tracks from the input resistors to the device can lead to noise being coupled onto the inputs. To avoid this, it is best to place the input resistors as close as possible to the device. It is also recommended that a GND plane is used under this layout. The combination of small hysteresis and the use of a large R3 resistor further increases susceptibility to noise. In this case, a decoupling capacitor (CA, CB) may be required on the INx_U node to help reduce any noise. A recommended layout example can be seen in Figure 29.
GND OUTA INA R1A R2A R3A U1 C1 VDD OUTB INB R1B R2B R3B
06500-028
INPUTS
The comparator inputs are limited to the maximum VDD voltage range. The voltage on these inputs can be above VDD but never above the maximum allowed VDD voltage.
OUTPUTS
The open-drain comparator outputs are limited to the maximum specified VDD voltage range, regardless of the VDD voltage. These outputs are capable of sinking up to 40 mA. Outputs can be tied together to provide a common output signal.
PROGRAMMING HYSTERESIS
When choosing the resistor values, the input bias current must be considered as a potential source of error. Begin by choosing a resistor value for R3, which takes into account the acceptable error introduced by the maximum specified input bias current. To reduce this error, the current flowing through the Resistor R3 should be considerably greater than the input bias current.
CA
CB
Figure 29. Recommended Layout Example
Rev. 0 | Page 10 of 12
ADCMP341/ADCMP343 OUTLINE DIMENSIONS
2.90 BSC
8 7 6 5
1.60 BSC
1 2 3 4
2.80 BSC
PIN 1 INDICATOR 0.65 BSC 1.30 1.15 0.90 1.95 BSC
1.45 MAX 0.38 0.22
0.22 0.08 8 4 0
0.15 MAX
SEATING PLANE
0.60 0.45 0.30
COMPLIANT TO JEDEC STANDARDS MO-178-BA
Figure 30. 8-Lead Small Outline Transistor Package [SOT-23] (RJ-8) Dimensions shown in millimeters
ORDERING GUIDE
Model ADCMP341YRJZ-REEL7 1 ADCMP343YRJZ-REEL71
1
Temperature Range -40C to +125C -40C to +125C
Package Description 8-Lead SOT-23 8-Lead SOT-23
Package Option RJ-8 RJ-8
Branding M8Y M91
Z = Pb-free part.
Rev. 0 | Page 11 of 12
ADCMP341/ADCMP343 NOTES
(c)2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06500-0-2/07(0)
Rev. 0 | Page 12 of 12

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