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LP5526 Lighting Management Unit with High Voltage Boost Converter with up to 150mA Serial FLASH LED Driver
March 2006
LP5526 Lighting Management Unit with High Voltage Boost Converter with up to 150mA Serial FLASH LED Driver
General Description
LP5526 is a Lighting Management Unit for portable applications. It is used to drive display backlights, keypad LEDs, RGB LEDs and camera flash LEDs. LP5526 can drive 2 separately connected strings of LEDs with high voltage boost converter. The RGB driver allows driving either individual color LEDs or RGB LED from separate supply power, or it can be used to drive series connecter flash LEDs from high voltage boost converter. The backlight drivers (MAIN and SUB pins) are both high resolution constant current mode drivers. The flash outputs can drive series connected flash LED with up to 150mA of current. External PWM control can be used for dimming any selected LED outputs or it can be used to trigger the flash. The flash has also 1-second safety timer. The device is controlled through 2-wire low voltage I2C compatible interface that reduces the number of required connections.
Features
n High efficiency boost converter with programmable output voltage up to 20V n 2 individual drivers for serial display backlight LEDs n Automatic dimming controller n Stand alone RGB controller n Dedicated flash function n Safety function to avoid prolonged flash n 3 general purpose IO pins n 25-bump micro SMD Package: (2.54mm x 2.54mm x 0.6mm)
Applications
n Cellular Phones and PDAs n MP3 Players n Digital Cameras
Typical Application
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(c) 2006 National Semiconductor Corporation
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LP5526
Typical Application
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Connection Diagrams
25-Bump Thin Micro SMD Package, Large Bump NS Package Number TLA25CCA
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Top View
Bottom View
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LP5526
Pin Descriptions
Pin # 5E 5D 5C 5B 5A 4E 4D 4C 4B 4A 3E 3D 3C 3B 3A 2E 2D 2C 2B 2A 1E 1D 1C 1B 1A Name SW FB RLED GLED BLED GND_SW NRST SCL IRGB GND_RGB VDD2 VDDIO SDA GPIO[2] GPIO[0] / PWM GND_WLED GNDT VDD1 VREF GPIO[1] MAIN SUB VDDA GND IRT Type Output Input Output Output Output Ground Input Logic Input Input Ground Power Power Logic Input/Output Logic Input/Output Logic Input/Output Ground Ground Power Output Logic Input/Output Output Output Output Ground Input Boost Converter Power Switch Boost Converter Feedback Red LED Output (Current Sink / Open Drain Switch) Green LED Output (Current Sink / Open Drain Switch) Blue LED Output (Current Sink / Open Drain Switch) Power Switch Ground External Reset, Active Low Clock Input for I2C Compatible Interface External RGB LED Maximum Current Set Resistor Ground for RGB LED Currents Supply Voltage 3.0...5.5 V Supply Voltage for Digital Input/Output Buffers and Drivers Data Input/Output for I2C Compatible Interface General Purpose Logic Input/Output General Purpose Logic Input/Output / External PWM Input Ground for White LED Currents (MAIN and SUB Outputs) Ground Supply Voltage 3.0...5.5 V Reference Voltage (1.23V) General Purpose Logic Input/Output MAIN Display White LED Current Output (Current Sink) SUB Display White LED Current Output (Current Sink) Internal LDO Output (2.80V) Ground for Core Circuitry Oscillator Frequency Set Resistor Description
Package Mark
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Ordering Information
Order Number LP5526TL LP5526TLX Package Marking 5526 5526 Supplied As TNR 250 TNR 3000 Spec/Flow NoPb NoPb
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LP5526
Absolute Maximum Ratings
2)
(Notes 1,
Operating Ratings (Notes 1, 2)
V (SW, FB, MAIN, SUB) VDD1,2 VDDIO Recommended Load Current (RLED, GLED, BLED) CC Mode Recommended Total Boost Converter Load Current Junction Temperature (TJ) Range Ambient Temperature (TA) Range (Note 6) 0 to +21V 3.0 to 5.5V 1.65V to VDD1 0mA to 50mA/driver 0mA to 150mA -30oC to +125oC -30oC to +85oC
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. V (SW, FB, MAIN, SUB, RLED, GLED, BLED) VDD1, VDD2, VDDIO, VDDA Voltage on IRGB, IRT, VREF Voltage on Logic Pins I (VREF) I(RLED, GLED, BLED) Continuous Power Dissipation (Note 3) Junction Temperature (TJ-MAX) Storage Temperature Range Maximum Lead Temperature (Soldering) (Note 4) ESD Rating (Note 5) Human Body Model: Machine Model: 2kV 200V -0.3V to +23V -0.3V to +6.0V -0.3V to VDD1+0.3V with 6.0V max -0.3V to VDDIO +0.3V with 6.0V max 10A 100mA Internally Limited 125oC -65oC to +150oC 260oC
Thermal Properties
Junction-to-Ambient Thermal Resistance(JA), TLA25 Package (Note 7) 60 - 100oC/W
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LP5526
Electrical Characteristics (Notes 2, 8)
Limits in standard typeface are for TJ = 25o C. Limits in boldface type apply over the operating ambient temperature range (-30oC < TA < +85oC). Unless otherwise noted, specifications apply to the LP5526 Block Diagram with: VDD1,2 = 3.0 ... 5.5V, CVDD = CVDDIO = 100nF, COUT = 2 x 4.7F, CIN = 10F, CVDDA = 1F, CVREF = 100nF, L1 = 10H, RRGB = 2.4k and RRT = 82k (Note 9). Symbol IVDD Parameter Standby supply current (VDD1, VDD2) No-boost supply current (VDD1, VDD2) No-load supply current (VDD1, VDD2) VDDA VREF Output voltage of internal LDO Reference voltage (Note 11) Condition NSTBY = L Register 0DH=08H (Note 10) NSTBY = H, EN_BOOST = L NSTBY = H, EN_BOOST = H Autoload OFF IVDDA = 1mA -3 1.23 Min Typ 1.7 300 780 2.80 +3 Max 7 800 1300 Units A A uA V % V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pins. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=150oC (typ.) and disengages at TJ=130oC (typ.). Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note AN1112 : Micro SMD Wafer Level Chip Scale Package Note 5: The Human body model is a 100pF capacitor discharged through a 1.5k resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. MIL-STD-883 3015.7 Note 6: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125oC), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (JA), as given by the following equation: TA-MAX = TJ-MAX-OP - (JA x PD-MAX). Note 7: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design. Note 8: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Note 9: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics. Note 10: Boost output voltage set to 8V (08H in register 0DH) to prevent any unneccessary current consumption. Note 11: No external loading allowed for VREF pin.
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LP5526
Block Diagram
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LP5526
Modes of Operation
RESET: In the RESET mode all the internal registers are reset to the default values. Reset is entered always if input NRST is LOW or internal Power On Reset is active. Power On Reset (POR) will activate during the chip startup or when the supply voltages VDD1 and VDD2 fall below 1.5V. Once VDD1 and VDD2 rises above 1.5V, POR will inactivate and the chip will continue to the STANDBY mode. NSTBY control bit is low after POR by default. The STANDBY mode is entered if the register bit NSTBY is LOW and Reset is not active. This is the low power consumption mode, when all circuit functions are disabled. Registers can be written in this mode and the control bits are effective immediately after start up. When NSTBY bit is written high, the INTERNAL STARTUP SEQUENCE powers up all the needed internal blocks (VREF, Bias, Oscillator etc.). To ensure the correct oscillator initialization, a 10ms delay is generated by the internal state-machine. If the chip temperature rises too high, the Thermal Shutdown (TSD) disables the chip operation and STARTUP mode is entered until no thermal shutdown event is present.
STANDBY:
STARTUP:
BOOST STARTUP: Soft start for boost output is generated in the BOOST STARTUP mode. The boost output is raised in low current PWM mode during the 20ms delay generated by the state-machine. All LED outputs are off during the 20ms delay to ensure smooth startup. The Boost startup is entered from Internal Startup Sequence if EN_BOOST is HIGH or from Normal mode when EN_BOOST is written HIGH. NORMAL: During NORMAL mode the user controls the chip using the Control Registers. The registers can be written in any sequence and any number of bits can be altered in a register in one write.
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LP5526
Power-Up Sequence
When powering up the device, VDD1 and VDD2 should be greater than VDDIO to prevent any damage to the device.
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Magnetic Boost DC/DC Converter
The LP5526 Boost DC/DC Converter generates an 8...20V supply voltage for the LEDs from single Li-Ion battery (3V...4.5V). The output voltage is controlled with an 8-bit register in 12 steps. The converter is a magnetic switching PWM mode DC/DC converter with a current limit. Switching frequency is 1MHz, when timing resistor RT is 82k. Timing resistor defines the internal oscillator frequency and thus directly affects boost frequency and RGB timings. EMI filter (RSW and CSW) on the SW pin can be used to suppress EMI caused by fast switching. These components should be as near as possible to the SW pin to ensure reliable operation. The LP5526 Boost Converter uses pulseskipping elimination to stabilize the noise spectrum. Even with light load or no load a minimum length current pulse is fed to the inductor. An active load is used to remove the
excess charge from the output capacitor at very light loads. Active load can be disabled by writing the EN_AUTOLOAD bit low. Disabling active load will increase slightly the efficiency at light loads, but the downside is that pulse skipping will occur. The Boost Converter should be stopped and set to 8V when there is no load to minimize the current consumption. The topology of the magnetic boost converter is called CPM control, current programmed mode, where the inductor current is measured and controlled with the feedback. The user can program the output voltage of the boost converter. The output voltage control changes the resistor divider in the feedback loop. The following figure shows the boost topology with the protection circuitry. Four different protection schemes are implemented: 1. Over voltage protection, limits the maximum output voltage -- Keeps the output below breakdown voltage. -- Prevents boost operation if battery voltage is much higher than desired output. 2. Over current protection, limits the maximum inductor current -- Voltage over switching NMOS is monitored; too high voltages turn the switch off.
3.
Feedback break protection. Prevents uncontrolled operation if FB pin gets disconnected. 4. Duty cycle limiting, done with digital control.
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Boost Converter Topology
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LP5526
Magnetic Boost DC/DC Converter
Symbol ILOAD Parameter Maximum Non-Continuous Load Current
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MAGNETIC BOOST DC/DC CONVERTER ELECTRICAL CHARACTERISTICS Conditions 3.0V VIN 3.2V VOUT = 20V 3.2V < VIN VOUT = 20V ILOAD VOUT RDSON fPWM Maximum Continuous Load Current Output Voltage Accuracy (FB Pin) Switch ON Resistance PWM Mode Switching Frequency Frequency Accuracy tPULSE Switch Pulse Minimum Width 3.0V = VIN VOUT = 20V 3.0V VIN 5.5V VOUT = 20V ISW = 0.5A RT = 82 k RT = 82 k no load Boost startup from STANDBY to VOUT = 20V, no load -7 -9 45 -2.3 -1.7 0.15 1.0 +7 +9 Min Typ Max 140 mA 150 100 +2.3 +1.7 0.3 % MHz % ns Units
tSTARTUP Startup Time IMAX SW Pin Current Limit
15 1500 1850
ms mA
Note: Maximum non-continuous currents rates as short pulses (t < 1s). Exposure to maximum rating conditions for extended periods may affect device reliability.
BOOST STANDBY MODE User can set the Boost Converter to STANDBY mode by writing the register bit EN_BOOST low. When EN_BOOST is written high, the converter starts for 20ms in low current PWM mode and then goes to normal PWM mode. All LED outputs are off during the 20ms delay to ensure smooth startup. BOOST OUTPUT VOLTAGE CONTROL User can control the boost output voltage by Boost Output 8-bit register. Boost Output [7:0] Register 0DH Bin 0000 1000 0000 1001 0000 1010 0000 1011 0000 1100 0000 1101 0000 1110 0000 1111 0001 0000 0001 0001 0001 0010 0001 0011 0001 0100 Dec 8 9 10 11 12 13 14 15 16 17 18 19 20 Boost Output Voltage (typical) 8.0V 9.0V 10.0V 11.0V 12.0V 13.0V 14.0V 15.0V 16.0V 17.0V 18.0V 19.0V 20.0V
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Boost Output Voltage Control
If register value is lower than 8, then value of 8 is used internally. If register value is higher than 20, then value of 20 is used internally.
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LP5526
Boost Converter Typical Performance Characteristics
Vin = 3.6V, Vout = 20.0V if not otherwise stated Boost Converter Efficiency Boost Typical Waveforms at 150mA Load
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Battery Current vs Voltage
Boost Output Voltage vs. Current
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Boost Line Regulation 3.0V - 3.6V, no load
Boost Turn On Time with No Load
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Boost Converter Typical Performance Characteristics
Boost Load Transient Response 50mA - 150mA
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Autoload Effect on Input Current, No Load
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Boost Maximum Current vs. Output Voltage
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LP5526
Functionality of Color LED Outputs (RLED, GLED, BLED)
LP5526 has one RGB/color LED output, consisting of three individual LED output pins. Output pins can be used in switch mode or constant current mode. Output mode can be selected with the control register (address 00H) bit CC_SW. If the bit is set high, then RGB outputs are in switch mode, otherwise in constant current mode. These modes are described later in separate chapters. RGB LED output control can be done in three ways: 1. Defining the expected color and brightness with internal PWM in RGB register (address 01H) 2. 3. Direct setting each LED ON/OFF via RGB Control register (address 00H) External PWM control
CONTROL REGISTER (00H) Name RGB_PWM EN_RGB CC_SW RSW GSW BSW Bit 7 6 5 3 2 1 Description 0 = Internal PWM control disabled 1 = Internal PWM control enabled 0 = RGB outputs disabled 1 = RGB outputs enabled 0 = Constant current sink mode 1 = Switch mode 0 = RLED disabled 1 = RLED enabled 0 = GLED disabled 1 = GLED enabled 0 = BLED disabled 1 = BLED enabled Color for RGB LED output Brightness control 0 = Non-overlapping mode 1 = Overlapping mode
1. BRIGHTNESS CONTROL WITH RGB REGISTER If the RGB LED output is used by defining the balance and brightness in the RGB register, then one needs to set EN_RGB bit high and RGB_PWM bit high in the Control register (address 00H). RSW, GSW and BSW are used to enable each LED output, enabled when written high. CC_SW defines the LED output mode. A single register is used for defining the color and brightness for the RGB LED output. OVL bit selects overlapping/non-overlapping mode. Overlapping mode is selected when OVL = 1. COLOR[3:0] BRIGHT[2:0] OVL
RGB REGISTER (01H) 7:4 3:1 0
Brightness control is logarithmic and is programmed as follows: Bright[2:0] 000 001 010 011 100 101 110 111 Brightness [%] 0 1.56 3.12 6.25 12.5 25 50 100 Ratio to max brightness 0 1/64 1/32 1/16 1/8 1/4 1/2 1/1
16 colors can be selected as follows. Please note that exact color depends on RGB LED current and type. Color setting is valid only in non-overlapping mode. COLOR[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 RED active [%] 100 0 0 50 0 50 33 50 25 25 25 75 0 25 0 25 GREEN active [%] 0 100 0 50 50 0 33 25 50 50 25 25 75 75 25 0 BLUE active [%] 0 0 100 0 50 50 33 25 25 25 50 0 25 0 75 75 RGB COLOR red green blue yellow cyan magenta white pink light green light blue orange deep pink spring green lawn green sky blue indigo
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LP5526
Functionality of Color LED Outputs (RLED, GLED, BLED)
Overlapping Mode In overlapping mode the brightness is controlled using PWM duty cycle based control method as the following figure shows.
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Overlapping Mode
Since RGB outputs are on simuneltaneously, the maximum load peak current is: IMAX = I(RLED)MAX + I(GLED)MAX + I(BLED)MAX Non-Overlapping Mode The timing diagram shows the splitted R, G and B and brightness control effect to splitted parts. Full brightness is used in the diagram. If for example 12 brightness is used, the frame is still 50s, but all LED outputs' ON time is 50% shorter and at the last 25s all LED outputs are OFF.
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Non-Overlapping Mode
The non-overlapping mode has 16 programmed colors (different R, G and B ratio - > different color). Since the R, G and B are split in to non-overlapping slots the output current through the RGB LED can be calculated with following equation: IAVG=(CRxIR+CGxIG+CBxIB)xB where C = Color [%] (see table of color control) B = Brightness [%] (see table of brightness control)
2. LED ON/OFF CONTROL WITH RGB CONTROL REGISTER Each LED output can be set ON by writing the corresponding bit high in the Control register (00H). RSW controls RLED, GSW controls GLED and BSW controls BLED output. Note that EN_RGB bit must be high and RGB_PWM bit low. In this mode, the RGB register (01H) does not have any effect. CC_SW bit in Control register defines the LED output mode.
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LP5526
Functionality of Color LED Outputs (RLED, GLED, BLED)
(Continued) Switch Mode / Constant Current Mode Each RGB LED output can be set to act as a switch or a constant current sink. Selection of mode is done with the CC_SW bit in the Control Register. If bit is set high, then the switch mode is selected. Default is switch mode. SWITCH MODE In switch mode, the RGB LED outputs are low ohmic switches to ground. Resistance is typically 3.2. External ballast resistors must be used to limit the current through the LED. CONSTANT CURRENT MODE In constant current mode, the maximum output current is defined with a single external resistor (RRGB) and the maximum current control register (address 02H). RGB MAX CURRENT REGISTER (02H) Name IR[1:0] IG[1:0] IB[1:0] Bit 5:4 3:2 1:0 Description RLED maximum current GLED maximum current BLED maximum current
Table with example resistance values and corresponding output currents: RGB resistor RRGB (k) 2.4 2.7 3.0 3.3 3.6 3.9 4.3 4.7 5.1 5.6 6.2 Maximum current / output IMAX (mA) 50.2 44.7 40.3 36.7 33.7 31.1 28.3 25.9 23.9 21.8 19.7
Note that the LED output requires a minimum saturation voltage in order to act as a true constant current sink. The saturation voltage minimum is typically 230mV defined with 10% current drop. If the LED output voltage drops below 230mV, then the current will decrease significantly. 3. EXTERNAL PWM CONTROL The GPIO[0]/PWM pin can be used to control the RGB output brightness or set RGB leds on/off. PWM function for the pin is selected by writing EN_PWM_PIN high in GPIO control register (address 06H). Note, that EN_RGB bit must be set high. Each LED output can be enabled with RSW, GSW and BSW bits. EN_EXT_R_PWM, EN_EXT_G_PWM and EN_EXT_B_PWM bits are used to select, which LED outputs are controlled with the external PWM input. Note that polarity of external PWM control is active high i.e. when pin is in high state, then LED output is enabled. If RGB_PWM is set low, then each selected LED output is controlled directly with external PWM input. If RGB_PWM is set high, then internal PWM control is modulated by the external PWM input. In latter case, internal PWM control is passed to LED when external PWM input is high.
Maximum current for each LED output is adjusted with the RGB max current register in following way: IR[1:0], IG[1:0], IB[1:0] 00 01 10 11 Maximum current / output 0.25 x IMAX 0.50 x IMAX 0.75 x IMAX 1.00 x IMAX
External ballast resistors are not needed in this mode. The maximum current for all RGB LED drivers is set with RRGB. The equation for calculating the maximum current is: IMAX = 100 x 1.23V / (RRGB + 50 ) where IMAX = maximum RGB current in any RGB output (during constant current mode) 1.23V = reference voltage 100 = internal current mirror multiplier RRGB = resistor value in Ohms 50 = Internal resistor in the IRGB input
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LP5526
Functionality of Color LED Outputs (RLED, GLED, BLED)
(Continued) FLASH LED DRIVING USING RGB DRIVERS RGB drivers can be connected in parallel and used as a flash LED driver (see Typical application 2). Flash LEDs can be powered through the boost converter. Flash LEDs are controlled basically the same way as RGB LEDs controlling is previously described. Additional safety mode is introduced for FLASH LED driving to avoid prolonged flash and damage to application. FLASH can be done in 3 different ways: 1. Using external PWM control 2. 3. Controlling RGB max current register values Using Flash mode
* Enable external PWM pin by writing EN_PWM_PIN bit high * Use EN_EXT_R_PWM, EN_EXT_G_PWM and EN_EXT_B_PWM bits to select, which LED outputs are controlled by the external PWM control. Output which external PWM control is not selected will be on constantly regardless of the state of the external PWM pin. * Enable RGB constant current mode, if external ballast resistors are not used (CC_SW = 0) * Disable internal RGB PWM mode (RGB_PWM = 0) * Write wanted maximum current values for each output to RGB max current register (e.g. 11b for maximum current) * Enable RGB functions (EN_RGB = 1, RSW= 1, GSW= 1, BSW = 1) * Use external PWM control pin (GPIO[0]/PWM) to introduce pre-flash and flash.
1. Using External PWM control In this case pre-flash brightness is adjusted by adjusting the pulse width of PWM signal
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Using External PWM Control for Flash
2. Controlling RGB Max Current Register Values In this case pre-flash brightness is adjusted by adjusting the current values in the RGB max current register. Note that in this mode flash control speed and timing depends on the I2C communication speed. * Enable RGB functions and disable PWM mode (EN_RGB = 1, RGB_PWM = 0) * Enable RGB constant current mode (CC_SW = 0)
* Start pre-flash by switching on the LEDs (RSW = 1, GSW = 1, BSW = 1). Pre-flash brightness can be adjusted also by setting on only one or two LEDs during the pre-flash * Start flash by writing each output maximum current values to RGB max current register * Stop flash by switching off the LEDs (RSW = 0, GSW = 0, BSW = 0)
* Write pre-flash values for each output to RGB max current register (e.g. 00b for 25% of maximum current)
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LP5526
Functionality of Color LED Outputs (RLED, GLED, BLED)
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Controlling RGB Max Current Values to Introduce Flash
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LP5526
Functionality of Color LED Outputs (RLED, GLED, BLED)
(Continued) When RLED, GLED and BLED are connected together as in Typical Application 1, flash current can be adjusted with 8.33% step in constant current mode by changing RGB max current register values as seen on following table. Note that 0% means that appropriate output is turned off by setting RSW, GSW or BSW bit to 0. IR [%] 0 0 0 0 0 0 0 0 25 50 75 100 IG [%] 0 0 0 0 25 50 75 100 100 100 100 100 IB [%] 25 50 75 100 100 100 100 100 100 100 100 100 Total current [%] 8.33 16.67 25.00 33.33 41.67 50.00 58.33 66.67 75.00 83.33 91.67 100
3. Using Flash Mode In this mode Flash is triggered with external PWM pin and pre-flash brightness is adjusted by adjusting the RGB max current values. After flash pulse flash led will be shut down.
* Write the pre-flash current values to RGB max current register * Enable RGB functions and disable PWM mode (EN_RGB = 1, RGB_PWM = 0) * Enable flash mode (EN_FLASH = 1), make sure GPIO[0]/PWM pin is in low state * Enable external PWM pin (EN_PWM_PIN = 1) * Start pre-flash by switching on the LEDs (RSW = 1, GSW = 1, BSW = 1). Pre-flash brightness can be affected also by setting on only one or two LEDs * Use EN_EXT_R_PWM, EN_EXT_G_PWM and EN_EXT_B_PWM bits to select which LED outputs are used for flash * Start flash pulse by setting GPIO[0]/PWM pin high and stop it by setting GPIO[0]/PWM pin low * During the flash pulse the LED outputs with EN_EXT_x_PWM bit enabled give out maximum current, regardless of RGB max current register value or XSW values Note: EN_FLASH bit must be set low, and then high again before it is possible to make a new flash pulse.
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Using Flash Mode
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LP5526
Functionality of Color LED Outputs (RLED, GLED, BLED)
(Continued) FLASH SAFETY TIMER FUNCTION Flash safety function can be used to prevent damages due to possible overheating when flash or RGB LEDs have been stuck on because of software or user error. Safety function has two operation modes: 1. Disabling selected RGB drivers when no writing has been done to the RGB max current register (address 02H) for 1 second Disabling selected RGB drivers if the external flash trigger pulse is longer than 1 second
2.
Flash safety function can be individually enabled for all RGB LED drivers (EN_SAFETY_R, EN_SAFETY_G, EN_SAFETY_B). The safety function operation mode depends on the state of EN_FLASH bit.
EN_FLASH = 0: Safety counter starts counting when at least one of the EN_SAFETY_X bits is enabled. Safety counter can be cleared by executing an I2C read or write sequence to address 02H. If safety counter reaches one second, the LEDs which have the safety function enabled, are switched off. Also the read-only bit SAFETY_SET is set high. 2. EN_FLASH = 1: Safety counter starts counting when the external flash trigger pulse starts (GPIO[0]/PWM goes high) and stops counting when flash pulse stops (GPIO[0]/PWM goes low). If flash pulse is longer than one second, the LEDs which have the safety function enabled, are switched off. Also the read-only bit SAFETY_SET is set high. In both cases (EN_FLASH = 0/1) after one second is reached and the LEDs which safety bit has been enabled are switched off, the LED state can be restored by disabling the safety function of the corresponding LED. Counter can be cleared only by disabling all safety bits (EN_SAFETY_R = 0, EN_SAFETY_G = 0, EN_SAFETY_B = 0), I2C read or write sequence to address 02H does not clear the counter when safety function has been activated.
1.
RGB LEDs Driver Performance Characteristics
Symbol ILEAKAGE IMAX(RGB) Parameter RLED, GLED, BLED pin leakage current Maximum recommended sink current Accuracy @ 50mA Current mirror ratio RGB current matching error RSW RGB VSAT Switch resistance RGB internal PMW switching frequency Saturation voltage (current drop 10%) CC mode SW mode CC mode CC mode IRGB set to 50mA, CC mode SW mode Accuracy same as internal clock frequency accuracy +25oC, IRGB set to 50mA -30oC +85oC 5 1:100 2 3.2 20 230 350 300 430 % kHz mV Condition Min Typ Max Units 1 50 60 12.5 A mA mA %
Note: RGB current should be limited as follows: constant current mode - limited by external RRGB resistor switch mode - limited by external ballast resistors
Output Current vs Pin Voltage (CC Mode)
Output Current vs RRGB (CC Mode)
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LP5526
Backlight Drivers
LP5526 has 2 independent backlight drivers. Both drivers are regulated constant current sinks. LED current for both LED strings are controlled by the 8-bit current mode DACs with 0.1 mA step. MAIN and SUB LEDs can be also controlled with one DAC (MAIN) for better matching allowing the use of larger displays having up to 8 white LEDs by setting DISPL bit to 1.
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SUB output for 2 LEDs (DISPL = 0)
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MAIN output for 4 LEDs (DISPL = 0)
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MAIN and SUB outputs for 8 LEDs (DISPL = 1)
EXTERNAL PWM CONTROL The GPIO[0]/PWM pin can be used to control the backlight drivers brightness or set leds on/off. External PWM control is enabled by writing 1 to EN_MAIN_PWM and/or EN_SUB_PWM bits in register address 2BH. GPIO[0]/PWM pin is used as external PWM input when EN_PWM_PIN is set high. PWM input is active high, i.e. LED is activated when in high state.
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LP5526
Backlight Drivers
FADE IN / FADE OUT
(Continued)
Adjustment is made with 04H (main current) and with 05H (sub current) registers: MAIN CURRENT [7:0] SUB CURRENT [7:0] 0000 0000 0000 0001 0000 0010 0000 0011 ... ... 1111 1101 1111 1110 1111 1111 Driver current, mA (typical) 0 0.1 0.2 0.3 ... ... 25.3 25.4 25.5
LP5526 has an automatic fade in and out for main and sub backlight. The fade function is enabled with EN_FADE bit. The slope of the fade curve is set by the SLOPE bit. Fade control for main and sub display is set by FADE_SEL bit. Recommended fading sequence: 1. Set SLOPE 2. 3. 4. 5. 6. Set FADE_SEL Set EN_FADE = 1 Set EN_MAIN / EN_SUB = 1 Set target WLED value Fading will be done either within 0.65s or 1.3s based on SLOPE selection
Fading times apply to full scale change i.e. from 0 to 100% or vice versa. If the current change does not correspond to full scale change, the time will be respectively shorter. See WLED Dimming diagrams for typical fade times. WLED CONTROL REGISTER (03H) Name SLOPE Bit 5 Description FADE execution time: 0 = 1.3s (full scale) 1 = 0.65s (full scale) FADE selection: 0 = FADE controls MAIN 1 = FADE controls SUB FADE enable 0 = FADE disabled 1 = FADE enabled Display mode: 0 = MAIN and SUB individual control 1 = MAIN and SUB controlled with MAIN DAC MAIN enable: 0 = disable 1 = enable SUB enable: 0 = disable 1 = enable
FADE_SEL
4
EN_FADE
3
DISPL
2
EN_MAIN
1
EN_SUB
0
Note: if DISPL=1 and FADE_SEL=0 then FADE effects MAIN and SUB
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LP5526
Backlight Driver Electrical Characteristics
Symbol IMAX ILEAKAGE IMAIN ISUB MatchMAIN-SUB MatchMAIN-SUB VSAT Parameter Maximum Sink Current Leakage Current MAIN Current tolerance SUB Current tolerance Sink Current Matching Error Sink Current Matching Error 95% Saturation Voltage VSUB, MAIN =20V IMAIN and ISUB set to 12.8mA (80H) ISINK=12.8mA, DISPL=1 ISINK=12.8mA, DISPL=0 ISINK=25.5mA 11.1 Conditions Min Typical 25.5 0.003 12.8 0.2 5 400 500 650 Max 30 1 14.1 Units mA A mA % % % mV
Note: Matching is the maximum difference from the average.
WLED Dimming, SLOPE=0
WLED Dimming, SLOPE=1
20179739
20179740
WLED Output Current vs. Voltage
20179792
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LP5526
General Purpose I/O Functionality
LP5526 has three general purpose I/O pins: GPIO[0]/PWM, GPIO[1] and GPIO[2]. GPIO[0]/PWM can also be used as a PWM input for the external LED PWM controlling. GPIO bi-directional drivers are operating from the VDDIO supply domain. Registers for GPIO are as follows: GPIO CONTROL (06H) Name EN_PWM_PIN Bit 4 Description Enable PWM pin 0 = disable 1 = enable GPIO pin direction 0 = input 1 = output Name DATA[2:0]
GPIO DATA (07H) Bit 2:0 Description Data bits
OEN[2:0]
2:0
GPIO control register is used to set the direction of each GPIO pin. For example, by setting OEN0 bit high the GPIO[0]/PWM pin acts as a logic output pin with data defined DATA0 in GPIO data register. Note, that the EN_PWM_PIN bit overrides OEN0 state by forcing GPIO[0]/PWM to act as PWM input. GPIO[1] and GPIO[2] pins can be selected to be inputs or outputs, defined by OEN1 and OEN2 bit status. PWM functionality is valid only for GPIO[0]/PWM pin. GPIO data register contains the data of GPIO pins. When output direction is selected to GPIO pin, then GPIO data register defines the output pin state. When GPIO data register is read, it contains the state of the pin despite of the pin direction.
Logic Interface Characteristics
(VDDIO = 1.65V...VDD1,2 unless otherwise noted) Symbol VIL VIH II fSCL VIL VIH II tNRST VOL VOH IL VOL VOH IL Parameter Input Low Level Input High Level Logic Input Current Clock Frequency Input Low Level Input High Level Input Current Reset Pulse Width Output Low Level Output High Level Output Leakage Current Output Low Level Output High Level Output Leakage Current ISDA = 3mA ISDA = -3mA VSDA = 2.8V IGPIO = 3 mA IGPIO = -3 mA VGPIO = 2.8V VDDIO - 0.5 0.3 VDDIO - 0.3 1.0 VDDIO - 0.5 1.2 -1.0 10 0.3 VDDIO - 0.3 1.0 0.5 A V V A 0.5 1.0 0.8xVDDIO -1.0 1.0 400 0.5 Conditions Min Typ Max 0.2xVDDIO Units V V A kHz V V A s V LOGIC INPUT SCL, SDA, GPIO[0:2]
LOGIC INPUT NRST
LOGIC OUTPUT SDA
LOGIC OUTPUT GPIO[0:2]
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LP5526
I2C Compatible Interface
I2C SIGNALS The SCL pin is used for the I2C clock and the SDA pin is used for bidirectional data transfer. Both these signals need a pull-up resistor according to I2C specification. I2C DATA VALIDITY The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of the data line can only be changed when CLK is LOW. TRANSFERRING DATA Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) being transferred first. Each byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the master. The transmitter releases the SDA line (HIGH) during the acknowledge clock pulse. The receiver must pull down the SDA line during the 9th clock pulse, signifying an acknowledge. A receiver which has been addressed must generate an acknowledge after each byte has been received. After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an eighth bit which is a data direction bit (R/W). The LP5526 address is 59H (101 1001b). For the eighth bit, a "0" indicates a WRITE and a "1" indicates a READ. This means that the first byte is B2H for WRITE and B3H for READ. The second byte selects the register to which the data will be written. The third byte contains data to write to the selected register.
20179749
I2C Signals: Data Validity I2C START AND STOP CONDITIONS START and STOP bits classify the beginning and the end of the I2C session. START condition is defined as SDA signal transitioning from HIGH to LOW while SCL line is HIGH. STOP condition is defined as the SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and STOP bits. The I2C bus is considered to be busy after START condition and free after STOP condition. During data transmission, I2C master can generate repeated START conditions. First START and repeated START conditions are equivalent, function-wise.
20179751
I2C Chip Address Register changes take an effect at the SCL rising edge during the last ACK from slave.
20179750
I2C Start and Stop Conditions
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LP5526
I2C Compatible Interface
(Continued)
20179793
w = write (SDA = "0") r = read (SDA = "1") ack = acknowledge (SDA pulled down by either master or slave) rs = repeated start id = 7-bit chip address, 59H (101 1001b) for LP5526.
I2C Write Cycle When a READ function is to be accomplished, a WRITE function must precede the READ function, as shown in the Read Cycle waveform.
20179794
I2C Read Cycle
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LP5526
I2C Compatible Interface
(Continued)
20179754
I2C Timing Diagram
I2C TIMING PARAMETERS (VDD1,2 = 3.0 to 4.5V, VDDIO = 1.8V to VDD1,2) Symbol 1 2 3 4 5 5 6 7 8 9 10 Cb Parameter Hold Time (repeated) START Condition Clock Low Time Clock High Time Setup Time for a Repeated START Condition Data Hold Time (Output direction, delay generated by LP5526) Data Hold Time (Input direction, delay generated by Master) Data Setup Time Rise Time of SDA and SCL Fall Time of SDA and SCL Set-up Time for STOP condition Bus Free Time between a STOP and a START Condition Capacitive Load for Each Bus Line Limit Min 0.6 1.3 600 600 300 0 100 20+0.1Cb 15+0.1Cb 600 1.3 10 200 300 300 900 900 Max Units s s ns ns ns ns ns ns ns ns s pF
NOTE: Data guaranteed by design
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LP5526
Recommended External Components
OUTPUT CAPACITOR, COUT The output capacitor COUT directly affects the magnitude of the output ripple voltage. In general, the higher the value of COUT, the lower the output ripple magnitude. Multilayer ceramic capacitors with low ESR are the best choice. At the lighter loads, the low ESR ceramics offer a much lower VOUT ripple that the higher ESR tantalums of the same value. At the higher loads, the ceramics offer a slightly lower VOUT ripple magnitude than the tantalums of the same value. However, the dv/dt of the VOUT ripple with the ceramics is much lower that the tantalums under all load conditions. Capacitor voltage rating must be sufficient, 25V or greater is recommended. Examples of suitable capacitors are: TDK C3216X5R1E475K, Panasonic ECJ3YB1E475K, ECJMFB1E475K and ECJ4YB1E475K. Some ceramic capacitors, especially those in small packages, exhibit a strong capacitance reduction with the increased applied voltage (DC bias effect). The capacitance value can fall below half of the nominal capacitance. Too low output capacitance can make the boost converter unstable. Output capacitors DC bias effect should be better than -50% at 20V. INPUT CAPACITOR, CIN The input capacitor CIN directly affects the magnitude of the input ripple voltage and to a lesser degree the VOUT ripple. A higher value CIN will give a lower VIN ripple. Capacitor voltage rating must be sufficient, 10V or greater is recommended. OUTPUT DIODE, D1 A schottky diode should be used for the output diode. Peak repetitive current should be greater than inductor peak curLIST OF RECOMMENDED EXTERNAL COMPONENTS Symbol CVDD CVDDIO CVDDA COUT CIN L1 CVREF RRGB RRT D1 CSW RSW LEDs Symbol explanation C between VDD1,2 and GND C between VDDIO and GND C between VDDA and GND C between FB and GND Maximum DC bias effect @ 20V C between battery voltage and GND L between SW and VBAT Saturation current C between VREF and GND R between IRGB and GND R between IRT and GND Rectifying diode (Vf @ maxload) Reverse voltage Repetitive peak current C in EMI filter R in EMI filter Value 100 100 1 2 x 4.7 or 1 x 10 -50 10 10 1300 100 2.4 82 0.3-0.5 30 1500 100 390 Unit nF nF F F % F H mA nF k k V V mA pF Ceramic, X7R / X5R, 50V Schottky diode Type Ceramic, X7R / X5R Ceramic, X7R / X5R Ceramic, X7R / X5R Ceramic, X7R / X5R, tolerance +/-10% Ceramic, X7R / X5R Shielded inductor, low ESR Ceramic, X7R / X5R rent (1500mA) to ensure reliable operation. Schottky diodes with a low forward drop and fast switching speeds are ideal for increasing efficiency in portable applications. Choose a reverse breakdown voltage of the schottky diode significantly larger (~30V) than the output voltage. Do not use ordinary rectifier diodes, since slow switching speeds and long recovery times cause the efficiency and the load regulation to suffer. Examples of suitable diodes are: Central Semiconductor CMMSH1-40, Infineon BAS52-02V. EMI FILTER COMPONENTS CSW, RSW EMI filter (RSW and CSW) on the SW pin can be used to suppress EMI caused by fast switching. These components should be as near as possible to the SW pin to ensure reliable operation. 50V or greater voltage rating is recommended for capacitor. INDUCTOR, L1 A 10uH shielded inductor is suggested for LP5526 boost converter. The inductor should have a saturation current rating higher than the rms current it will experience during circuit operation (1300mA). Less than 300m ESR is suggested for high efficiency and sufficient output current. Open core inductors cause flux linkage with circuit components and interfere with the normal operation of the circuit. This should be avoided. For high efficiency, choose an inductor with a high frequency core material such as ferrite to reduce the core losses. To minimize radiated noise, use a toroid, pot core or shielded core inductor. The inductor should be connected to the SW pin as close to the IC as possible. Examples of suitable inductors are: TDK SLF6028T-100M1R3, Coilcraft MSS6122-103MLB.
1% 1%
1%
User Defined
Note: See Application Note AN-1436 "Design and Programming Examples for Lighting Management Unit LP5526" for more information on how to design with LP5526
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LP5526 Control Register Names and Default Values D7 RGB_PWM 0 COLOR[3:0] 0 SAFETY_SET 0 SLOPE 0 MAIN[7:0] 0 SUB[7:0] 0 EN_PWM_PIN 0 0 0 NSTBY 0 0 EN_SAFETY_G 0 0 0 EN_SAFETY_B 0 0 0 0 EN_EXT_R_PWM 0 BOOST[7:0] 1 EN_EXT_G_PWM 0 0 EN_EXT_B_PWM 0 0 EN_MAIN_PWM 0 0 EN_SUB_PWM 0 EN_BOOST EN_FLASH 0 EN_AUTOLOAD 1 0 0 0 0 0 0 OEN[2:0] 0 DATA[2:0] 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FADE_SEL EN_FADE DISPL 0 0 0 0 IR[1:0] IG[1:0] 0 EN_MAIN 0 0 0 0 0 0 0 IB[1:0] 0 EN_SUB 0 BRIGHT[2:0] 0 1 0 0 0 OVL 0 EN_RGB CC_SW RSW GSW BSW D6 D5 D4 D3 D2 D1 D0
ADDR (HEX)
REGISTER
00
Control Register
01
RGB
02
RGB max current
03
WLED Control
04
MAIN Current
05
SUB Current
06
GPIO Control
07
GPIO Data
LP5526
27
0B
Enables
0D
Boost Output
2B
PWM Enable
EN_SAFETY_R
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LP5526
LP5526 Register Bit Explanations
Each register is shown with a key indicating the accessibility of the each individual bit, and the initial condition: Register Bit Accessibility and Initial Condition Key RW R -0,-1 Bit Accessibility Read/write Read only Condition after POR
CONTROL REGISTER (00H) - RGB LEDS CONTROL REGISTER D7 RGB_PWM RW - 0 D6 EN_RGB RW - 0 D5 CC_SW RW - 1 R-0 D4 D3 RSW RW - 0 D2 GSW RW - 0 D1 BSW RW - 0 R-0 D0
RGB_PWM EN_RGB CC_SW RSW GSW BSW
Bit 7 Bit 6 Bit 5 Bit 3 Bit 2 Bit 1
0 - Internal RGB PWM control disabled 1 - Internal RGB PWM control enabled 0 - RGB outputs disabled 1 - RGB outputs enabled 0 - Constant current sink mode 1 - Switch mode 0 - RLED disabled 1 - RLED enabled 0 - GLED disabled 1 - GLED enabled 0 - BLED disabled 1 - BLED enabled
RGB (01H) - RGB COLOR AND BRIGHTNESS CONTROL REGISTER D7 RW - 0 D6 COLOR[3:0] RW - 0 RW - 0 RW - 0 RW - 0 D5 D4 D3 D2 BRIGHT[2:0] RW - 0 RW - 0 D1 D0 OVL RW - 0
COLOR[3:0] BRIGHT[2:0] OVL
Bits 7-4 Bits 3-1 Bit 0
PWM color for RGB outputs PWM brightness control for RGB outputs 0 - Overlapping mode disabled 1 - Overlapping mode enabled
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LP5526
LP5526 Register Bit Explanations
D7 SAFETY_SET R-0 R-0 RW - 0 D6 D5 IR[1:0]
(Continued)
RGB MAX CURRENT (02H) - MAXIMUM RGB CURRENT CONTROL REGISTER D4 RW - 0 D3 IG[1:0] RW - 0 RW - 0 RW - 0 D2 D1 IB[1:0] RW - 0 D0
SAFETY_SET IR[1:0] IG[1:0] IB[1:0]
Bit 7 Bits 5-4 Bits 3-2 Bits 1-0
0 - safety function not activated 1 - safety function activated RLED maximum current GLED maximum current BLED maximum current
Maximum current for RGB driver IR,IG,IB[1:0] 00 01 10 11 WLED CONTROL (03H) - WLED CONTROL REGISTER D7 R-0 D6 R-0 D5 SLOPE RW - 0 D4 FADE_SEL RW - 0 D3 EN_FADE RW - 0 D2 DISPL RW - 0 D1 EN_MAIN RW - 0 D0 EN_SUB RW - 0 Maximum output current 0.25 x IMAX 0.50 x IMAX 0.75 x IMAX 1.00 x IMAX
SLOPE FADE_SEL EN_FADE DISPL EN_MAIN EN_SUB
Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 - fade execution time 0.65 sec (full scale) 1 - fade execution time 1.3 sec (full scale) 0 - fade control for MAIN 1 - fade control for SUB 0 - automatic fade disabled 1 - automatic fade enabled 0 - MAIN and SUB individual control 1 - MAIN and SUB controlled with MAIN DAC 0 - MAIN output disabled 1 - MAIN output enabled 0 - SUB output disabled 1 - SUB output enabled
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LP5526
LP5526 Register Bit Explanations
D7 RW - 0 D6 RW - 0 D5 RW - 0 D4
(Continued)
MAIN CURRENT (04H) - MAIN CURRENT CONTROL REGISTER D3 MAIN[7:0] RW - 0 RW - 0 RW - 0 RW - 0 RW - 0 D2 D1 D0
SUB CURRENT (05H) - SUB CURRENT CONTROL REGISTER D7 RW - 0 D6 RW - 0 D5 RW - 0 D4 SUB[7:0] RW - 0 RW - 0 RW - 0 RW - 0 RW - 0 D3 D2 D1 D0
MAIN, SUB current adjustment MAIN[7:0], SUB[7:0] 0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 ... 1111 1101 1111 1110 1111 1111 GPIO CONTROL (06H) - GPIO CONTROL REGISTER D7 R-0 D6 R-0 D5 R-0 D4 EN_PWM_PIN RW - 0 R-0 RW - 0 D3 D2 D1 OEN[2:0] RW - 0 RW - 0 D0 Typical driver current (mA) 0 0.1 0.2 0.3 0.4 ... 25.3 25.4 25.5
EN_PWM_PIN OEN[2:0]
Bit 4 Bits 2-0
0 - External PWM pin disabled 1 - External PWM pin enabled 0 - GPIO pin set as a input 1 - GPIO pin set as a output
GPIO DATA (07H) - GPIO DATA REGISTER D7 R-0 D6 R-0 D5 R-0 D4 R-0 D3 R-0 D2 RW - 0 D1 DATA[2:0] RW - 0 RW - 0 D0
DATA[2:0]
Bits 2-0
GPIO data register bits
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LP5526
LP5526 Register Bit Explanations
ENABLES (0BH) - ENABLES REGISTER D7 R-0 D6 NSTBY RW - 0 D5 EN_BOOST RW - 0 R-0 D4
(Continued)
D3 EN_FLASH RW - 0
D2 EN_AUTOLOAD RW - 1
D1 R-0
D0 R-0
NSTBY EN_BOOST EN_FLASH EN_AUTOLOAD
Bit 6 Bit 5 Bit 3 Bit 2
0 - LP5526 standby mode 1 - LP5526 active mode 0 - Boost converter disabled 1 - Boost converter enabled 0 - Flash function disabled 1 - Flash function enabled 0 - Boost active load disabled 1 - Boost active load enabled
BOOST OUTPUT (0DH) - BOOST OUTPUT VOLTAGE CONTROL REGISTER D7 RW - 0 D6 RW - 0 D5 RW - 0 D4 BOOST[7:0] RW - 0 RW - 1 RW - 0 RW - 0 RW - 0 D3 D2 D1 D0
BOOST output voltage adjustment BOOST[7:0] 0000 1000 0000 1001 0000 1010 0000 1011 0000 1100 0000 1101 0000 1110 0000 1111 0001 0000 0001 0001 0001 0010 0001 0011 0001 0100 Typical boost output voltage (V) 8.00 9.00 10.00 11.00 12.00 13.00 14.00 15.00 16.00 17.00 18.00 19.00 20.00
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LP5526
LP5526 Register Bit Explanations
D7 EN_SAFETY_R RW - 0 D6 EN_SAFETY_G RW - 0 D5 EN_SAFETY_B RW - 0
(Continued)
PWM ENABLE (2BH) - EXTERNAL PWM CONTROL REGISTER D4 EN_EXT R_PWM RW - 0 D3 EN_EXT G_PWM RW - 0 D2 EN_EXT B_PWM RW - 0 D1 EN_MAIN PWM RW - 0 D0 EN_SUB PWM RW - 0
EN_SAFETY_R EN_SAFETY_G EN_SAFETY_B EN_EXT_R_PWM EN_EXT_G_PWM EN_EXT_B_PWM EN_EXT_MAIN_PWM EN_EXT_SUB_PWM
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 - Safety function for RLED disabled 1 - Safety function for RLED enabled 0 - Safety function for GLED disabled 1 - Safety function for GLED enabled 0 - Safety function for BLED disabled 1 - Safety function for BLED enabled 0 - External PWM control for RLED disabled 1 - External PWM control for RLED enabled 0 - External PWM control for GLED disabled 1 - External PWM control for GLED enabled 0 - External PWM control for BLED disabled 1 - External PWM control for BLED enabled 0 - External PWM control for MAIN disabled 1 - External PWM control for MAIN enabled 0 - External PWM control for SUB disabled 1 - External PWM control for SUB enabled
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LP5526 Lighting Management Unit with High Voltage Boost Converter with up to 150mA Serial FLASH LED Driver
Physical Dimensions
inches (millimeters) unless otherwise noted
The dimension for X1 ,X2 and X3 are as given:
* X1=2.543mm 0.03mm * X2=2.543mm 0.03mm * X3=0.60mm 0.075mm
25-bump micro SMD Package, 2.54 x 2.54 x 0.6mm, 0.5mm pitch NS Package Number TLA25CCA See Application note AN-1112 for PCB design and assembly instructions.
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ``Banned Substances'' as defined in CSP-9-111S2. Leadfree products are RoHS compliant.
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