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| an Intel company 2.5 Gbit/s Re-timing Laser Driver GD16521 Preliminary General Description The GD16521 is a high performance low power 2.5 Gbit/s Laser Driver with optional on chip re-timing of data. The GD16521 is designed to meet and exceed ITU-T STM-16 and SONET OC-48 fiberoptic communication systems requirements. The GD16521 is designed to sink a Modulation Current into the IM pin and a Pre-Bias Current into the IB pin. The Modulation Current is adjustable up to 50 mA and the Pre-Bias Current is adjustable up to 100 mA. The device features two control loops for stabilizing the laser diode operating conditions. An automatic optical power control loop maintains a constant average optical power out of the laser diode, independent of changes in the threshold current of the laser diode. A modulation current control loop maintains a constant modulation current for the laser diode, or alternatively maintains a constant extinction ratio of the laser diode. Re-timing of the data signal connected to the pins SDIP/SDIN is made by means of a DFF-clocked by an external clock signal at the data rate fed to the pins SCIP/ SCIN. The GD16521 requires a single +3.3 V supply. The circuit is available as: u 48 lead 7 x 7 mm TQFP power enhanced plastic package u die. Features l Differential CML data and clock inputs with internal 50 W load termination. Selectable on chip retiming-FF. Output modulation current pulse duty width adjustable (Compensates for LD emission delay) Modulation/Bias current monitor output. Modulation/Bias current shutdown input. Single supply operation: +3.3 V. Power dissipation: 410 mW (typ.). Available as: - 48 lead 7 x 7 mm TQFP power enhanced plastic package - die l l l l l l l FFSET DUTY IMB IM AR PD IB IBM TDlP TDlN SDlP SDlN SClP SClN TClP TClN IMC IMM VCC VCCCONT VCCCM VCCR Applications l DFF SEL Duty Adjust VEE VEER MTJ Tele Communication: - SDH STM-16 modules - SONET OC-48 modules Data Communication. Electro Absorption laser driver. Direct Modulation laser driver. OPSET ++- l l Mark/Space Monitor 1/20 1/20 l MARKN MARKP SHDW IMSET IBSET Data Sheet Rev.: 11 Functional Details GD16521 is a 2.5 Gbit/s laser driver with an optional re-timing of the data signal. It is capable of driving laser diodes, at a maximum modulation current of 50 mA and a maximum pre-bias current of 100 mA. VCC 50W 50W 50W 50W CML Input 100nF TDIP 50W 100nF SDIP 100nF SDIN 1kW 100nF TDIN 50W 1kW 1kW VCC 500W The Inputs Data (SDIP/SDIN) is input to GD16521 and re-timed within a DFF clocked by an external clock (SCIP/SCIN). Optionally the re-timing may be bypassed controlled by a select pin (FFSET). VEE Figure 1. CML input termination scheme with loop through connection. This example shows an AC coupled differential input configuration. Input Termination The data inputs (SDIP/SDIN) and clock inputs (SCIP/SCIN)are internally terminated to 50 W through the pins TDIP/ TDIN and TCIP/TCIN respectively, see Figure 1 below. Using this scheme a VSWR better than 1.5 up to 1.75 GHz and better than 2 up to 2.5 GHz can be achieved. The inputs are internally biased to 2x(VCC - VEE )/3 with a resistive divider. Modulation Current Control Loop A modulation current control loop (MCCL) maintaining a constant modulation current has been incorporated into GD16521. The MCCL OP-amp controls the modulation current so that the voltage across an external resistor caused by the current sink into the IMM pin which is 1/20 of the modulation current equals an external reference voltage applied to the IMC pin. The voltage applied to the IMC pin sets the modulation current. Because the sink current into the IMM pin is 1/20 of the modulation current sink into pin IM the MCCL maintains a constant modulation current. Loop stability is obtained by adding an external capacitor across the OP-amp, see Figure 2 below. pin IBM. The mirrored current is 1/20 of the pre-bias current. Shutdown Also added is an anti-rush circuitry, which is used to avoid over loading the laser diode during turn on. Typically AR or PD are connected, see Figure 2. In this case, the bias and modulation current are turned off, there will not be any voltage across the resistor connected to the back facet monitor diode photo detector. Therefore, without the anti-rush circuitry, the OPCL will adjust to increase the bias current, effectively setting the bias control voltage to its maximum, regardless of the setting of the voltage on the OPSET pin. Once the bias and modulation current is turned on again, the laser diode will be subject to the full bias current, and this may harm the laser diode. Therefore, an anti-rush circuitry has been provided, which sinks a current into the AR/PD pins when the bias and modulation current is turned off, SHDW = "1". This causes the AR/PD pins to become more negative than the reference voltage on the OPSET pin, and therefore causes the OPCL to turn down the control for the bias current. This ensures a smooth turn on of the laser diode. The Modulation Current The output pins (IM/IMB) are open collector outputs designed for driving an external load with a controlled current, typically a laser diode. The output modulation current can be controlled in the range from 0 mA to 70 mA. The AC specifications are however valid only in the range from 9 mA to 50 mA. The output voltage swing across the external load may be varied accordingly. The external load however must be designed so that the voltage on the output will never be lower than VCC -2 V. In AC coupling the circuit can be operated at modulation currents above 50 mA. At modulation currents between 50 and 70 mA together with a high operating temperature, there is, however, a small penalty in AC performance. The output jitter can exceed the specification, fall times can exceed the specified values by 10% while rise time are within specifications. The Pre-bias Current The pre-bias current can be controlled from 0 mA to 100 mA. A control loop that maintains a constant average optical power, independent of changes over temperature and lifetime in the laser diode threshold current is incorporated in GD16521. The optical power control loop (OPCL) OP-amp adjusts the laser diode pre-bias current so that the voltage drop across the resistor connected to the back facet monitor diode photo detector, applied to the PD pin, equals the voltage applied to the OPSET pin, see Figure 2 below. The voltage applied to the OPSET pin determines the average optical power. Loop stability is obtained by adding an external capacitor across the OP-amp. In addition to the modulation current control and the pre-bias control loops described above, GD16521 features a current mirror of the bias current on the Data Sheet Rev.: 11 GD16521 Page 2 of 13 VCC FFSET DUTY IMB IM IMM IMC AR PD IB IBM TDlP TDlN SDlP SDlN SClP SClN TClP TClN DFF SEL Duty Adjust OPSET MCCL +- Antirush +- OPCL 1/20 1/20 SHDW IMSET IBSET Figure 2. Modulation current control loop and optical power control loop. VCC R IMB IM IMM IMC AR PD IB IBM OPSET MCCL +- Antirush +- OPCL 1/20 1/20 SHDW IMSET IBSET Figure 3. Modulation current control loop with enhanced extinction ratio control. Data Sheet Rev.: 11 GD16521 Page 3 of 13 Applications Temperature Monitor An on-chip, diode connected transistor is used to monitor the junction temperature in the proximity of the output stage. The voltage at pin MTJ decreases with increasing temperature, see Figure 4. VCC 2k VCC L1 220uH L3 220uH VCC L1 and L3 = Siemens Chip Inductors (B82432A1224K). L2 and L4 = Siemens ferrite cores B64290-A36-X33 with 8 turns of 0.22mm Cu-Wire. VCC L2 L4 100nF 100nF VCC 25W 25W MTJ IMB IM IB L VEE Figure 4. Temperature Monitor. Figure 6. AC coupled output. Duty Cycle Adjustment 1. 00V 0. 90V The "on-time" of the laser current (IM-pin) can be increased up to 20% by controlling the voltage at the Duty input. In the configuration in Figure 7, a smaller R results in a longer on-time. The duty cycle adjustment can be monitored using the Mark/Space monitor outputs (MARKP/ MARKN), see Figure 8. VCC 0 50 100 130 Laser Diode Slope Efficiency Compensation The pre-bias control loop may be used to make a simple compensation for changes in the slope efficiency of a laser diode, in order to maintain a constant extinction ratio. Typically the slope efficiency of the laser diode is inversely proportional to the threshold current, as shown in Figure 9 below. Therefore the pre-bias monitor current will compensate changes in the threshold current of the laser diode if it is added to the reference voltage on pin IMC at a ratio. This ratio may be chosen individually for the specific laser diode and is set by an external R as shown in Figure 3 on page 3. Thereby the extinction ratio may be maintained at a constant ratio. The variation of the pre-bias monitor current compared to the pre-bias current is only +/-1% over temperature and supply, ensuring that the performance is not sacrificed by changes in this ratio. Figure 5. Voltage at pin MTJ versus Temperature. DC Coupling For a compact design, pre-bias and modulation current can be DC coupled. DC coupling is appropriate when connections between laser driver and laser diode are kept short (with low inductance) as achieved, e.g. by flip-chip mounting of the two dice in close proximity, see Figure 10 on page 5. The GD16521 is optimized for this configuration. AC Coupling AC coupling is recommended for the packaged version, in particular when the output is connected to the laser diode through a transmission line, see Figure 6. Data Sheet Rev.: 11 V (MTJ) 0. 80V 0. 75V - 30 VCC TEMP DUTY R 1k VEE VEE VEE Figure 7. Duty cycle adjustment with an external resistor. PO MARKP 100nF MARKP Figure 8. MARKP/MARKN outputs. IL Figure 9. Laser diode characteristics GD16521 Page 4 of 13 VCC 0.05 pF 0.1 nH 0.05 pF 0.1 nH 0.02 pF chip R (0 ~ 15 ohm) 0.02 pF 0.10 pF 0.02 pF 6 ohm 1.0 V 0.10 pF VCC *2 *3 IMB IM IB 0.1 nH 0.05 pF 0.6 nH 0.1 nH 3 pF 0.3 nH 0.7 nH chip R (0 ~ 50 ohm) chip C (0 ~ 0.1 uF) 0.04 pF 0.04 pF 0.04 pF LDD 0.02 pF 0.04 pF 0.1 ohm R LDD IC chip R equivalent circuit 0.01 nH C chip C equivalent circuit note1 : Chip component constants mean available range. This circuit is applied to all temperature range. note2 : on-chip stray elements note3 : on-chip R, if necessary Figure 10.LD Equivalent circuit for simulating of DC coupled flip chip mounted laser driver and laser diode. The capacitors and inductors represent paratisiv elements of the connections. Best performance is achieved with chip R = 10 W in bias. Data Sheet Rev.: 11 GD16521 Page 5 of 13 Pin List Mnemonic: SDIP SDIN TDIP TDIN SCIP SCIN TCIP TCIN IM Pad and Pin No.: 4 5 3 6 9 10 8 11 29, 30 Pin Type: CML IN CML IN CML IN CML IN OPEN COLLECTOR OPEN COLLECTOR OPEN COLLECTOR ANL OUT Description: Data inputs. Internally terminated with 50 W to TDIP/TDIN. Loop through termination pins for SDIP and SDIN respectively. Clock inputs. Internally terminated with 50 W to TCIP/TCIN. Loop through termination pins for SDIP and SDIN respectively. Laser Driver Output (2.5 Gbit/s). IM sinks a modulation current, which is controlled by the pin IMSET. A logic HI on SDIP corresponds to IM sinking current. Laser Driver inverted Output (2.5 Gbit/s). IMB sinks a modulation current, which is controlled by the pin IMSET. Connect to VCC through 20 to 25 W. Pre-bias current output. IB sinks a current, which is controlled by the pin IMC. Modulation current control monitor output. This pin is the output of the modulation current control loop OP-amp. For stability a capacitor may be added between this pin and the IMC pin. Pre-bias current control monitor output. This pin is the output of the optical power control loop OP-amp. For stability a capacitor may be added between this pin and the OPSET pin. Pre-bias current mirror output. The sink current into the IBM pin is 1/20 of the pre-bias current. Modulation current mirror output. The sink current into the IMM pin is 1/20 of the modulation current. Internally IMM is connected to the positive input of the modulation current control loop OP-amp. Anti-rush current sink. AR sinks a 1 mA current when SHDW is high. Typically connected together with PD to the monitor diode. Mark-space monitor outputs. High impedance CML outputs. Temperature monitor. Modulation current setting. The modulation current will automatically be adjusted to this value if the internal modulation control loop is used. The IMC pin is the negative input of the modulation current control loop OP-amp. Positive input of the automatic optical power control loop OP-amp, used to control the pre-bias current. Typically connected to the monitor diode photo detector of the laser diode. Negative input of the automatic optical power control loop OP-amp, used to control the pre-bias current. Typically connected to an external reference voltage. When FFSET is low data is re-timed. When high data re-timing is bypassed. Modulation and pre-bias current shutdown input. Set high for shutdown, low for normal operation. Input for control of the mark-space ratio of the output. Decreasing the voltage of the DUTY pin increases the pulse width of a current high into the IM pin. Typically connected to VEE through resistor. Positive supply pins for laser driver part. Positive supply pin for modulation current control system. IMB 31, 32 IB IMSET 27 40 IBSET 22 ANL OUT IBM IMM 23 39 ANL OUT ANL OUT AR MARKP MARKN MTJ IMC 25 35 36 38 41 ANL OUT ANL OUT ANL OUT ANL IN PD 26 ANL IN OPSET 19 ANL IN FFSET SHDW DUTY 15 16 48 LVTTL IN LVTTL IN ANL IN VCC VCCCONT 14, 18, 20, 28, 33, 42, 46 44 PWR PWR Data Sheet Rev.: 11 GD16521 Page 6 of 13 Mnemonic: VCCCM VCCR VEE VEER NC Heat sink Pad and Pin No.: 45 7, 12 13, 17, 24, 34, 37, 43, 47 1, 2 21 Pin Type: PWR PWR PWR PWR Description: Positive supply pin for output stage operating point control system. Connect to VCCCONT. Positive supply pin for re-timing part. Negative supply pins for laser driver and control circuit part. Negative supply pin for re-timing part. Not connected. Connected to VEE. Package backside Package Pinout VCCCONT VCCCM IMSET DUTY 48 VCC 46 VCC VEE 47 VEE VEE 43 MTJ IMM IMC 41 37 38 39 40 42 44 45 VEER VEER TDIP SDIP SDIN TDIN VCCR TCIP SCIP SCIN TCIN VCCR 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 MARKN MARKP VEE VCC IMB IMB IM IM VCC IB PD AR 24 23 22 21 20 19 18 17 16 15 14 Figure 11.Package Pinout, Top View. 13 IBSET VEE NC VCC IBM VCC VEE OPSET SHDW FFSET VCC VEE Data Sheet Rev.: 11 GD16521 Page 7 of 13 Maximum Ratings These are the limits beyond which the component may be damaged. All voltages in table are referred to VEE. All currents in table are defined positive out of the pin. Symbol: Vcc VO VI II CML IN TO TS VI/O ESD Note 1: Note 2: Characteristic: Power Supply Applied Voltage (All Outputs) Applied Voltage (All Inputs) Input Current Operating Temperature Storage Temperature Static Discharge (CML, LVTTL, ANL and PWR) Note 1, 2 Human body model (100 pF, 1500 W) MIL883 std. The pins IM and IMB have no ESD protection. Junction Conditions: MIN.: -0.5 -0.5 -0.5 -15 -40 -65 500 TYP.: MAX.: 6 6 VCC + 0.5 15 +125 +150 UNIT: V V V mA C C V Data Sheet Rev.: 11 GD16521 Page 8 of 13 DC Characteristics TCASE = -40 C to +95 C, appropriate heat sinking may be required, for package parts. Device is DC-tested in the temperature range 0 C to 85 C, specifications from -40 C to 95 C are guaranteed by design. TDIE BACK = -30 C to +100 C, appropriate heat sinking may be required, for dies. Die is DC-tested at the temperature 85 C, specifications from -30 C to +100 C are guaranteed by design. All voltages in table are referred to VEE. All input signal and power currents in table are defined positive into of the pin. All output signal currents in table are defined positive out of the pin. Symbol: VCC ICC PDISS VDiff CML IN VCM CML IN ZIN CML IHI CML IN ILO CML IN V IMSET V IMM/IMC V PD/OPSET ISINK IMM ISINK IMB D ABSIM/IMM D RELIB/IBM Characteristic: Power Supply Supply Current Power Dissipation IIM/IMB = 0 A, IIB = 0 A VCC = 3.3 V, IIM/IMB = 0 A, IIB = 0 A Note 4 Note 4 Note 3 Note 3 -10 0 2.5 2.5 -4 -8 -5 TCASE = -10 C to +95 C TCASE = -40 C to +95 C -2 -3 -4 IIBM / IIM -2 0 0 1 2 0 -500 VEE +1 -100 SHDW = "1" Note 2 Note 1 SHDW = "1" GD16521 -25 VEE +1 -70 -3 -25 VEE +5 0 1 VEE +5 0 TBD VCC 0.8 50 5 2 3 4 2 VCC VCC /2 VCC VCC VCC 300 1.8 35 50 Conditions: MIN.: +2.97 -170 TYP.: +3.3 -125 410 MAX.: +3.6 -110 UNIT: V mA mW CML input voltage swing. Common mode voltage for CML input. CML input impendance CML input HI current CML input LO current Voltage Range for IMSET Voltage Range IMM and IMC Voltage Rang PD and OPSET Sink Current into pin IMM Sink Current into pin IMB Absolute Modulation current monitor deviation from IIM /20 Relative Modulation current monitor error over temperature, supply voltage, and modulation current Absolute Pre-bias current monitor deviation from IIB /20 Relative Pre-bias current monitor error over temperature, supply voltage, and bias current Input Voltage Range for IBSET Input Voltage Range for DUTY Input impedance for DUTY Input High Voltage for FFSET and SHDW Input Low Voltage for FFSET and SHDW Input High Current for FFSET and SHDW Input Low Current for FFSET and SHDW IB Output Voltage IB Current IB Current shutdown mode IM Output Voltage IM High Modulation Current IM Low Modulation Current IM Current shutdown mode 800 VCC - 0.5 65 10 mV V W mA mA V V V mA mA % % % % % V V kW V V mA mA V mA mA V mA mA mA D ABSIB/IBM D RELIB/IBM VIN IBSET VIN DUTY RIN DUTY VHI LVTTL VLO LVTTL IHI LVTTL ILO LVTTL VO IB I IB ISD IB VO IM IMod,HI IM IMod,LO IM ISD IM Data Sheet Rev.: 11 Page 9 of 13 Note 1: Note 2: Note 3: Note 4: VP VN Conditions TBD. The AC parameters are only specified in the range from - 50 mA to - 9 mA. The current is terminated with the external loop through termination. VCM = VP + VN ,VDiff = VP - VN 2 Data Sheet Rev.: 11 GD16521 Page 10 of 13 AC Characteristics TCASE = -40 C to +95 C, appropriate heat sinking may be required, for package parts. Device is AC-tested in the temperature range 0 C to 85 C, specifications from -40 C to +95 C are guaranteed by design. TDIE BACK = -30 C to +100 C, appropriate heat sinking may be required, for dies. Die is not AC-tested. Specifications are guaranteed by design. Figure 12.LDD Output Definition. Symbol: fMAX OUT Jpp IM tRISE IM tFALL IM Drange tS tH Characteristic: Data Output Frequency IM Output Pattern Jitter IM Output Rise Time (20 - 80 %) IM Output Fall Time (80 - 20 %) Duty Adjustable Range Data Set-up Time Data Hold Time Note 1, 2 Note 1 Note 1 0 60 60 Conditions: MIN.: 2500 0.06 100 100 +20 TYP.: MAX.: UNIT: Mbit/s UIPP ps ps % ps ps Target Specifications for Optical Output Symbol: Jpp IM tRISE IM tFALL IM h1/H h2/H h3/H h4/H h5/H h6/H hx/H Note 1: Note 2: Note 3: Characteristic: IM Output Pattern Jitter IM Output Rise Time (20 - 80 %) IM Output Fall Time (80 - 20 %) Ringing, See figure Ringing, See figure Ringing, See figure Ringing, See figure Ringing, See figure Ringing, See figure Crosspoint, See figure Conditions: Note 3, 2 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3 45 MIN.: TYP.: MAX.: 0.06 100 100 12 7 7 15 55 UNIT: UIPP ps ps % % % % % % % RLOAD = 25 W to VCC connected to pin IM. ILD = 50 mA. Rise/Fall times at 20 - 80 % of HI/LO voltage levels. IMB connected to VCC. Added jitter. Measured as a peak-peak jitter value on a sampling oscilloscope in 60 s period. Measured with the data retiming enabled, and using the retiming clock signal as trigger for the oscilloscope. Load is equivalent circuit of LD module, see Figure 10 on page 5 . Input signal is PN23 (223 -1 PRBS). Measured on the optical output of LD module. These specs are target specs. Data Sheet Rev.: 11 GD16521 Page 11 of 13 Package Outline Figure 13.Package 48 pin TQFP. All dimension are in mm. Data Sheet Rev.: 11 GD16521 Page 12 of 13 Device Marking GD16521 Pin 1 - Mark Figure 14.Device Marking, Top View. Die Delivery Conditions Contact GIGA Ordering Information To order, please specify as shown below: Product Name: Package Type: Die 48 pin TQFP EDQUAD Temperature Range: -30..+100 EC (die back) -40..+95 EC (case) Option: GD16521-D GD16521-48BA GD16521, Data Sheet Rev.: 11 - Date: 1 February 2001 an Intel company Mileparken 22, DK-2740 Skovlunde Denmark Phone : +45 7010 1062 Fax : +45 7010 1063 E-mail : sales@giga.dk Web site : http://www.giga.dk Please check our Internet web site for latest version of this data sheet. The information herein is assumed to be reliable. GIGA assumes no responsibility for the use of this information, and all such information shall be at the users own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. GIGA does not authorise or warrant any GIGA Product for use in life support devices and/or systems. Distributor: Copyright (c) 2001 GIGA A/S All rights reserved |
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