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| PROCESS Small Signal Transistors N - Channel Switch/Chopper J FET Chip CP206 Central TM Semiconductor Corp. PROCESS DETAILS Process Die Size Die Thickness Drain Bonding Pad Area Source Bonding Pad Area Gate Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 30,950 PRINCIPAL DEVICE TYPES 2N4391 2N4392 2N4393 CMPF4391 CMPF4392 CMPF4393 BACKSIDE GATE EPITAXIAL PLANAR 21 x 18 MILS 8.0 MILS 3.8 X 3.8 MILS 3.8 X 3.8 MILS 3.8 X 3.8 MILS Al - 30,000A Au - 6,000A 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R3 (9 -September 2003) Central TM PROCESS CP206 Semiconductor Corp. Typical Electrical Characteristics 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R3 (9 -September 2003) Central TM PROCESS CP206 Semiconductor Corp. Typical Electrical Characteristics 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R3 (9 -September 2003) |
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