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ICS7151A-50
Spread Spectrum Clock Generator
Description
The ICS7151A-50 is a clock generator for EMI (Electromagnetic Interference) reduction. Spectral peaks are attenuated by modulating the system clock frequency. Down or center spread profiles are selectable. Down spread will not exceed the maximum frequency of an unspread clock, and center spread does not change the average operating frequency of the system ICS offers many other clocks for computers and computer peripherals. Consult ICS when you need to remove crystals and oscillators from your board.
Features
* * * * * *
Operating voltage of 3.3 V 0.3 V Packaged in 8-pin SOIC Available in Pb (lead) free package Input frequency range of 16.5 to 33.4 MHz Output frequency ranges of 8.3 to 16.7 MHz Provides a spread spectrum clock output (0.5%, 1.5% center spread; -1.0%, -3.0% down spread)
* Multiplication rate of x1/2 * Advanced, low-power CMOS process * Pin compatible with the Fujitsu MB88151-500
Block Diagram
VDD
S1:0
2
ENS
PLL Clock Synthesis and Spread Spectrum Circuitry
Clock Buffer/ Crystal Ocsillator
CKOUT
XIN
XOUT
External caps required with crystal for accurate tuning of the clock
GND
MDS 7151A-50 A Integrated Circuit Systems, Inc.
1
525 Race Street, San Jose, CA 95126
Revision 102005 tel (408) 297-1201
www.icst.com
ICS7151A-50 Spread Spectrum Clock Generator
Pin Assignment
XIN GND S0 S1 1 2 3 4 8 7 6 5 8 pin (150 mil) SOIC XOUT VDD ENS CKOUT
Spread Direction and Percentage Select Table
S1 Pin 4 0 0 1 1 ENS (note 1) S0 Pin 3 0 1 0 1 Spread Direction Center Center Down Down Modulation No Modulation Modulation Spread Percentage (%) 1.5 0.5 -1.0 -3.0
0 1 Notes:
1. Pin 1 has a pull-up resistor.
Pin Descriptions
Pin Number Pin Name Pin Type Pin Description
1 2 3 4 5 6 7 8
XIN GND S0 S1 CKOUT ENS VDD XOUT
Input Power Input Input Output Input Power Output
Crystal pin/clock input pin. Connect to ground. Select pin 0. Spread modulation select. Select pin 1. Spread modulation select. Clock output. Modulation enable. Internal pull-up resistor. Connect to +3.3 V. Crystal connection pin.
MDS 7151A-50 A Integrated Circuit Systems, Inc.
2
525 Race Street, San Jose, CA 95126
Revision 102005 tel (408) 297-1201
www.icst.com
ICS7151A-50 Spread Spectrum Clock Generator
External Components
The ICS7151A-50 requires a minimum number of external components for proper operation.
traces just underneath the device, or on layers adjacent to the ground plane layer used by the device.
Crystal Information
The crystal used should be a fundamental mode (do not use third overtone), parallel resonant. Crystal capacitors should be connected from pins X1 to ground and X2 to ground to optimize the initial accuracy. The value of these capacitors is given by the following equation: Crystal caps (pF) = (CL - 6) x 2 In the equation, CL is the crystal load capacitance. So, for a crystal with a 16 pF load capacitance, two 20 pF [(16-6) x 2] capacitors should be used.
Decoupling Capacitor
A decoupling capacitor of 0.01F must be connected between GND and VDD on pins 2 and 7, as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit.
Series Termination Resistor
Series termination should be used on the clock output. To series terminate a 50 trace (a commonly used trace impedance) place a 27 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 25.
Spread Spectrum Profile
The ICS7151A-50 low EMI clock generator uses a triangular frequency modulation profile for optimal down stream tracking of zero delay buffers and other PLL devices. The frequency modulation amplitude is constant with variations of the input frequency.
PCB Layout Recommendations
For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) The 0.01F decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. 2) To minimize EMI, the 27 series termination resistor (if needed) should be placed close to the clock output. 3) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed away from the ICS7151A-50. This includes signal
Modulation Rate
Frequency
Time
MDS 7151A-50 A Integrated Circuit Systems, Inc.
3
525 Race Street, San Jose, CA 95126
Revision 102005 tel (408) 297-1201
www.icst.com
ICS7151A-50 Spread Spectrum Clock Generator
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS7151A-50. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs (referenced to GND) Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature Overshoot (VIOVER) Undershoot (VIUNDER) -0.5 to 4.0 V
Rating
-0.5 V to VDD+0.5 V -40 to +85C -55 to +125C -40 to +125C 260C VDD + 1.0 V (tOVER < 50 ns) GND - 1.0 V (tUNDER < 50 ns)
Overshoot/Undershoot
tUNDER < 50 ns VIOVER < VDD + 1.0 V VDD GND VIUNDER < GND - 1.0 V
Input pin
tOVER < 50 ns
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND)
Min.
-40 +3.0
Typ.
3.3
Max.
+85 3.6
Units
C V
MDS 7151A-50 A Integrated Circuit Systems, Inc.
4
525 Race Street, San Jose, CA 95126
Revision 102005 tel (408) 297-1201
www.icst.com
ICS7151A-50 Spread Spectrum Clock Generator
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 0.3 V, Ambient Temperature -40 to +85C
Parameter
Operating Voltage Supply Current Input Frequency Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Capacitance
Symbol
VDD IDD
Conditions
No load, at 3.3 V, output = 24 MHz
Min.
3.0
Typ.
3.3 10
Max.
3.6 14 33.4 VDD + 0.3 VDD * 0.20 0.4 16 15 10 7
Units
V mA MHz V V V V pF pF pF pF k
16.5 VIH VIL VOH VOL CIN XIN, S0, S1, ENS XIN, S0, S1, ENS CKOUT, IOH = -4 mA CKOUT, IOL = 4 mA XIN, S0, S1, ENS CKOUT, 8.3 to 66.7 MHz VDD * 0.8 0.0 2.0
Load Capacitance
CL
CKOUT, 66.7 to 100 MHz CKOUT, 100 to 133.4 MHz
Input Pull-up Resistor
RPU
ENS
100
240
400
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 0.3 V, Ambient Temperature -40 to +85 C
Parameter
Oscillation Frequency Input Frequency Output Frequency Input Clock Duty Cycle Output Clock Duty Cycle Output Slew Rate Cycle to Cycle Jitter Lock Time Modulation Frequency
Symbol
fX fIN fOUT
Conditions
Fundamental oscillation XIN CKOUT, 2-frequency division XIN, 16.5 to 33.4 MHz CKOUT, 1.5 V CKOUT, 0.4 to 2.4 V, load capacitance 15 pF
Min.
16.5 16.5 8.3 40 40 0.5
Typ.
Max.
33.4 33.4 16.7
Units
MHz MHz MHz % % V/ns ps ms kHz
50 TBD TBD 2 33
60 60 3.0 200 5
tDCC
tJC tLK fMOD
No load, standard deviation CKOUT CKOUT=TBD
MDS 7151A-50 A Integrated Circuit Systems, Inc.
5
525 Race Street, San Jose, CA 95126
Revision 102005 tel (408) 297-1201
www.icst.com
ICS7151A-50 Spread Spectrum Clock Generator
Input Frequency (fIN = 1/tIN)
tIN 0.8 VDD CKIN
Output Slew Rate
2.4 V CKOUT tr SR = (2.4 - 0.4) /tr, SR = (2.4 - 0.4) /tf tf 0.4 V
Thermal Characteristics
Parameter
Thermal Resistance Junction to Ambient
Symbol
JA JA JA JC
Conditions
Still air 1 m/s air flow 3 m/s air flow
Min.
Typ.
150 140 120 40
Max. Units
C/W C/W C/W C/W
Thermal Resistance Junction to Case
MDS 7151A-50 A Integrated Circuit Systems, Inc.
6
525 Race Street, San Jose, CA 95126
Revision 102005 tel (408) 297-1201
www.icst.com
ICS7151A-50 Spread Spectrum Clock Generator
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
8
Millimeters Symbol Min Max
Inches* Min Max
E INDEX AREA
H
12 D
A A1 B C D E e H h L
1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0 8
.0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0 8
*For reference only. Controlling dimensions in mm.
A A1 h x 45 C
-Ce
B SEATING PLANE L
.10 (.004)
C
Ordering Information
Part / Order Number
ICS7151AM-50 ICS7151AM-50T ICS7151AM-50LF ICS7151AM-50LFT ICS7151AMI-50 ICS7151AMI-50T ICS7151AMI-50LF ICS7151AMI-50LFT
Marking
7151AM50 7151AM50 151AM50L 151AM50L 151AMI50 151AMI50 51AMI50L 51AMI50L
Shipping Packaging
Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel
Package
8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC
Temperature
0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C -40 to +85 C -40 to +85 C -40 to +85 C -40 to +85 C
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 7151A-50 A Integrated Circuit Systems, Inc.
7
525 Race Street, San Jose, CA 95126
Revision 102005 tel (408) 297-1201
www.icst.com
ICS7151A-50
Spread Spectrum Clock Generator
Revision History
Rev.
A
Originator
J. Sarma
Date
10/20/05
Description of Change
Rev A; new device/datasheet.
MDS 7151A-50 A Integrated Circuit Systems, Inc.
8
525 Race Street, San Jose, CA 95126
Revision 102005 tel (408) 297-1201
www.icst.com

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