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E2E1011-27-Y4
Semiconductor MSM65512A/65P512A
Semiconductor High Performance 8-Bit Microcontroller
This version: Jan. 1998 MSM65512A/65P512A Previous version: Nov. 1996
GENERAL DESCRIPTION
The MSM65512A is a high-performance 8-bit microcontroller that employs OKI original nX-8/ 50 CPU core. With a minimum instruction execution time of 400 ns (10MHz clock), the MSM65512A is capable of high-speed processing, and includes 8K bytes of program memory, 256 bytes of data memory, timers and serial ports. Also available are the MSM65P512A, which replaces the MSM65512's built-in program memory with one-time PROM, and the MSM65X512A, which uses external program memory.
FEATURES
* Operating range Operating frequency Operating voltage Operating temperature * Memory space Internal program memory Internal data memory * Minimum instruction execution time * Powerful instruction set : 0 to 10 MHz (VDD=4.5 to 5.5 V) 0 to 5 MHz (VDD=2.7 to 5.5 V) : 2.7 to 5.5 V : -40 to +85C (Operation at +125C is assured by the other specification.) : 64K bytes : 8K bytes : 256 bytes : 400 ns @ 10 MHz : 83 basic instructions 8/16-bit operation instructions Bit manipulation instructions Compound function instructions : 8 8 AE 16 16/8 AE 16 ... 8 : 4 ports 8 bits : 8-bit auto-reload timer 2 16-bit auto-reload timer 1 Watchdog timer 1 : Time base counter 1 16-bit free-running counter 1 : 1 channel : 2 channels : Shift register 1 Serial port with baud rate generator (UART/synchronous) 1 :3 : 15
* Abundant addressing modes * Multiplication/division operation functions * I/O ports Input-output port * Timers * Counters * Capture input * Compare output * Serial ports * External interrupts * Interrupt sources * Package 40-pin plastic DIP (DIP40-P-600-2.54)
: (MSM65512A-RS, MSM65P512A-RS) 44-pin plastic QFP (QFP44-P-910-0.80-2K) : (MSM65512A-GS-2K, MSM65P512A-xxxGS-2K) 44-pin plastic QFJ (PLCC) (QFJ44-P-S650-1.27): (MSM65512A-JS, MSM65P512A-JS) indicates the code number.
1/23
BLOCK DIAGRAM
Semiconductor
OSC 0 OSC 1 RESET HSTOP*
ROM (8K bytes) OSC CONT. CPU CORE INST. DEC.
8
EXT.MEM. CONT.
8 8
AD0-7* A8-15* RD WR* ALE EA
8 ALU GMAR PC
BUS CONT.
VDD GND
RAM (256 bytes) TBC WDT
T/C IR
8
16-bit TIMER 16-bit FRC CAP1, CMP2 SIO
T2CK* CAP* CMP0* CMP1* TXD* RXD* T1OUT* T0CK* GATE* SFTO* SFTI* SFTCK* INT0* INT1* INT2*
AR
BR
PSW
SP
LMAR
8-bit TIMER3**
MUL/DIV
I/O PORT
8-bit SHIFT-REG.
MSM65512A/65P512A
INTERRUPT CONT.
P0 P1 P2 P3 * Secondary functions of ports. ** One timer is used for the SIO baud rate generator
2/23
Semiconductor
MSM65512A/65P512A
PIN CONFIGURATION (TOP VIEW)
P3.0/T2CK P3.1/CAP P3.2/CMP0 P3.3/CMP1 P3.4/INT2 P3.5/SFTO P3.6/SFTI P3.7/SFTCK RESET
1 2 3 4 5 6 7 8 9
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
VDD P0.0/AD0 P0.1/AD1 P0.2/AD2 P0.3/AD3 P0.4/AD4 P0.5/AD5 P0.6/AD6 P0.7/AD7 EA ALE RD P1.7/A15 P1.6/A14 P1.5/A13 P1.4/A12 P1.3/A11 P1.2/A10 P1.1/A9 P1.0/A8
P2.0/RXD 10 P2.1/TXD 11 P2.2/INT0 12 P2.3/INT1/GATE 13 P2.4/T0CK P2.5/HSTOP P2.6/WR P2.7/T1OUT OSC1 OSC0 14 15 16 17 18 19
GND 20
40-Pin Plastic DIP
3/23
Semiconductor
MSM65512A/65P512A
PIN CONFIGURATION (TOP VIEW) (Continued)
NC
P3.5/SFTO P3.6/SFTI P3.7/SFTCK RESET P2.0/RXD P2.1/TXD P2.2/INT0 P2.3/INT1/GATE
P2.4/T0CK 10 P2.5/HSTOP 11
P2.6/WR 12
P2.7/T1OUT 13
P1.0/A8 18
P1.1/A9 19
P1.2/A10 20
P1.3/A11 21
* No-connection pin for MSM65P512A NC: No-connection pin 44-Pin Plastic QFP
P1.4/A12 22
43 P3.3/CMP1 42 P3.2/CMP0 40 P3.0/T2CK 44 P3.4/INT2 41 P3.1/CAP
38 P0.0/AD0
37 P0.1/AD1
36 P0.2/AD2
35 P0.3/AD3
39 VDD
34 NC
1 2 3 4 5 6 7 8 9
33 P0.4/AD4 32 P0.5/AD5 31 P0.6/AD6 30 P0.7/AD7 29 EA 28 ALE 27 RD 26 P1.7/A15 25 P1.6/A14 24 P1.5/A13 23 NC
OSC1 14
OSC0 15
GND 16
*VDD 17
4/23
Semiconductor
MSM65512A/65P512A
PIN CONFIGURATION (TOP VIEW) (Continued)
P0.3/AD3 40 P0.2/AD2 41 P0.1/AD1 42 P0.0/AD0 43 VDD 44 P3.0/T2CK 1 P3.1/CAP 2 P3.2/CMP0 3 P3.3/CMP1 4 P3.4/INT2 5 NC 6
P2.0/RXD 11
P2.1/TXD 12
P2.2/INT0 13
P2.3/INT1/GATE 14
P2.4/T0CK 15
P2.5/HSTOP 16
P3.5/SFTO 7
P3.6/SFTI 8
NC: No-connection pin 44-Pin Plastic QFJ (PLCC)
P3.7/SFTCK 9
,
38 P0.4/AD4 37 P0.5/AD5 36 P0.6/AD6 35 P0.7/AD7 39 NC 34 EA RESET 10
31 P1.7/A15
30 P1.6/A14
29 P1.5/A13
33 ALE
32 RD
28 NC 27 P1.4/A12 26 P1.3/A11 25 P1.2/A10 24 P1.1/A9 23 P1.0/A8 22 GND 21 OSC0 20 OSC1 19 P2.7/T1OUT 18 P2.6/WR
NC 17
5/23
Semiconductor
MSM65512A/65P512A
PIN DESCRIPTIONS
Basic Functions
Function Power Supply Oscillation Symbol VDD GND OSC0 OSC1 RESET EA Control RD ALE PORT 0 O O I/O Type -- -- I O I I +5V power supply 0V digital ground Crystal oscillation input/external clock input Crystal oscillation output System reset input (program starts from address 0040H); internal pull-up resistor Program memory select input pin. "L" level input for external program memory; "H" level input for internal program memory. Read strobe signal during external memory access Address latch signal during external memory access 8-bit Input-output port During external memory access, becomes address/data bus for address output, instruction fetch or data read/write along with ALE, RD and WR pins 8-bit Input/output port Address bus during external memory access 8-bit Input/output port 2. Secondary functions shown in following table are added for ports 2 and 3. Description
Port PORT 1 PORT 2 PORT 3 I/O I/O
6/23
Semiconductor Secondary Functions
Symbol RXD Type I/O Description
MSM65512A/65P512A
P2.0 secondary functions UART: Input pin for serial port receive data. Synchronous: Input/output pin for serial port transmit/receive data. P2.1 secondary functions UART: Output pin for serial port transmit data. Synchronous: Output pin for serial port synchronizing clock. P2.2 secondary function External interrupt 0 input pin. P2.3 secondary functions External interrupt 1 input pin. Also used as input pin for gate signal for timer 0 count enable/disable. P2.4 secondary function Timer 0 external clock input pin. P2.5 secondary function Hard stop mode input pin; stops system clock oscillation with "L" level input. P2.6 secondary function Write strobe signal output pin during external data memory access. P2.7 secondary function Output pin for signal obtained by dividing timer overflow by 2. P3.0 secondary function Timer 2 external clock input pin. P3.1 secondary function Capture trigger input pin. P3.2 secondary function Compare output channel 0 output pin. P3.3 secondary function Compare output channel 1 output pin. P3.4 secondary function External interrupt 2 input pin P3.5 secondary function Shift register data output pin. P3.6 secondary function Shift register data input pin. P3.7 secondary function Shift register synchronizing clock input/output pin.
TXD
O
INT0
I
INT1/GATE
I
T0CK HSTOP WR T1OUT T2CK CAP CMP0 CMP1 INT2 SFTO SFTI SFTCK
I I O O I I O O I O I I/O
7/23
Semiconductor Port Circuit Configuration
Type Port Circuit Configuration
MSM65512A/65P512A
Electrical Characteristics (VDD=5V)
Data Bus
P0D
PORT0
"H" Input Voltage: * VIH=2.4V "L" Input Voltage: * VIL=0.8V "H" Output Voltage: * VOH=3.75V * IOH=-400mA
1
P0.0/AD0P0.7/AD7
P0 DIR
External Memory Control
"L" Output Voltage: * VOL=0.4V * IOL=3.2mA
Data Bus
P1D
PORT1
"H" Input Voltage: * VIH=2.4V "L" Input Voltage: * VIL=0.8V "H" Output Voltage: * VOH=3.75V * IOH=-200mA
2
P1.0/A8P1.7/A15
P1 DIR
External Memory Control
"L" Output Voltage: * VOL=0.4V * IOL=1.6mA
"H" Input Voltage: * VIH=2.4V "L" Input Voltage: * VIL=0.8V Data Bus P2.6/WR "H" Output Voltage: * VOH=3.75V * IOH=-400mA "L" Output Voltage: * VOL=0.4V * IOL=3.2mA Excluding P2.6/WR "H" Output Voltage: * VOH=3.75V * IOH=-200mA "L" Output Voltage: * VOL=0.4V * IOL=1.6mA
3
P2.0/RXD, P2.1/TXD, P2.6/WR, P2.7/T1OUT, P3.2/CMP0, P3.3/CMP1, P3.5/SFT0, P3.7/SFTCK
Px MOD
Secondary Output Function
PORTx
PxD
Px DIR
Secondary Input Function (x=2 to 5)
8/23
Semiconductor Port Circuit Configuration (Continued)
Type Port Circuit Configuration
MSM65512A/65P512A
Electrical Characteristics (VDD=5V)
4
P2.2/INT0, P2.3/INT1/GATE, P2.4/T0CK, P2.5/HSTOP, P3.0/T2CK, P3.1/CAP, P3.4/INT2, P3.6/SFTI
Data Bus
PxD
PORTx
"H" Input Voltage: * VIH=2.4V "L" Input Voltage: * VIL=0.8V "H" Output Voltage: * VOH=3.75V * IOH=-200mA "L" Output Voltage: * VOL=0.4V * IOL=1.6mA
Px DIR
Secondary Input Function
(x=2 to 5)
9/23
Semiconductor
MSM65512A/65P512A
MEMORY MAPS
General Memory Space 0FFFFH
External Memory
Local Memory Space 17FH Page 1
Data Memory
2000H
Program Memory
100H
SFR
100H
Vector Call Table Area
Internal Memory
80H
Data Memory
Page 0
80H 40H 20H Interrupt Vector Table Area 0 Vector Call Table Area
Program Memory
40H 30H 20H 10H 0
Local Register Set 3 Local Register Set 2 Local Register Set 1 Local Register Set 0
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Input Voltage Output Voltage Power Dissipation Storage Temperature Symbol VDD VI VO PD TSTG Ta=25C per package Ta=25C per output -- Ta=25C Condition Rating -0.3 to 7.0 -0.3 to VDD+0.3 -0.3 to VDD+0.3 400 50 -55 to +150 mW C V Unit
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Memory Hold Voltage Oscillation Operating Frequency *1 External Clock Operating Frequency Operating Temperature Symbol VDD VDDMH fOSC Condition Refer to Figure 1. fOSC=0 Hz Refer to Figure 1. Range 2.7 to 5.5 2.0 to 5.5 1 to 10 MHz Unit V
fEXTCLK
Refer to Figure 1.
0 to 10
MHz
Top
--
-40 to +85
C
*1 This is due to the standard of a crystal oscillator or ceramic resonator. 10/23
Semiconductor
MSM65512A/65P512A
Ta=-40 to +85C 10
fOSC, fEXTCLK (MHz)
8 6 5 4 2 1 2 3 2.7 4 VDD (V) 5 5.5 6
* Oscillates at 1MHz or more.
Figure 1. Operating Frequency vs. Power Supply Voltage
11/23
Semiconductor
MSM65512A/65P512A
ELECTRICAL CHARACTERISTICS
DC Characteristics 1 (VDD=4.5 to 5.5V)
(GND=0V, Ta=-40 to +85C) Parameter "H" Input Voltage 1 *1 "H" Input Voltage 2 *2 "L" Input Voltage "H" Output Voltage 1 *3 "H" Output Voltage 2 "L" Output Voltage 1 "L" Output Voltage 2
*4 *3 *4 *5 *6
Symbol VIH1 VIH2 VIL VOH1 VOH2 VOL1 VOL2 ILI1 ILI2 IIL CI IDDS IDDS
Condition -- -- -- IOH=-200mA IOH=-400mA IOL=1.6mA IOL=3.2mA VI=VDD/0V VI=VDD/0V VI=0V f=1MHz, Ta=25C 5V, Stop mode *8 10MHz, 5V, no load *9
Min. 2.4 0.7VDD -0.3 0.75VDD 0.75VDD -- -- -- -- -40 -- -- --
Typ. -- -- -- -- -- -- -- -- -- -200 5 -- 20
Max. VDD+0.3 VDD+0.3 0.8 -- -- 0.4 0.4 1 10 -400 -- 50 40
Unit
V
Input Leakage Current 1 Input Leakage Current 2 "L" Input Current
*7
mA
Input Capacitance Current Consumption
pF mA mA
Excluding OSC0 and RESET OSC0 and RESET Excluding P0, ALE, RD, P2.6/WR P0, ALE, RD, P2.6/WR EA Excluding RESET, EA RESET The ports configured as inputs should be coupled to VDD or 0V. Other ports should not be loaded. *9 Refer to Figure 2. *1 *2 *3 *4 *5 *6 *7 *8
12/23
Semiconductor
MSM65512A/65P512A
DC Characteristics 2 (2.7 VDD<4.5V)
(GND=0V, Ta=-40 to +85C) Parameter "H" Input Voltage 1 *1 "H" Input Voltage 2 *2 "L" Input Voltage "H" Output Voltage 1 *3 "H" Output Voltage 2 "L" Output Voltage 1 "L" Output Voltage 2
*4 *3 *4 *5 *6
Symbol VIH1 VIH2 VIL VOH1 VOH2 VOL1 VOL2 ILI1 ILI2 IIL CI IDDS IDD
Condition -- -- -- IOH=-10mA IOH=-20mA IOL=10mA IOL=20mA VI=VDD/0V VI=VDD/0V VDD=2.7 to 3.3V, VI=0V f=1MHz, Ta=25C 3V, Stop mode *8 5MHz, 3V, no load *9
Min. 0.5VDD+0.2 0.6VDD+0.4 -0.3 0.75VDD 0.75VDD -- -- -- -- -40 -- -- --
Typ. -- -- -- -- -- -- -- -- -- -120 5 -- 6
Max. VDD+0.3 VDD+0.3 0.15VDD+0.1 -- -- 0.1 0.1 1 10 -240 -- 25 15
Unit
V
Input Leakage Current 1 Input Leakage Current 2 "L" Input Current
*7
mA
Input Capacitance Current Consumption
pF mA mA
Excluding OSC0 and RESET OSC0 and RESET Excluding P0, ALE, RD, P2.6/WR P0, ALE, RD, P2.6/WR EA Excluding RESET, EA RESET The ports configured as inputs should be coupled to VDD or 0V. Other ports should not be loaded. *9 Refer to Figure 2. *1 *2 *3 *4 *5 *6 *7 *8
13/23
Semiconductor
MSM65512A/65P512A
10MHz 50 40
IDD (mA)
Max.
30 Typ. 20 10 2 3 4 5 VDD (V) 6
6MHz 50 40
IDD (mA)
Max.
30 20 10 2 3 4 5 VDD (V) 6 Typ.
2MHz 50 40
IDD (mA)
30 20 10 2 3 4 5 VDD (V) 6 Ta=-40 to +85C, no load Max. Typ.
Figure 2. Operating Current Consumption vs. Power Supply Voltage
14/23
Semiconductor AC Characteristics * External memory control
MSM65512A/65P512A
(VDD=2.7 to 5.5V, GND=0V, Ta=-40 to +85C) Parameter Clock Cycle "L" Clock Pulse Width "H" Clock Pulse Width Clock Cycle "L" Clock Pulse Width "H" Clock Pulse Width ALE Pulse Width ALE Pulse Delay Time 1 ALE Pulse Delay Time 2 RD Pulse Width RD Pulse Delay Time WR Pulse Width WR Pulse Delay Time "L" Address Setup Time "H" Address Setup Time "L" Address Hold Time Bus Float Time "H" Address Hold Time "H" Address Hold Time Read Data Access Time Read Data Access Time Read Data Hold Time Write Data Setup Time Write Data Hold Time Symbol tC tCLW tCHW tC tCLW tCHW tAW tALD1 tALD2 tRW tRD tWW tWD tLAS tHAS tLAH tLAZ tHAHR tHAHW tRDAA tRDAR tRDH tWDS tWDH CL=100pF VDD=2.7 to 5.5V VDD=4.5 to 5.5V Condition Min. 100 45 45 200 90 90 tC+tCHW-20 tCLW-20 tCLW-20 tC+tCHW-40 tCLW-40 tC+tCHW-40 tCLW-20 tC-40 tC-40 tCLW-20 -- tC-20 tC-20 -- -- 0 tC+tCLH-40 tCLW-20 Max. -- -- -- -- -- -- -- -- -- -- tCLW+20 -- tCLW+40 -- -- -- 20 -- -- tC+tCLW-15 tCHW+10 -- -- -- ns Unit
15/23
Semiconductor
MSM65512A/65P512A
tCHW OSC0 tCLW ALE
tC
tAW
tRD RD tRDAR tLAS P0 ADDRESS L tRDAA tHAS P1 tWD WR tLAH tLAZ
tRW
tALD1
tRDH INST or DATA IN
tHAHR ADDRESS H tWW tALD2
tWDS P0 ADDRESS L DATA OUT
tWDH
tHAHW P1 ADDRESS H
16/23
Semiconductor * CPU control
MSM65512A/65P512A
(VDD=2.7 to 5.5V, GND=0V, Ta=-40 to +85C) Parameter RESET Pulse Width *1 RESET Pulse Width *2 Symbol tRESW1 tRESW2 Condition -- -- Min. 20 *3 Max. -- -- Unit ns --
*1 Excluding power ON, stop mode and hard stop mode. *2 During power ON, in stop mode and hard stop mode. *3 Oscillation stabilization time depends on resonator.
RESET pulse width
tRESW1, 2 RESET
* Peripheral control 1
Parameter OSC EXI Clock Cycle External Interrupt Pulse Width External Clock Pulse Width GATE Pulse Width T2 CAP External Clock Pulse Width CAP Pulse Width Symbol tC tEXIW tT0CW tT0GW tT2CW tCAPW -- Condition
(VDD=2.7 to 5.5V, GND=0V, Ta=-40 to +85C) Min. 100 200 4 tC 4 tC 1 tTOCLK * 4 tC 12 tC Max. -- -- -- -- -- -- -- ns Unit VDD=4.5 to 5.5V VDD=2.7 to 5.5V
T0
*
tT0CLK : Timer 0 count clock cycle selected by T0CON.
17/23
Semiconductor
MSM65512A/65P512A
tC OSC0 tCLW
1) EXI pulse width
tEXIW INT0-2
2) T0
tT0CW T0CK tT0GW GATE
3) T2
tT2CW T2CK
4) CAP
tCAPW CAP
18/23
Semiconductor * Peripheral control 2
MSM65512A/65P512A
(VDD=2.7 to 5.5V, GND=0V, Ta=-40 to +85C) Parameter OSC Clock Cycle SFTCK Cycle SFTCK "L" Pulse Width SFTCK "H" Pulse Width SFT SFTCK Setup Time SFTO Hold Time SFTI Setup Time SFTI Hold Time Synchronous Clock Cycle Synchronous Clock "L" Pulse Width Symbol tC tSFC tSFCLW tSFCHW tSFOS tSFOH tSFIS tSFIH tSIC tSICLW tSICHW tSIOS tSIOH tSIIS tSIIH CL=100pF Condition VDD=4.5 to 5.5V VDD=2.7 to 5.5V Min. 100 200 8 tC 4 tC-20 4 tC-20 tSFCLW-100 tSFCHW-100 100 100 8 tC 4 tC-20 4 tC-20 6 tC-100 2 tC-100 tC+tCLW+100 0 Max. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- ns Unit
SIO (Clock Synchronous Clock "H" Syn- Pulse Width chro- Output Data Setup Time nous) Output Data Hold Time Input Data Setup Time Input Data Hold Time
19/23
Semiconductor 1) SFT
tSFC tSFCLW SFTCK
MSM65512A/65P512A
tSFCHW
tSFOS SFTO tSFIS SFTI
tSFOH
tSFIH
2) SIO (Clock synchronous mode)
tSIC tSICLW TXD tSICHW
tSIOS RXD (transmission) tSIIS RXD (reception)
tSIOH
tSIIH
20/23
Semiconductor
MSM65512A/65P512A
PACKAGE DIMENSIONS
(Unit : mm)
DIP40-P-600-2.54
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 6.10 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
21/23
Semiconductor
MSM65512A/65P512A
(Unit : mm)
QFP44-P-910-0.80-2K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.41 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
22/23
Semiconductor
MSM65512A/65P512A
(Unit : mm)
QFJ44-P-S650-1.27
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin Cu alloy Solder plating 5 mm or more 2.00 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
23/23

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